公开(公告)号：US20200050725A1

公开(公告)日：2020-02-13

申请号：US16660506

申请日：2019-10-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chia-Ping CHIANG ,  Ming-Hui CHIH ,  Chih-Wei HSU ,  Ping-Chieh WU ,  Ya-Ting CHANG ,  Tsung-Yu WANG ,  Wen-Li CHENG ,  Hui En YIN ,  Wen-Chun HUANG ,  Ru-Gun LIU ,  Tsai-Sheng GAU

IPC分类号： G06F17/50 ,  G03F7/20 ,  G03F1/70

摘要： Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.

公开(公告)号：US20210019464A1

公开(公告)日：2021-01-21

申请号：US17063429

申请日：2020-10-05

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chia-Ping CHIANG ,  Ming-Hui CHIH ,  Chih-Wei HSU ,  Ping-Chieh WU ,  Ya-Ting CHANG ,  Tsung-Yu WANG ,  Wen-Li CHENG ,  Hui En YIN ,  Wen-Chun HUANG ,  Ru-Gun LIU ,  Tsai-Sheng GAU

IPC分类号： G06F30/39 ,  G03F1/70 ,  G03F7/20

摘要： Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.

公开(公告)号：US20180164695A1

公开(公告)日：2018-06-14

申请号：US15689244

申请日：2017-08-29

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Ken-Hsien HSIEH ,  Wen-Li CHENG ,  Pai-Wei WANG ,  Ru-Gun LIU ,  Chih-Ming LAI

IPC分类号： G03F7/20 ,  G06F17/50 ,  G03F1/22 ,  G03F1/36

CPC分类号： G03F7/70283 ,  G03F1/22 ,  G03F1/36 ,  G03F1/68 ,  G03F1/70 ,  G03F7/70433 ,  G03F7/70466 ,  G03F7/705 ,  G06F17/5045 ,  G06F17/5081

摘要： A multiple patterning decomposition method for IC is provided. Features of layout of IC are decomposed into a plurality of nodes. The nodes are classified to assign a plurality of first and second links between the nodes. First and second pseudo colors are assigned to a pair of nodes of each first link. The second links having a pair of nodes both corresponding to the first or second pseudo color are identified. The nodes of the first links are uncolored. A first real color is assigned to the two uncolored nodes of the identified second links in each of the networks. A second real color is assigned to the uncolored nodes connected to the nodes corresponding to the first real color through the first links. First and second masks are formed according to the nodes corresponding to the first and second real colors, respectively.