LITHOGRAPHY PROCESS MONITORING METHOD

    公开(公告)号:US20210286274A1

    公开(公告)日:2021-09-16

    申请号:US17301215

    申请日:2021-03-29

    IPC分类号: G03F9/00

    摘要: A method of performing a lithography process includes providing a test pattern. The test pattern includes a first set of lines arranged at a first pitch, a second set of lines arranged at the first pitch, and further includes at least one reference line between the first set of lines and the second set of lines. The test pattern is exposed with a radiation source providing an asymmetric, monopole illumination profile to form a test pattern structure on a substrate. The test pattern structure is then measured and a measured distance correlated to an offset of a lithography parameter. A lithography process is adjusted based on the offset of the lithography parameter.

    TUNABLE ILLUMINATOR FOR LITHOGRAPHY SYSTEMS

    公开(公告)号:US20210132504A1

    公开(公告)日:2021-05-06

    申请号:US16886509

    申请日:2020-05-28

    IPC分类号: G03F7/20

    摘要: In one example, an apparatus includes an extreme ultraviolet illumination source and an illuminator. The extreme ultraviolet illumination source is arranged to generate a beam of extreme ultraviolet illumination to pattern a resist layer on a substrate. The illuminator is arranged to direct the beam of extreme ultraviolet illumination onto a surface of a photomask. In one example, the illuminator includes a field facet mirror and a pupil facet mirror. The field facet mirror includes a first plurality of facets arranged to split the beam of extreme ultraviolet illumination into a plurality of light channels. The pupil facet mirror includes a second plurality of facets arranged to direct the plurality of light channels onto the surface of the photomask. The distribution of the second plurality of facets is denser at a periphery of the pupil facet mirror than at a center of the pupil facet mirror.

    LITHOGRAPHY PROCESS MONITORING METHOD

    公开(公告)号:US20220365452A1

    公开(公告)日:2022-11-17

    申请号:US17815155

    申请日:2022-07-26

    IPC分类号: G03F9/00

    摘要: A method of performing a lithography process includes providing a test pattern. The test pattern includes a first set of lines arranged at a first pitch, a second set of lines arranged at the first pitch, and further includes at least one reference line between the first set of lines and the second set of lines. The test pattern is exposed with a radiation source providing an asymmetric, monopole illumination profile to form a test pattern structure on a substrate. The test pattern structure is then measured and a measured distance correlated to an offset of a lithography parameter. A lithography process is adjusted based on the offset of the lithography parameter.

    LAYOUT METHOD AND SYSTEM FOR MULTI-PATTERNING INTEGRATED CIRCUITS
    8.
    发明申请
    LAYOUT METHOD AND SYSTEM FOR MULTI-PATTERNING INTEGRATED CIRCUITS 审中-公开
    多模式集成电路的布局方法和系统

    公开(公告)号:US20140237435A1

    公开(公告)日:2014-08-21

    申请号:US14267013

    申请日:2014-05-01

    IPC分类号: G06F17/50

    摘要: A method identifies, as an independent node, any node representing a circuit pattern in any odd loop of a layout of a region of a layer of an IC that is not included in any other odd loop of the layout. The layer is to have a plurality of circuit patterns to be patterned using at least three photomasks. The method identifies, as a safe independent node, any independent node not closer than a threshold distance from any other independent nodes in another odd loop of the layout. The layout is modified, if the circuit patterns in the layout include any odd loop without any safe independent node, so that that after the modifying, each odd loop has at least one safe independent node.

    摘要翻译: 一种方法将作为独立节点的任何节点表示在不包括在布局的任何其它奇数循环中的IC层的区域的布局的任何奇数循环中的电路图案。 该层将具有使用至少三个光掩模进行图案化的多个电路图案。 该方法将安全独立节点识别为距离布局的另一个奇数循环中任何其他独立节点不超过阈值距离的任何独立节点。 布局被修改,如果布局中的电路图案包括没有任何安全独立节点的任何奇数循环,使得在修改之后,每个奇数循环至少有一个安全独立节点。