公开(公告)号：US11894237B2

公开(公告)日：2024-02-06

申请号：US17826528

申请日：2022-05-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Hsuan Chen ,  Yuan-Sheng Huang

IPC: H01L21/308 ,  H01L21/8234 ,  H01L21/3213

CPC classification number: H01L21/3088 ,  H01L21/3086 ,  H01L21/32139 ,  H01L21/823431 ,  H01L21/823437

Abstract: A method includes forming a polymer layer on a patterned photo resist. The polymer layer extends into an opening in the patterned photo resist. The polymer layer is etched to expose the patterned photo resist. The polymer layer and a top Bottom Anti-Reflective Coating (BARC) are etched to pattern the top BARC, in which the patterned photo resist is used as an etching mask. The top BARC is used as an etching mask to etching an underlying layer.

公开(公告)号：US10163718B2

公开(公告)日：2018-12-25

申请号：US15699643

申请日：2017-09-08

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Po-Hsueh Li ,  Chih-Yang Yeh ,  Chun-Chan Hsiao ,  Kuan-Lin Yeh ,  Yuan-Sheng Huang

IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L29/423 ,  H01L29/49 ,  H01L21/8238

Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure is formed over a substrate. A first insulating layer is formed over the dummy gate structure. The dummy gate structure is removed so as to form a gate space in the first insulating layer. A first conductive layer is formed in the gate space so as to form a reduced gate space. The reduced gate space is filled with a second conductive layer made of a different material from the first conductive layer. The filled first conductive layer and the second conductive layer are recessed so as to form a first gate recess. A third conductive layer is formed over the first conductive layer and the second conductive layer in the first gate recess. After recessing the filled first conductive layer and the second conductive layer, the second conductive layer protrudes from the first conductive layer.

公开(公告)号：US20210035810A1

公开(公告)日：2021-02-04

申请号：US17073847

申请日：2020-10-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Hsuan Chen ,  Yuan-Sheng Huang

IPC: H01L21/308 ,  H01L21/8234 ,  H01L21/3213

Abstract: A method includes forming a polymer layer on a patterned photo resist. The polymer layer extends into an opening in the patterned photo resist. The polymer layer is etched to expose the patterned photo resist. The polymer layer and a top Bottom Anti-Reflective Coating (BARC) are etched to pattern the top BARC, in which the patterned photo resist is used as an etching mask. The top BARC is used as an etching mask to etching an underlying layer.

公开(公告)号：US09779997B2

公开(公告)日：2017-10-03

申请号：US15068409

申请日：2016-03-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Po-Hsueh Li ,  Chih-Yang Yeh ,  Chun-Chan Hsiao ,  Kuan-Lin Yeh ,  Yuan-Sheng Huang

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/49 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L21/823456 ,  H01L21/823431 ,  H01L21/823842 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66545

Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure is formed over a substrate. A first insulating layer is formed over the dummy gate structure. The dummy gate structure is removed so as to form a gate space in the first insulating layer. A first conductive layer is formed in the gate space so as to form a reduced gate space. The reduced gate space is filled with a second conductive layer made of a different material from the first conductive layer. The filled first conductive layer and the second conductive layer are recessed so as to form a first gate recess. A third conductive layer is formed over the first conductive layer and the second conductive layer in the first gate recess. After recessing the filled first conductive layer and the second conductive layer, the second conductive layer protrudes from the first conductive layer.

公开(公告)号：US12170320B2

公开(公告)日：2024-12-17

申请号：US18309564

申请日：2023-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chia Tai ,  Ju-Yuan Tzeng ,  Hsin-Che Chiang ,  Yuan-Sheng Huang ,  Chun-Sheng Liang

IPC: H01L29/417 ,  H01L21/3065 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78

Abstract: A method of applying and then removing a protective layer over a portion of a gate stack is provided. The protective layer is deposited and then a plasma precursor is separated into components. Neutral radicals are then utilized in order to remove the protective layer. In some embodiments the removal also forms a protective by-product which helps to protect underlying layers from damage during the etching process.

公开(公告)号：US11670695B2

公开(公告)日：2023-06-06

申请号：US17232644

申请日：2021-04-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chia Tai ,  Ju-Yuan Tzeng ,  Hsin-Che Chiang ,  Yuan-Sheng Huang ,  Chun-Sheng Liang

IPC: H01L29/417 ,  H01L29/66 ,  H01L21/3065 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/78

CPC classification number: H01L29/41791 ,  H01L21/3065 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of applying and then removing a protective layer over a portion of a gate stack is provided. The protective layer is deposited and then a plasma precursor is separated into components. Neutral radicals are then utilized in order to remove the protective layer. In some embodiments the removal also forms a protective by-product which helps to protect underlying layers from damage during the etching process.

公开(公告)号：US20220357603A1

公开(公告)日：2022-11-10

申请号：US17391285

申请日：2021-08-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yuan-Sheng Huang

IPC: G02F1/025 ,  G02F1/015

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure comprising a waveguide. The waveguide has an input region and an output region. The input region is configured to receive light. The waveguide comprises a lower doped structure comprising a first doping type and a plurality of doped pillar structures disposed within the lower doped structure. The doped pillar structures comprise a second doping type opposite the first doping type. The doped pillar structures extend from a top surface of the lower doped structure to a point below the top surface of the lower doped structure.

公开(公告)号：US11348800B2

公开(公告)日：2022-05-31

申请号：US17073847

申请日：2020-10-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Hsuan Chen ,  Yuan-Sheng Huang

IPC: H01L21/308 ,  H01L21/8234 ,  H01L21/3213

Abstract: A method includes forming a polymer layer on a patterned photo resist. The polymer layer extends into an opening in the patterned photo resist. The polymer layer is etched to expose the patterned photo resist. The polymer layer and a top Bottom Anti-Reflective Coating (BARC) are etched to pattern the top BARC, in which the patterned photo resist is used as an etching mask. The top BARC is used as an etching mask to etching an underlying layer.

公开(公告)号：US20210234013A1

公开(公告)日：2021-07-29

申请号：US17232644

申请日：2021-04-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Chia Tai ,  Ju-Yuan Tzeng ,  Hsin-Che Chiang ,  Yuan-Sheng Huang ,  Chun-Sheng Liang

IPC: H01L29/417 ,  H01L29/66 ,  H01L21/3065 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/78

Abstract: A method of applying and then removing a protective layer over a portion of a gate stack is provided. The protective layer is deposited and then a plasma precursor is separated into components. Neutral radicals are then utilized in order to remove the protective layer. In some embodiments the removal also forms a protective by-product which helps to protect underlying layers from damage during the etching process.

公开(公告)号：US20230268404A1

公开(公告)日：2023-08-24

申请号：US18309564

申请日：2023-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Ming-Chia Tai ,  Ju-Yuan Tzeng ,  Hsin-Che Chiang ,  Yuan-Sheng Huang ,  Chun-Sheng Liang

IPC: H01L29/417 ,  H01L29/66 ,  H01L21/3065 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/78

CPC classification number: H01L29/41791 ,  H01L29/66795 ,  H01L21/3065 ,  H01L27/0886 ,  H01L21/823431 ,  H01L29/785

Abstract: A method of applying and then removing a protective layer over a portion of a gate stack is provided. The protective layer is deposited and then a plasma precursor is separated into components. Neutral radicals are then utilized in order to remove the protective layer. In some embodiments the removal also forms a protective by-product which helps to protect underlying layers from damage during the etching process.