公开(公告)号：US10957652B2

公开(公告)日：2021-03-23

申请号：US16790625

申请日：2020-02-13

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Yuichi Sugiyama ,  Masashi Miyazaki ,  Yoshiki Hamada

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/13 ,  H01L23/31 ,  H01L25/16 ,  H01L23/34

Abstract: A circuit board includes a core layer including a plurality of metal layers laminated one over another, a bottommost metal layer of the plurality of metal layers being thickest, and a topmost metal layer of the plurality of metal layer being thinnest; an upper insulating layer and an upper conductive pattern provided over a top surface of the core layer; and a lower insulating layer and a lower conductive pattern provided below a bottom surface of the core layer, wherein the topmost metal layer of the core metal layer is patterned to have a prescribed shaped section that serves as wiring and that is connected to the upper conductive pattern, wherein a metal ratio that is defined as a ratio of an area that is formed of metal relative to an entire area in a plan view is higher in the bottommost metal layer than in the topmost metal layer.

公开(公告)号：US10607940B2

公开(公告)日：2020-03-31

申请号：US16057655

申请日：2018-08-07

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Yuichi Sugiyama ,  Masashi Miyazaki ,  Yoshiki Hamada

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/13 ,  H01L21/48 ,  H01L25/16 ,  H01L23/34

Abstract: A semiconductor module includes a metal core layer that includes: a first metal layer and a second metal layer on the first metal layer, wherein a portion of the second metal layer is removed to expose a surface of the first metal layer, the removed portion of the second metal layer defining a cavity in the metal core layer having the exposed surface of the first metal layer as a bottom surface, and at least one of a side wall and the bottom surface of the cavity has a smoother surface profile than a surface of the first metal layer that is not exposed by the cavity and under the second metal layer; and a semiconductor element provided in the cavity, affixed to the bottom surface of the cavity with a fixing material containing a resin component.

公开(公告)号：US09713259B2

公开(公告)日：2017-07-18

申请号：US14511984

申请日：2014-10-10

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Yoshiki Hamada ,  Hiroshi Nakamura

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/46

CPC classification number: H05K1/185 ,  H05K1/0215 ,  H05K1/0242 ,  H05K3/4608 ,  H05K3/4697

Abstract: A circuit substrate having a built-in component includes a core layer that is a conductive layer in which a penetrating hole is formed. A component is disposed in this penetrating hole. A signal wiring line that transmits high frequency signals is formed in a conductive layer facing the core layer on an area projected in the thickness direction of the penetrating hole. The component is provided with a ground conductor functioning as ground that is formed on at least a portion of the area projected in the thickness direction of the signal wiring line.

公开(公告)号：US09560743B2

公开(公告)日：2017-01-31

申请号：US13872381

申请日：2013-04-29

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Yoshiki Hamada ,  Yuichi Sugiyama ,  Akihiro Hoshino

IPC: H05K1/11 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K1/0253 ,  H05K1/0225 ,  H05K1/0228 ,  H05K1/185 ,  H05K2201/09236 ,  H05K2201/0979

Abstract: A multilayer circuit substrate obtained by alternately stacking conductor layers and insulator layers. The conductor layers include a core layer having a greater thickness than any of the other conductor layers and located in an inner layer of the multilayer circuit substrate. A first conductor layer facing the core layer through an insulator layer has first signal wires that transmit high frequency signals, and through-holes are formed in the core layer along the first signal wires in a location facing the first signal wires.

Abstract translation: 通过交替堆叠导体层和绝缘体层而获得的多层电路基板。 导体层包括具有比任何其它导体层更大的厚度并且位于多层电路基板的内层中的芯层。 通过绝缘体层面向芯层的第一导体层具有传输高频信号的第一信号线，并且在面向第一信号线的位置沿着第一信号线在芯层中形成通孔。

公开(公告)号：US09484372B2

公开(公告)日：2016-11-01

申请号：US14960094

申请日：2015-12-04

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Yuichi Sugiyama ,  Masashi Miyazaki ,  Yoshiki Hamada

IPC: H01L31/0203 ,  H01L27/146

CPC classification number: H01L27/14618 ,  H01L24/32 ,  H01L27/14607 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14685 ,  H01L31/0203 ,  H01L2224/05553 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2924/10155 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A substrate for embedding an imaging device includes: a core layer; a first multilayered wiring layer that is formed onto the core layer, the core layer and the first multilayered wiring layer having a cavity penetrating therethrough; a second multilayered wiring layer that is formed onto the core layer on a side opposite to the first multilayered wiring layer and that includes a conductive pattern formed at a position facing the cavity; a resin portion that is arranged inside the cavity and includes a bottom surface supported by the second multilayered wiring layer, a side face supported by the core layer, and a curved surface formed on a side opposite to the bottom surface; and an imaging device adhered along the curved surface inside the cavity.

Abstract translation: 用于嵌入成像装置的基板包括：芯层; 形成在所述芯层上的第一多层布线层，所述芯层和所述第一多层布线层具有穿透其中的空腔; 第二多层布线层，形成在与第一多层布线层相反的一侧的芯层上，并且包括形成在面向空腔的位置处的导电图案; 布置在所述空腔内的树脂部分，其包括由所述第二多层布线层支撑的底面，由所述芯层支撑的侧面和形成在与所述底面相反的一侧的曲面; 以及沿着腔内的弯曲表面粘附的成像装置。

公开(公告)号：US08988885B2

公开(公告)日：2015-03-24

申请号：US14073287

申请日：2013-11-06

Applicant: Taiyo Yuden Co., Ltd.

Inventor： Tatsuro Sawatari ,  Masashi Miyazaki ,  Yoshiki Hamada ,  Yuichi Sugiyama ,  Kazuaki Ida

IPC: H05K5/00 ,  H05K9/00 ,  H01L23/552 ,  H01L21/56 ,  H01L23/00

CPC classification number: H05K9/00 ,  H01L21/561 ,  H01L23/552 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/19105 ,  Y10T29/49146 ,  H01L2224/81

Abstract: An electronic circuit module includes a substrate with built-in component, a mount component mounted on the substrate with built-in component, a sealing portion covering the mount component, and a shield made of a conductive synthetic resin covering the sealing portion. The substrate with built-in component has a core layer made of a metal, an outer cover made of an insulating synthetic resin, and a first protrusion. The core layer has corners and side faces. The outer cover covers the corners and the side faces, and has a first surface. The first protrusion has a first end face exposed at the outer cover and a second surface adjacent to the first surface, and is formed away from the corners of the side faces to protrude outwardly. The sealing portion covers the mount component. The shield covers the sealing portion, and has a third surface bonded to the first surface and the second surface.

Abstract translation: 电子电路模块包括具有内置部件的基板，安装在具有内置部件的基板上的安装部件，覆盖安装部件的密封部分和覆盖密封部分的导电合成树脂制成的屏蔽。 具有内置部件的基板具有由金属制成的芯层，由绝缘合成树脂制成的外盖和第一突起。 芯层有拐角和侧面。 外盖覆盖角部和侧面，并且具有第一表面。 第一突起具有在外盖处露出的第一端面和与第一表面相邻的第二表面，并且远离侧面的角部形成以向外突出。 密封部分覆盖安装部件。 护罩覆盖密封部分，并且具有结合到第一表面和第二表面的第三表面。