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    DIAGNOSIS PROCESSING DEVICE, DIAGNOSIS PROCESSING SYSTEM, DIAGNOSIS PROCESSING METHOD, DIAGNOSIS PROCESSING PROGRAM AND COMPUTER-READABLE RECORDING MEDIUM, AND CLASSIFICATION PROCESSING DEVICE
    1.
    发明申请
    DIAGNOSIS PROCESSING DEVICE, DIAGNOSIS PROCESSING SYSTEM, DIAGNOSIS PROCESSING METHOD, DIAGNOSIS PROCESSING PROGRAM AND COMPUTER-READABLE RECORDING MEDIUM, AND CLASSIFICATION PROCESSING DEVICE 有权
    诊断处理装置，诊断处理系统，诊断处理方法，诊断处理程序和计算机可读记录介质以及分类处理装置

    公开(公告)号：US20120183187A1

    公开(公告)日：2012-07-19

    申请号：US13496391

    申请日：2010-08-16

    申请人： Takahiro Sasaki ,  Satoru Kishida ,  Kentaro Kinoshita

    发明人： Takahiro Sasaki ,  Satoru Kishida ,  Kentaro Kinoshita

    IPC分类号： G06K9/62

    CPC分类号： G06T7/0012 ,  G06F19/00 ,  G06K2209/053 ,  G06T2207/10116 ,  G06T2207/20084 ,  G06T2207/30064 ,  G16H50/20

    摘要： A diagnosis processing device is provided in which diagnosis is realizable by a simple arrangement. A diagnosis processing device (1) of the present invention includes: a learning pattern creating section (10a) for creating a learning pattern by sampling data from a learning image in which abnormality information indicating a substantive feature of abnormality of a target is pre-known; a learning processing section (12) for causing a neural network (17) to learn, by using learning patterns; a diagnostic pattern creating section (10b) for creating a diagnostic pattern by sampling data from a diagnostic image in which abnormality information is unknown; a determination processing section (18) for determining a substantive feature of the abnormality of the target indicated in the abnormality information in the diagnostic image, based on an output value outputted, in response to an input of the diagnostic pattern, from a learned neural network (17) which is a neural network subjected to learning.

    摘要翻译： 提供一种诊断处理装置，其中可以通过简单的布置来实现诊断。 本发明的诊断处理装置（1）包括：学习图案生成部（10a），其通过从表示目标的异常的实质特征的异常信息被预先知晓的学习图像进行采样来创建学习模式 ; 学习处理部（12），用于使神经网络（17）通过使用学习模式学习; 诊断图案生成部（10b），用于通过从异常信息未知的诊断图像中取样数据来生成诊断图案; 确定处理部（18），用于基于从所述诊断图案的输入而输出的输出值，从所学习的神经网络中确定所述诊断图像中的异常信息中指示的所述目标的异常的实质特征 （17），它是受到学习的神经网络。

    Diagnosis processing device, diagnosis processing system, diagnosis processing method, diagnosis processing program and computer-readable recording medium, and classification processing device
    2.
    发明授权
    Diagnosis processing device, diagnosis processing system, diagnosis processing method, diagnosis processing program and computer-readable recording medium, and classification processing device 有权
    诊断处理装置，诊断处理系统，诊断处理方法，诊断处理程序和计算机可读记录介质以及分类处理装置

    公开(公告)号：US08798345B2

    公开(公告)日：2014-08-05

    申请号：US13496391

    申请日：2010-08-16

    申请人： Takahiro Sasaki ,  Satoru Kishida ,  Kentaro Kinoshita

    发明人： Takahiro Sasaki ,  Satoru Kishida ,  Kentaro Kinoshita

    IPC分类号： G06K9/00 ,  G06K9/62

    CPC分类号： G06T7/0012 ,  G06F19/00 ,  G06K2209/053 ,  G06T2207/10116 ,  G06T2207/20084 ,  G06T2207/30064 ,  G16H50/20

    摘要： A diagnosis processing device is provided in which diagnosis is realizable by a simple arrangement. A diagnosis processing device (1) of the present invention includes: a learning pattern creating section (10a) for creating a learning pattern by sampling data from a learning image in which abnormality information indicating a substantive feature of abnormality of a target is pre-known; a learning processing section (12) for causing a neural network (17) to learn, by using learning patterns; a diagnostic pattern creating section (10b) for creating a diagnostic pattern by sampling data from a diagnostic image in which abnormality information is unknown; a determination processing section (18) for determining a substantive feature of the abnormality of the target indicated in the abnormality information in the diagnostic image, based on an output value outputted, in response to an input of the diagnostic pattern, from a learned neural network (17) which is a neural network subjected to learning.

    摘要翻译： 提供一种诊断处理装置，其中可以通过简单的布置来实现诊断。 本发明的诊断处理装置（1）包括：学习图案生成部（10a），用于通过从表示目标的异常的实质特征的异常信息是已知的学习图像进行采样来创建学习模式 ; 学习处理部（12），用于使神经网络（17）通过使用学习模式学习; 诊断图案生成部（10b），用于通过从异常信息未知的诊断图像中取样数据来生成诊断图案; 确定处理部（18），用于基于从所述诊断图案的输入而输出的输出值，从所学习的神经网络中确定所述诊断图像中的异常信息中指示的所述目标的异常的实质特征 （17），它是受到学习的神经网络。

    METHOD OF MANUFACTURING RESISTANCE CHANGE ELEMENT
    5.
    发明申请
    METHOD OF MANUFACTURING RESISTANCE CHANGE ELEMENT 失效
    制造电阻变化元件的方法

    公开(公告)号：US20100083487A1

    公开(公告)日：2010-04-08

    申请号：US12519805

    申请日：2009-06-18

    申请人： Hideyuki Noshiro ,  Kentaro Kinoshita

    发明人： Hideyuki Noshiro ,  Kentaro Kinoshita

    IPC分类号： H01C17/06

    CPC分类号： H01L45/04 ,  H01L27/101 ,  H01L27/2436 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1675 ,  Y10T29/49099 ,  Y10T29/49124 ,  Y10T29/49155

    摘要： In a resistance change memory (ReRAM) storing data by utilizing change in resistance of a resistance change element, a transistor T, interlayer insulating films, W plugs and the like are formed on a semiconductor substrate. Thereafter, a Pt film serving as a lower electrode of the resist change element is formed and a transition metal film (Ni film) is formed on the Pt film. After that, the surface of the transition metal film is oxidized to form a transition metal oxide film and a Pt film serving as an upper electrode is formed on the transition metal oxide film.

    摘要翻译： 在通过利用电阻变化元件的电阻的变化来存储数据的电阻变化存储器（ReRAM）中，在半导体衬底上形成晶体管T，层间绝缘膜，W插头等。 此后，形成用作抗蚀剂改变元件的下电极的Pt膜，并在Pt膜上形成过渡金属膜（Ni膜）。 之后，过渡金属膜的表面被氧化以形成过渡金属氧化物膜，并且在过渡金属氧化物膜上形成用作上部电极的Pt膜。

    Method of writing into semiconductor memory device
    6.
    发明授权
    Method of writing into semiconductor memory device 有权
    写入半导体存储器件的方法

    公开(公告)号：US07643328B2

    公开(公告)日：2010-01-05

    申请号：US12104018

    申请日：2008-04-16

    申请人： Tetsuro Tamura ,  Kentaro Kinoshita

    发明人： Tetsuro Tamura ,  Kentaro Kinoshita

    IPC分类号： G11C11/00

    CPC分类号： H01L27/101 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2013/0092 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/79 ,  H01L27/24

    摘要： An NMOS transistor 14 having one end connected to one end of a resistance memory element 10 is provided, and when a voltage is applied to the resistance memory element 10 via the NMOS transistor 14 to switch the resistance memory element 10 from the low resistance state to the high resistance state, the gate voltage of the NMOS transistor 14 is set at a value which is equal to or greater than the total of the reset voltage of the resistance memory element 10 and the threshold voltage of the NMOS transistor 14 and is smaller than the total of the set voltage of the resistance memory element 10 and the threshold voltage of the NMOS transistor 14, whereby the voltage applied to the resistance memory element 10 is set at a value which is equal to or greater than the reset voltage and is smaller than the set voltage.

    摘要翻译： 提供一个连接到电阻存储器元件10的一端的NMOS晶体管14，并且当经由NMOS晶体管14将电压施加到电阻存储元件10以将电阻存储元件10从低电阻状态切换到 高电阻状态时，NMOS晶体管14的栅极电压被设定为等于或大于电阻存储元件10的复位电压和NMOS晶体管14的阈值电压的总和的值，并且小于 电阻存储元件10的设定电压的总和和NMOS晶体管14的阈值电压的总和，由此施加到电阻存储元件10的电压被设置为等于或大于复位电压并且更小的值 比设定电压。

    Method of manufacturing resistance change element
    7.
    发明授权
    Method of manufacturing resistance change element 失效
    制造电阻变化元件的方法

    公开(公告)号：US08533938B2

    公开(公告)日：2013-09-17

    申请号：US12519805

    申请日：2009-06-18

    申请人： Hideyuki Noshiro ,  Kentaro Kinoshita

    发明人： Hideyuki Noshiro ,  Kentaro Kinoshita

    IPC分类号： H01C17/06

    CPC分类号： H01L45/04 ,  H01L27/101 ,  H01L27/2436 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1675 ,  Y10T29/49099 ,  Y10T29/49124 ,  Y10T29/49155

    摘要： In a resistance change memory (ReRAM) storing data by utilizing change in resistance of a resistance change element, a transistor T, interlayer insulating films, W plugs and the like are formed on a semiconductor substrate. Thereafter, a Pt film serving as a lower electrode of the resist change element is formed and a transition metal film (Ni film) is formed on the Pt film. After that, the surface of the transition metal film is oxidized to form a transition metal oxide film and a Pt film serving as an upper electrode is formed on the transition metal oxide film.

    摘要翻译： 在通过利用电阻变化元件的电阻的变化来存储数据的电阻变化存储器（ReRAM）中，在半导体衬底上形成晶体管T，层间绝缘膜，W插头等。 此后，形成用作抗蚀剂改变元件的下电极的Pt膜，并在Pt膜上形成过渡金属膜（Ni膜）。 之后，过渡金属膜的表面被氧化以形成过渡金属氧化物膜，并且在过渡金属氧化物膜上形成用作上部电极的Pt膜。

    Resistance memory element and nonvolatile semiconductor memory
    8.
    发明授权
    Resistance memory element and nonvolatile semiconductor memory 有权
    电阻存储元件和非易失性半导体存储器

    公开(公告)号：US07668002B2

    公开(公告)日：2010-02-23

    申请号：US12021318

    申请日：2008-01-29

    申请人： Kentaro Kinoshita ,  Tetsuro Tamura

    发明人： Kentaro Kinoshita ,  Tetsuro Tamura

    IPC分类号： G11C7/00

    CPC分类号： H01L27/101 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2013/009 ,  G11C2213/32 ,  G11C2213/56 ,  G11C2213/79 ,  H01L27/2436 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1675

    摘要： A resistance memory element, which memorizes a high resistance state and a low resistance state and switches between the high resistance state and the low resistance state by an application of a voltage, includes a pair of electrodes and a resistance memory layer sandwiched between the pair of electrodes and including a first layer of a first resistance memory material and a second layer of a second resistance memory material. The current value of the resistance memory element in the writing operation can be drastically decreased, and a nonvolatile semiconductor memory device of high integration and low electric power consumption can be formed.

    摘要翻译： 存储高电阻状态和低电阻状态并通过施加电压在高电阻状态和低电阻状态之间切换的电阻存储元件包括一对电极和夹在所述一对电极之间的电阻存储器层 电极并且包括第一电阻存储材料的第一层和第二电阻存储材料的第二层。 可以大大降低写入操作中的电阻存储元件的电流值，并且可以形成高集成度和低功耗的非易失性半导体存储器件。

    Nonvolatile semiconductor memory device and reading method of nonvolatile semiconductor memory device
    9.
    发明授权
    Nonvolatile semiconductor memory device and reading method of nonvolatile semiconductor memory device 失效
    非易失性半导体存储器件和非易失性半导体存储器件的读取方法

    公开(公告)号：US08248837B2

    公开(公告)日：2012-08-21

    申请号：US12553172

    申请日：2009-09-03

    申请人： Kentaro Kinoshita

    发明人： Kentaro Kinoshita

    IPC分类号： G11C11/00

    CPC分类号： G11C13/003 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/31 ,  G11C2213/74 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/2436 ,  H01L27/2463

    摘要： A nonvolatile semiconductor memory device includes a memory cell including a resistance memory element which memorizes a high resistance state or a low resistance state, switches the high resistance state and the low resistance state by voltage application, one end of the resistance memory element being coupled to a bit line, the other end of the resistance memory element being coupled to a source line via the first transistor; and a resistor whose resistance value is higher than a resistance value of the resistance memory element in the low resistance state and lower than a resistance value of the resistance memory element in the high resistance state, one end of the resistor being coupled to said one end of the resistance memory element and the bit line, the other end of the resistor being coupled to the source line via the second transistor.

    摘要翻译： 非易失性半导体存储器件包括存储单元，其包括存储高电阻状态或低电阻状态的电阻存储元件，通过施加电压来切换高电阻状态和低电阻状态，电阻存储元件的一端耦合到 位线，电阻存储元件的另一端经由第一晶体管耦合到源极线; 以及电阻值比电阻值低于电阻状态的电阻值的电阻值，低于高电阻状态下的电阻值存储元件的电阻值的电阻，其一端与所述一端 的电阻存储器元件和位线，电阻器的另一端经由第二晶体管耦合到源极线。