公开(公告)号：US20060267100A1

公开(公告)日：2006-11-30

申请号：US11430117

申请日：2006-05-09

申请人： Takashi Noguchi ,  Hans Cho ,  Wenxu Xianyu ,  Do-young Kim ,  Jang-yeong Kwon ,  Huaxiang Yin ,  Kyung-bae Park ,  Xiaozin Zhang

发明人： Takashi Noguchi ,  Hans Cho ,  Wenxu Xianyu ,  Do-young Kim ,  Jang-yeong Kwon ,  Huaxiang Yin ,  Kyung-bae Park ,  Xiaozin Zhang

IPC分类号： H01L27/12

CPC分类号： H01L21/84 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/7842 ,  Y10S257/903

摘要： A semiconductor device including a substrate, a P-MOS single crystal TFT formed on the substrate, and an N-MOS single crystal TFT formed on the P-MOS single crystal TFT. The source region of the P-MOS single crystal TFT and the source region of the N-MOS single crystal TFT may be connected to each other. The P-MOS single crystal TFT and the N-MOS single crystal TFT may share a common gate. Also, the P-MOS single crystal TFT may include a single crystal silicon layer with a crystal plane of (100) and a crystal direction of . The N-MOS single crystal TFT may include a single crystal silicon layer having the same crystal direction as the single crystal silicon layer of the P-MOS single crystal TFT and having a tensile stress greater than the single crystal silicon layer of the P-MOS single crystal TFT.

摘要翻译： 包括基板，形成在基板上的P-MOS单晶TFT的半导体器件和形成在P-MOS单晶TFT上的N-MOS单晶TFT。 P-MOS单晶TFT的源极区域和N-MOS单晶TFT的源极区域可以彼此连接。 P-MOS单晶TFT和N-MOS单晶TFT可以共用公共栅极。 此外，P-MOS单晶TFT可以包括具有（100）的晶面和<100>的晶体方向的单晶硅层。 N-MOS单晶TFT可以包括与P-MOS单晶TFT的单晶硅层相同的晶体方向的单晶硅层，其拉应力大于P-MOS的单晶硅层 单晶TFT。

公开(公告)号：US07772711B2

公开(公告)日：2010-08-10

申请号：US11430117

申请日：2006-05-09

申请人： Takashi Noguchi ,  Hans S. Cho ,  Wenxu Xianyu ,  Do-young Kim ,  Jang-yeong Kwon ,  Huaxiang Yin ,  Kyung-bae Park ,  Xiaoxin Zhang

发明人： Takashi Noguchi ,  Hans S. Cho ,  Wenxu Xianyu ,  Do-young Kim ,  Jang-yeong Kwon ,  Huaxiang Yin ,  Kyung-bae Park ,  Xiaoxin Zhang

IPC分类号： H01L27/11

CPC分类号： H01L21/84 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/7842 ,  Y10S257/903

摘要： A semiconductor device including a substrate, a P-MOS single crystal TFT formed on the substrate, and an N-MOS single crystal TFT formed on the P-MOS single crystal TFT. The source region of the P-MOS single crystal TFT and the source region of the N-MOS single crystal TFT may be connected to each other. The P-MOS single crystal TFT and the N-MOS single crystal TFT may share a common gate. Also, the P-MOS single crystal TFT may include a single crystal silicon layer with a crystal plane of (100) and a crystal direction of . The N-MOS single crystal TFT may include a single crystal silicon layer having the same crystal direction as the single crystal silicon layer of the P-MOS single crystal TFT and having a tensile stress greater than the single crystal silicon layer of the P-MOS single crystal TFT.

摘要翻译： 包括基板，形成在基板上的P-MOS单晶TFT的半导体器件和形成在P-MOS单晶TFT上的N-MOS单晶TFT。 P-MOS单晶TFT的源极区域和N-MOS单晶TFT的源极区域可以彼此连接。 P-MOS单晶TFT和N-MOS单晶TFT可以共用公共栅极。 此外，P-MOS单晶TFT可以包括具有（100）的晶面并且晶体方向<100的单晶硅层。 N-MOS单晶TFT可以包括与P-MOS单晶TFT的单晶硅层相同的晶体方向的单晶硅层，其拉应力大于P-MOS的单晶硅层 单晶TFT。

公开(公告)号：US20090162981A1

公开(公告)日：2009-06-25

申请号：US12372541

申请日：2009-02-17

申请人： Huaxiang YIN ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim

发明人： Huaxiang YIN ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim

IPC分类号： H01L21/84

CPC分类号： H01L29/785 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/7855

摘要： A thin film transistor and a method of manufacturing the same are provided. The thin film transistor includes a substrate; a buffer layer formed on the substrate; a source and a drain spaced apart from each other on the buffer layer; a channel layer formed on the buffer layer to connect the source and the drain with each other; and a gate formed on the buffer layer to be spaced apart from the source, the drain and the channel layer.

摘要翻译： 提供薄膜晶体管及其制造方法。 薄膜晶体管包括基板; 形成在所述基板上的缓冲层; 在缓冲层上彼此间隔开的源极和漏极; 形成在所述缓冲层上的沟道层，以将所述源极和所述漏极彼此连接; 以及形成在缓冲层上以与源极，漏极和沟道层间隔开的栅极。

公开(公告)号：US20050145843A1

公开(公告)日：2005-07-07

申请号：US11013398

申请日：2004-12-17

申请人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim

发明人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim

IPC分类号： H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49 ,  H01L29/786 ,  H01L29/04 ,  H01L21/00

CPC分类号： H01L29/785 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/7855

摘要： A thin film transistor and a method of manufacturing the same are provided. The thin film transistor includes a substrate; a buffer layer formed on the substrate; a source and a drain spaced apart from each other on the buffer layer; a channel layer formed on the buffer layer to connect the source and the drain with each other; and a gate formed on the buffer layer to be spaced apart from the source, the drain and the channel layer.

摘要翻译： 提供薄膜晶体管及其制造方法。 薄膜晶体管包括基板; 形成在所述基板上的缓冲层; 在缓冲层上彼此间隔开的源极和漏极; 形成在所述缓冲层上的沟道层，以将所述源极和所述漏极彼此连接; 以及形成在缓冲层上以与源极，漏极和沟道层间隔开的栅极。

公开(公告)号：US20060220034A1

公开(公告)日：2006-10-05

申请号：US11369947

申请日：2006-03-08

申请人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim ,  Ji-sim Jung ,  Jang-yeon Kwon

发明人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim ,  Ji-sim Jung ,  Jang-yeon Kwon

IPC分类号： H01L33/00

CPC分类号： H01L29/66757 ,  H01L29/4908

摘要： A thin film transistor and a method of manufacturing the thin film transistor. The thin film transistor may include a substrate, a buffer layer, a polysilicon layer, a gate insulating layer and/or a gate electrode, and a capping layer. The buffer layer may be formed on the substrate. The polysilicon layer may be formed on the buffer layer, and may include a first doped region, a second doped region, and a channel region. The gate insulating layer and a gate electrode may be sequentially stacked on the channel region of the polysilicon layer. The capping layer may be stacked on the gate electrode.

摘要翻译： 一种薄膜晶体管及其制造方法。 薄膜晶体管可以包括衬底，缓冲层，多晶硅层，栅极绝缘层和/或栅电极以及覆盖层。 缓冲层可以形成在衬底上。 多晶硅层可以形成在缓冲层上，并且可以包括第一掺杂区域，第二掺杂区域和沟道区域。 栅极绝缘层和栅电极可以顺序堆叠在多晶硅层的沟道区上。 覆盖层可以堆叠在栅电极上。

公开(公告)号：US20060099778A1

公开(公告)日：2006-05-11

申请号：US11267264

申请日：2005-11-07

申请人： Jang-yeon Kwon ,  Hyuk Lim ,  Takashi Noguchi ,  Young-soo Park ,  Suk-pil Kim ,  Hans Cho ,  Ji-sim Jung ,  Kyung-bae Park ,  Do-young Kim

发明人： Jang-yeon Kwon ,  Hyuk Lim ,  Takashi Noguchi ,  Young-soo Park ,  Suk-pil Kim ,  Hans Cho ,  Ji-sim Jung ,  Kyung-bae Park ,  Do-young Kim

IPC分类号： H01L21/20

CPC分类号： H01L29/66765 ,  C23C14/3464 ,  C23C14/46 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02631

摘要： A method of preparing a semiconductor film on a substrate is disclosed. The method includes arranging an insulating substrate in a deposition chamber and depositing a semiconductor film onto the insulating substrate using ion beam deposition, wherein a temperature of the insulating substrate during the depositing does not exceed 250° C. The method can produce a thin film transistor. The disclosed ion beam deposition method forms, at lower temperature and with low impurities, a film morphology with desired smoothness and grain size. Deposition of semiconductor films on low melting point substrates, such as plastic flexible substrates, is enables.

摘要翻译： 公开了一种在衬底上制备半导体膜的方法。 该方法包括在沉积室中布置绝缘衬底，并使用离子束沉积将半导体膜沉积到绝缘衬底上，其中沉积期间绝缘衬底的温度不超过250℃。该方法可以产生薄膜晶体管 。 所公开的离子束沉积方法在较低温度和低杂质下形成具有所需光滑度和晶粒尺寸的膜形态。 能够在诸如塑料柔性基底的低熔点基底上沉积半导体膜。

公开(公告)号：US20050236622A1

公开(公告)日：2005-10-27

申请号：US11100476

申请日：2005-04-07

申请人： Ji-sim Jung ,  Takashi Noguchi ,  Hans Cho ,  Do-young Kim ,  Kyung-bae Park

发明人： Ji-sim Jung ,  Takashi Noguchi ,  Hans Cho ,  Do-young Kim ,  Kyung-bae Park

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78678

摘要： Provided are an electronic device and a method of manufacturing the same. The device includes a plastic substrate, a transparent thermal conductive layer stacked on the plastic substrate, a polysilicon layer stacked on the thermal conductive layer; and a functional device disposed on the polysilicon layer. The functional device is any one of a transistor, a light emitting device, and a memory device. The functional device may be a thin film transistor including a gate stack stacked on the polysilicon layer.

摘要翻译： 提供一种电子设备及其制造方法。 该装置包括塑料基板，层叠在塑料基板上的透明导热层，堆叠在导热层上的多晶硅层; 以及设置在所述多晶硅层上的功能元件。 功能器件是晶体管，发光器件和存储器件中的任何一个。 功能器件可以是包括堆叠在多晶硅层上的栅极堆叠的薄膜晶体管。

公开(公告)号：US20050139919A1

公开(公告)日：2005-06-30

申请号：US10980838

申请日：2004-11-04

申请人： Kyung-bae Park ,  Takashi Noguchi ,  Se-young Cho ,  Do-young Kim ,  Jang-yeon Kwon

发明人： Kyung-bae Park ,  Takashi Noguchi ,  Se-young Cho ,  Do-young Kim ,  Jang-yeon Kwon

IPC分类号： H01L21/20 ,  H01L21/00 ,  H01L21/336 ,  H01L27/01 ,  H01L29/786

CPC分类号： H01L29/66757 ,  H01L29/78603 ,  H01L29/78606

摘要： In a method of forming a polysilicon film, a thin film transistor including a polysilicon film, and a method of manufacturing a thin film transistor including a polysilicon film, the thin film transistor includes a substrate, a first heat conduction film on the substrate, a second heat conduction film adjacent to the first heat conduction film, the second heat conduction film having a lower thermal conductivity than the first heat conduction film, a polysilicon film on the second heat conduction film and the first heat conduction film adjacent to the second heat conduction film, and a gate stack on the polysilicon film. The second heat conduction film may either be on the first heat conduction film or, alternatively, the first heat conduction film may be non-contiguous and the second heat conduction film may be interposed between portions of the non-contiguous first heat conduction film.

摘要翻译： 在形成多晶硅膜的方法中，包括多晶硅膜的薄膜晶体管和包括多晶硅膜的薄膜晶体管的制造方法，薄膜晶体管包括基板，基板上的第一导热膜， 与所述第一导热膜相邻的所述第二导热膜，所述第二导热膜的热导率低于所述第一导热膜，所述第二导热膜上的多晶硅膜和与所述第二导热膜相邻的所述第一导热膜 膜和多晶硅膜上的栅极堆叠。 第二导热膜可以在第一导热膜上，或者第一导热膜可以不连续，并且第二导热膜可以介于不连续的第一导热膜的部分之间。

公开(公告)号：US07923316B2

公开(公告)日：2011-04-12

申请号：US11808521

申请日：2007-06-11

申请人： Kyung-bae Park ,  Takashi Noguchi ,  Se-young Cho ,  Do-young Kim ,  Jang-yeon Kwon

发明人： Kyung-bae Park ,  Takashi Noguchi ,  Se-young Cho ,  Do-young Kim ,  Jang-yeon Kwon

IPC分类号： H01L21/00

CPC分类号： H01L29/66757 ,  H01L29/78603 ,  H01L29/78606

摘要： In a method of forming a polysilicon film, a thin film transistor including a polysilicon film, and a method of manufacturing a thin film transistor including a polysilicon film, the thin film transistor includes a substrate, a first heat conduction film on the substrate, a second heat conduction film adjacent to the first heat conduction film, the second heat conduction film having a lower thermal conductivity than the first heat conduction film, a polysilicon film on the second heat conduction film and the first heat conduction film adjacent to the second heat conduction film, and a gate stack on the polysilicon film. The second heat conduction film may either be on the first heat conduction film or, alternatively, the first heat conduction film may be non-contiguous and the second heat conduction film may be interposed between portions of the non-contiguous first heat conduction film.

摘要翻译： 在形成多晶硅膜的方法中，包括多晶硅膜的薄膜晶体管和包括多晶硅膜的薄膜晶体管的制造方法，薄膜晶体管包括基板，基板上的第一导热膜， 与所述第一导热膜相邻的所述第二导热膜，所述第二导热膜的热导率低于所述第一导热膜，所述第二导热膜上的多晶硅膜和与所述第二导热膜相邻的所述第一导热膜 膜和多晶硅膜上的栅极堆叠。 第二导热膜可以在第一导热膜上，或者第一导热膜可以不连续，并且第二导热膜可以介于不连续的第一导热膜的部分之间。

公开(公告)号：US07563659B2

公开(公告)日：2009-07-21

申请号：US11003326

申请日：2004-12-06

申请人： Jang-yeon Kwon ,  Min-koo Han ,  Se-young Cho ,  Kyung-bae Park ,  Do-young Kim ,  Min-cheol Lee ,  Sang-myeon Han ,  Takashi Noguchi ,  Young-soo Park ,  Ji-sim Jung

发明人： Jang-yeon Kwon ,  Min-koo Han ,  Se-young Cho ,  Kyung-bae Park ,  Do-young Kim ,  Min-cheol Lee ,  Sang-myeon Han ,  Takashi Noguchi ,  Young-soo Park ,  Ji-sim Jung

IPC分类号： H01L21/00

CPC分类号： H01L21/02532 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02354 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/2026 ,  H01L21/31608 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78675

摘要： A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using inductively coupled plasma chemical vapor deposition (ICP-CVD). After the ICP-CVD, excimer laser annealing (ELA) is performed while increasing energy by predetermined steps. A poly-Si active layer and a SiO2 gate insulating layer are deposited at a temperature of about 150° C. using ICP-CVD. The poly-Si has a large grain size of about 3000 Å or more. An interface trap density of the SiO2 can be as high as 1011/cm2. A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.

摘要翻译： 提供一种制造多晶硅薄膜的方法和使用其制造多晶硅TFT的方法。 使用电感耦合等离子体化学气相沉积（ICP-CVD）在低温下形成多晶硅薄膜。 在ICP-CVD之后，在通过预定步骤增加能量的同时进行准分子激光退火（ELA）。 使用ICP-CVD在约150℃的温度下沉积多晶硅有源层和SiO 2栅极绝缘层。 多晶硅的大晶粒尺寸约为3000或更大。 SiO2的界面陷阱密度高达1011 / cm2。 具有良好电特性的晶体管可以在低温下制造，因此可以形成在耐热塑料基板上。