公开(公告)号：US20060099778A1

公开(公告)日：2006-05-11

申请号：US11267264

申请日：2005-11-07

申请人： Jang-yeon Kwon ,  Hyuk Lim ,  Takashi Noguchi ,  Young-soo Park ,  Suk-pil Kim ,  Hans Cho ,  Ji-sim Jung ,  Kyung-bae Park ,  Do-young Kim

发明人： Jang-yeon Kwon ,  Hyuk Lim ,  Takashi Noguchi ,  Young-soo Park ,  Suk-pil Kim ,  Hans Cho ,  Ji-sim Jung ,  Kyung-bae Park ,  Do-young Kim

IPC分类号： H01L21/20

CPC分类号： H01L29/66765 ,  C23C14/3464 ,  C23C14/46 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02631

摘要： A method of preparing a semiconductor film on a substrate is disclosed. The method includes arranging an insulating substrate in a deposition chamber and depositing a semiconductor film onto the insulating substrate using ion beam deposition, wherein a temperature of the insulating substrate during the depositing does not exceed 250° C. The method can produce a thin film transistor. The disclosed ion beam deposition method forms, at lower temperature and with low impurities, a film morphology with desired smoothness and grain size. Deposition of semiconductor films on low melting point substrates, such as plastic flexible substrates, is enables.

摘要翻译： 公开了一种在衬底上制备半导体膜的方法。 该方法包括在沉积室中布置绝缘衬底，并使用离子束沉积将半导体膜沉积到绝缘衬底上，其中沉积期间绝缘衬底的温度不超过250℃。该方法可以产生薄膜晶体管 。 所公开的离子束沉积方法在较低温度和低杂质下形成具有所需光滑度和晶粒尺寸的膜形态。 能够在诸如塑料柔性基底的低熔点基底上沉积半导体膜。

公开(公告)号：US20050236622A1

公开(公告)日：2005-10-27

申请号：US11100476

申请日：2005-04-07

申请人： Ji-sim Jung ,  Takashi Noguchi ,  Hans Cho ,  Do-young Kim ,  Kyung-bae Park

发明人： Ji-sim Jung ,  Takashi Noguchi ,  Hans Cho ,  Do-young Kim ,  Kyung-bae Park

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78678

摘要： Provided are an electronic device and a method of manufacturing the same. The device includes a plastic substrate, a transparent thermal conductive layer stacked on the plastic substrate, a polysilicon layer stacked on the thermal conductive layer; and a functional device disposed on the polysilicon layer. The functional device is any one of a transistor, a light emitting device, and a memory device. The functional device may be a thin film transistor including a gate stack stacked on the polysilicon layer.

摘要翻译： 提供一种电子设备及其制造方法。 该装置包括塑料基板，层叠在塑料基板上的透明导热层，堆叠在导热层上的多晶硅层; 以及设置在所述多晶硅层上的功能元件。 功能器件是晶体管，发光器件和存储器件中的任何一个。 功能器件可以是包括堆叠在多晶硅层上的栅极堆叠的薄膜晶体管。

公开(公告)号：US20090149007A1

公开(公告)日：2009-06-11

申请号：US12370642

申请日：2009-02-13

申请人： Ji-sim JUNG ,  Takashi Noguchi ,  Hans S. Cho ,  Do-young Kim ,  Kyung-bae Park

发明人： Ji-sim JUNG ,  Takashi Noguchi ,  Hans S. Cho ,  Do-young Kim ,  Kyung-bae Park

IPC分类号： H01L21/36

CPC分类号： H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78678

摘要： Provided are an electronic device and a method of manufacturing the same. The device includes a plastic substrate, a transparent thermal conductive layer stacked on the plastic substrate, a polysilicon layer stacked on the thermal conductive layer; and a functional device disposed on the polysilicon layer. The functional device is any one of a transistor, a light emitting device, and a memory device. The functional device may be a thin film transistor including a gate stack stacked on the polysilicon layer.

摘要翻译： 提供一种电子设备及其制造方法。 该装置包括塑料基板，层叠在塑料基板上的透明导热层，堆叠在导热层上的多晶硅层; 以及设置在所述多晶硅层上的功能元件。 功能器件是晶体管，发光器件和存储器件中的任何一个。 功能器件可以是包括堆叠在多晶硅层上的栅极堆叠的薄膜晶体管。

公开(公告)号：US07439197B2

公开(公告)日：2008-10-21

申请号：US11267264

申请日：2005-11-07

申请人： Jang-yeon Kwon ,  Hyuk Lim ,  Takashi Noguchi ,  Young-soo Park ,  Suk-pil Kim ,  Hans S. Cho ,  Ji-sim Jung ,  Kyung-bae Park ,  Do-young Kim

发明人： Jang-yeon Kwon ,  Hyuk Lim ,  Takashi Noguchi ,  Young-soo Park ,  Suk-pil Kim ,  Hans S. Cho ,  Ji-sim Jung ,  Kyung-bae Park ,  Do-young Kim

IPC分类号： H01L21/00 ,  C30B23/00

CPC分类号： H01L29/66765 ,  C23C14/3464 ,  C23C14/46 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02631

摘要： A method of preparing a semiconductor film on a substrate is disclosed. The method includes arranging an insulating substrate in a deposition chamber and depositing a semiconductor film onto the insulating substrate using ion beam deposition, wherein a temperature of the insulating substrate during the depositing does not exceed 250° C. The method can produce a thin film transistor. The disclosed ion beam deposition method forms, at lower temperature and with low impurities, a film morphology with desired smoothness and grain size. Deposition of semiconductor films on low melting point substrates, such as plastic flexible substrates, is enables.

摘要翻译： 公开了一种在衬底上制备半导体膜的方法。 该方法包括在沉积室中布置绝缘衬底，并使用离子束沉积将半导体膜沉积到绝缘衬底上，其中沉积期间绝缘衬底的温度不超过250℃。该方法可以产生薄膜晶体管 。 所公开的离子束沉积方法在较低温度和低杂质下形成具有所需光滑度和晶粒尺寸的膜形态。 能够在诸如塑料柔性基底的低熔点基底上沉积半导体膜。

公开(公告)号：US07563659B2

公开(公告)日：2009-07-21

申请号：US11003326

申请日：2004-12-06

申请人： Jang-yeon Kwon ,  Min-koo Han ,  Se-young Cho ,  Kyung-bae Park ,  Do-young Kim ,  Min-cheol Lee ,  Sang-myeon Han ,  Takashi Noguchi ,  Young-soo Park ,  Ji-sim Jung

发明人： Jang-yeon Kwon ,  Min-koo Han ,  Se-young Cho ,  Kyung-bae Park ,  Do-young Kim ,  Min-cheol Lee ,  Sang-myeon Han ,  Takashi Noguchi ,  Young-soo Park ,  Ji-sim Jung

IPC分类号： H01L21/00

CPC分类号： H01L21/02532 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02354 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/2026 ,  H01L21/31608 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78675

摘要： A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using inductively coupled plasma chemical vapor deposition (ICP-CVD). After the ICP-CVD, excimer laser annealing (ELA) is performed while increasing energy by predetermined steps. A poly-Si active layer and a SiO2 gate insulating layer are deposited at a temperature of about 150° C. using ICP-CVD. The poly-Si has a large grain size of about 3000 Å or more. An interface trap density of the SiO2 can be as high as 1011/cm2. A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.

摘要翻译： 提供一种制造多晶硅薄膜的方法和使用其制造多晶硅TFT的方法。 使用电感耦合等离子体化学气相沉积（ICP-CVD）在低温下形成多晶硅薄膜。 在ICP-CVD之后，在通过预定步骤增加能量的同时进行准分子激光退火（ELA）。 使用ICP-CVD在约150℃的温度下沉积多晶硅有源层和SiO 2栅极绝缘层。 多晶硅的大晶粒尺寸约为3000或更大。 SiO2的界面陷阱密度高达1011 / cm2。 具有良好电特性的晶体管可以在低温下制造，因此可以形成在耐热塑料基板上。

公开(公告)号：US20090298268A1

公开(公告)日：2009-12-03

申请号：US12457586

申请日：2009-06-16

申请人： Jang-yeon Kwon ,  Min-koo Han ,  Se-young Cho ,  Kyung-bae Park ,  Do-young Kim ,  Min-cheol Lee ,  Sang-myeon Han ,  Takashi Noguchi ,  Young-soo Park ,  Ji-sim Jung

发明人： Jang-yeon Kwon ,  Min-koo Han ,  Se-young Cho ,  Kyung-bae Park ,  Do-young Kim ,  Min-cheol Lee ,  Sang-myeon Han ,  Takashi Noguchi ,  Young-soo Park ,  Ji-sim Jung

IPC分类号： H01L21/336 ,  H01L21/205

CPC分类号： H01L21/02532 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02354 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/2026 ,  H01L21/31608 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78675

摘要： A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using ICP-CVD. After the ICP-CVD, ELA is performed while increasing energy by predetermined steps. A poly-Si active layer and a Si02 gate insulating layer are deposited at a temperature of about 150° C. using ICP-CVD. The poly-Si has a large grain size of about 3000 A or more. An interface trap density of the Si02 can be as high as lo∥/cm2. A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.

摘要翻译： 提供一种制造多晶硅薄膜的方法和使用其制造多晶硅TFT的方法。 使用ICP-CVD在低温下形成多晶硅薄膜。 在ICP-CVD之后，在通过预定步骤增加能量的同时执行ELA。 使用ICP-CVD在约150℃的温度下沉积多晶硅有源层和SiO 2栅极绝缘层。 多晶硅具有约3000A以上的大晶粒尺寸。 SiO 2的界面陷阱密度可以高达lo // / cm2。 具有良好电特性的晶体管可以在低温下制造，因此可以形成在耐热塑料基板上。

公开(公告)号：US20060008957A1

公开(公告)日：2006-01-12

申请号：US11003326

申请日：2004-12-06

申请人： Jang-yeon Kwon ,  Min-koo Han ,  Se-young Cho ,  Kyung-bae Park ,  Do-young Kim ,  Min-cheol Lee ,  Sang-myeon Han ,  Takashi Noguchi ,  Young-soo Park ,  Ji-sim Jung

发明人： Jang-yeon Kwon ,  Min-koo Han ,  Se-young Cho ,  Kyung-bae Park ,  Do-young Kim ,  Min-cheol Lee ,  Sang-myeon Han ,  Takashi Noguchi ,  Young-soo Park ,  Ji-sim Jung

IPC分类号： H01L21/205

CPC分类号： H01L21/02532 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02354 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/2026 ,  H01L21/31608 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78675

摘要： A method of fabricating a poly-Si thin film and a method of fabricating a poly-Si TFT using the same are provided. The poly-Si thin film is formed at a low temperature using ICP-CVD. After the ICP-CVD, ELA is performed while increasing energy by predetermined steps. A poly-Si active layer and a SiO2 gate insulating layer are deposited at a temperature of about 150° C. using ICP-CVD. The poly-Si has a large grain size of about 3000 Å or more. An interface trap density of the SiO2 can be as high as 1011/cm2. A transistor having good electrical characteristics can be fabricated at a low temperature and thus can be formed on a heat tolerant plastic substrate.

摘要翻译： 提供一种制造多晶硅薄膜的方法和使用其制造多晶硅TFT的方法。 使用ICP-CVD在低温下形成多晶硅薄膜。 在ICP-CVD之后，在通过预定步骤增加能量的同时执行ELA。 使用ICP-CVD在约150℃的温度下沉积多晶硅有源层和SiO 2/2栅极绝缘层。 多晶硅的大晶粒尺寸约为3000或更大。 SiO 2 2的界面陷阱密度可以高达10-11 / cm 2。 具有良好电特性的晶体管可以在低温下制造，因此可以形成在耐热塑料基板上。

公开(公告)号：US20060267100A1

公开(公告)日：2006-11-30

申请号：US11430117

申请日：2006-05-09

申请人： Takashi Noguchi ,  Hans Cho ,  Wenxu Xianyu ,  Do-young Kim ,  Jang-yeong Kwon ,  Huaxiang Yin ,  Kyung-bae Park ,  Xiaozin Zhang

发明人： Takashi Noguchi ,  Hans Cho ,  Wenxu Xianyu ,  Do-young Kim ,  Jang-yeong Kwon ,  Huaxiang Yin ,  Kyung-bae Park ,  Xiaozin Zhang

IPC分类号： H01L27/12

CPC分类号： H01L21/84 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/1203 ,  H01L29/66772 ,  H01L29/7842 ,  Y10S257/903

摘要： A semiconductor device including a substrate, a P-MOS single crystal TFT formed on the substrate, and an N-MOS single crystal TFT formed on the P-MOS single crystal TFT. The source region of the P-MOS single crystal TFT and the source region of the N-MOS single crystal TFT may be connected to each other. The P-MOS single crystal TFT and the N-MOS single crystal TFT may share a common gate. Also, the P-MOS single crystal TFT may include a single crystal silicon layer with a crystal plane of (100) and a crystal direction of . The N-MOS single crystal TFT may include a single crystal silicon layer having the same crystal direction as the single crystal silicon layer of the P-MOS single crystal TFT and having a tensile stress greater than the single crystal silicon layer of the P-MOS single crystal TFT.

摘要翻译： 包括基板，形成在基板上的P-MOS单晶TFT的半导体器件和形成在P-MOS单晶TFT上的N-MOS单晶TFT。 P-MOS单晶TFT的源极区域和N-MOS单晶TFT的源极区域可以彼此连接。 P-MOS单晶TFT和N-MOS单晶TFT可以共用公共栅极。 此外，P-MOS单晶TFT可以包括具有（100）的晶面和<100>的晶体方向的单晶硅层。 N-MOS单晶TFT可以包括与P-MOS单晶TFT的单晶硅层相同的晶体方向的单晶硅层，其拉应力大于P-MOS的单晶硅层 单晶TFT。

公开(公告)号：US07851280B2

公开(公告)日：2010-12-14

申请号：US12730344

申请日：2010-03-24

申请人： Ji-sim Jung ,  Jany-yeon Kwon ,  Jong-man Kim ,  Kyung-bae Park ,  Takashi Noguchi

发明人： Ji-sim Jung ,  Jany-yeon Kwon ,  Jong-man Kim ,  Kyung-bae Park ,  Takashi Noguchi

IPC分类号： H01L21/00

CPC分类号： H01L27/3244 ,  H01L27/1255 ,  H01L27/3265

摘要： An organic electroluminescent display (“OELD”) includes an organic light-emitting diode (“OLED”), a circuit region, and an interlayer dielectric (“ILD”) layer. The OLED is disposed in each of a plurality of pixels arranged on a substrate. The circuit region includes two or more thin film transistors (“TFTs”) and a storage capacitor. The ILD layer has two or more insulating layers and includes a first region disposed between both electrodes of the storage capacitor and a second region covering the TFTs. At least one of the insulating layers has a window exposing the insulating layer directly beneath the at least one insulating layer so that that the ILD layer is thinner in the first region than in the second region. Accordingly, it is possible to reduce an occupation area of the storage capacitor while maintaining the necessary capacitance of the storage capacitor and expanding the area of the luminescent region.

公开(公告)号：US08058094B2

公开(公告)日：2011-11-15

申请号：US12707115

申请日：2010-02-17

申请人： Takashi Noguchi ,  Jong-man Kim ,  Jang-yeon Kwon ,  Kyung-bae Park ,  Ji-sim Jung ,  Hyuck Lim

发明人： Takashi Noguchi ,  Jong-man Kim ,  Jang-yeon Kwon ,  Kyung-bae Park ,  Ji-sim Jung ,  Hyuck Lim

IPC分类号： H01L21/00

CPC分类号： H01L29/78645 ,  H01L27/1288 ,  H01L27/3244 ,  H01L29/78624 ,  H01L29/78696

摘要： A transistor includes; at least two polycrystalline silicon layers disposed substantially parallel to each other, each polycrystalline silicon layer including a channel region and at least two high conductivity regions disposed at opposing sides of the channel region; a gate which corresponds to the channel region of the two polycrystalline silicon layers and which crosses the two polycrystalline silicon layers, and a gate insulating layer interposed between the gate and the two polycrystalline silicon layers, wherein low conductivity regions are disposed adjacent to one edge of the gate and are formed between the channel region and one high conductivity region of each polycrystalline silicon layer.

摘要翻译： 晶体管包括： 至少两个多晶硅层基本上彼此平行地布置，每个多晶硅层包括沟道区和至少两个设置在沟道区相对侧的高导电性区; 对应于两个多晶硅层的沟道区并与两个多晶硅层交叉的栅极和介于栅极和两个多晶硅层之间的栅极绝缘层，其中低导电性区域邻近 并且形成在每个多晶硅层的沟道区域和一个高导电率区域之间。