公开(公告)号：US20110147753A1

公开(公告)日：2011-06-23

申请号：US13056444

申请日：2009-08-14

申请人： Takashi Onishi ,  Aya Miki ,  Hiroshi Goto ,  Masao Mizuno ,  Hirotaka Ito ,  Katsufumi Tomihisa

发明人： Takashi Onishi ,  Aya Miki ,  Hiroshi Goto ,  Masao Mizuno ,  Hirotaka Ito ,  Katsufumi Tomihisa

IPC分类号： H01L29/04 ,  B32B17/06

CPC分类号： H01L23/53233 ,  C22C9/00 ,  C22C9/01 ,  H01L27/124 ,  H01L2924/0002 ,  Y10T428/265 ,  H01L2924/00

摘要： Disclosed is a Cu alloy film for a display device that has high adhesion to a glass substrate while maintaining a low electric resistance characteristic of Cu-based materials. The Cu alloy film is wiring in direct contact with a glass substrate on a board and contains 0.1 to 10.0 atomic % in total of one or more elements selected from the group consisting of Ti, Al, and Mg. Also disclosed is a display device comprising a thin-film transistor that comprises the Cu alloy film. In a preferred embodiment of the display device, the thin-film transistor has a bottom gate-type structure, and a gate electrode and scanning lines in the thin-film transistor comprise the Cu alloy film and are in direct contact with the glass substrate.

摘要翻译： 公开了一种用于显示装置的Cu合金膜，其在保持Cu基材料的低电阻特性的同时对玻璃基板具有高粘附性。 Cu合金膜是与板上的玻璃基板直接接触的布线，并且含有0.1〜10.0原子％的一种以上选自Ti，Al，Mg的元素。 还公开了包括包含Cu合金膜的薄膜晶体管的显示装置。 在显示装置的优选实施例中，薄膜晶体管具有底栅型结构，并且薄膜晶体管中的栅电极和扫描线包括Cu合金膜并与玻璃基板直接接触。

公开(公告)号：US08482189B2

公开(公告)日：2013-07-09

申请号：US13144716

申请日：2010-01-15

申请人： Hiroshi Goto ,  Aya Miki ,  Katsufumi Tomihisa ,  Mototaka Ochi ,  Takashi Onishi ,  Toshihiro Kugimiya

发明人： Hiroshi Goto ,  Aya Miki ,  Katsufumi Tomihisa ,  Mototaka Ochi ,  Takashi Onishi ,  Toshihiro Kugimiya

IPC分类号： H01L51/00

CPC分类号： H01L23/53238 ,  B32B15/01 ,  C22C9/00 ,  C23C14/025 ,  C23C14/14 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L23/53233 ,  H01L27/124 ,  H01L29/458 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/00

摘要： A display device is provided with a Cu alloy film having high adhesiveness to a transparent substrate and a low electrical resistivity. The Cu alloy film for the display device is directly brought into contact with the transparent substrate, and the Cu alloy film has the multilayer structure, which includes a first layer (Y) composed of a Cu alloy containing, in total, 2-20 atm % of at least one element selected from among a group composed of Zn, Ni, Ti, Al, Mg, Ca, W, Nb, and Mn, and a second layer (X) which is composed of pure Cu or substantially a Cu alloy having Cu as the main component and has an electrical resistivity lower than that of the first layer (Y). The first layer (Y) is brought into contact with the transparent substrate.

摘要翻译： 显示装置设置有对透明基板具有高粘附性和低电阻率的Cu合金膜。 用于显示装置的Cu合金膜直接与透明基板接触，并且Cu合金膜具有多层结构，其包括由总共为2-20atm的Cu合金构成的第一层（Y） 选自由Zn，Ni，Ti，Al，Mg，Ca，W，Nb和Mn组成的组中的至少一种元素的％，以及由纯Cu或基本上由Cu合金构成的第二层（X） 以Cu为主成分，电阻率比第一层（Y）低。 第一层（Y）与透明基板接触。

公开(公告)号：US20110273075A1

公开(公告)日：2011-11-10

申请号：US13144716

申请日：2010-01-15

申请人： Hiroshi Goto ,  Aya Miki ,  Katsufumi Tomihisa ,  Mototaka Ochi ,  Takashi Onishi ,  Toshihiro Kugimiya

发明人： Hiroshi Goto ,  Aya Miki ,  Katsufumi Tomihisa ,  Mototaka Ochi ,  Takashi Onishi ,  Toshihiro Kugimiya

IPC分类号： H01J1/48

CPC分类号： H01L23/53238 ,  B32B15/01 ,  C22C9/00 ,  C23C14/025 ,  C23C14/14 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L23/53233 ,  H01L27/124 ,  H01L29/458 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/00

摘要： A display device is provided with a Cu alloy film having high adhesiveness to a transparent substrate and a low electrical resistivity. The Cu alloy film for the display device is directly brought into contact with the transparent substrate, and the Cu alloy film has the multilayer structure, which includes a first layer (Y) composed of a Cu alloy containing, in total, 2-20 atm % of at least one element selected from among a group composed of Zn, Ni, Ti, Al, Mg, Ca, W, Nb, and Mn, and a second layer (X) which is composed of pure Cu or substantially a Cu alloy having Cu as the main component and has an electrical resistivity lower than that of the first layer (Y). The first layer (Y) is brought into contact with the transparent substrate.

摘要翻译： 显示装置设置有对透明基板具有高粘附性和低电阻率的Cu合金膜。 用于显示装置的Cu合金膜直接与透明基板接触，并且Cu合金膜具有多层结构，其包括由总共为2-20atm的Cu合金构成的第一层（Y） 选自由Zn，Ni，Ti，Al，Mg，Ca，W，Nb和Mn组成的组中的至少一种元素的％，以及由纯Cu或基本上由Cu合金构成的第二层（X） 以Cu为主成分，电阻率比第一层（Y）低。 第一层（Y）与透明基板接触。

公开(公告)号：US20100052171A1

公开(公告)日：2010-03-04

申请号：US12515538

申请日：2007-11-19

申请人： Hirotaka Ito ,  Takashi Onishi ,  Mikako Takeda ,  Masao Mizuno

发明人： Hirotaka Ito ,  Takashi Onishi ,  Mikako Takeda ,  Masao Mizuno

IPC分类号： H01L23/532 ,  H01L21/768

CPC分类号： C22C9/00 ,  C23C14/024 ,  C23C14/165 ,  H01L21/2855 ,  H01L21/76843 ,  H01L21/76873 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A Cu wire in a semiconductor device according to the present invention is a Cu wire embedded into wiring gutters or interlayer connective channels formed in an insulating film on a semiconductor substrate and the Cu wire comprises: a barrier layer comprising TaN formed on the wiring gutter side or the interlayer connective channel side; and a wire main body comprising Cu comprising one or more elements selected from the group consisting of Pt, In, Ti, Nb, B, Fe, V, Zr, Hf, Ga, Tl, Ru, Re, and Os in a total content of 0.05 to 3.0 atomic percent. The Cu wire in a semiconductor device according to the present invention is excellent in adhesiveness between the wire main body and the barrier layer.

摘要翻译： 根据本发明的半导体器件中的Cu线是嵌入到形成在半导体衬底上的绝缘膜中的布线沟或层间连接沟道中的Cu线，并且所述Cu线包括：形成在布线槽侧的TaN的阻挡层 或层间连接通道侧; 以及包含Cu，其包含选自Pt，In，Ti，Nb，B，Fe，V，Zr，Hf，Ga，Tl，Ru，Re和Os中的一种以上的元素，总含量 为0.05〜3.0原子％。 根据本发明的半导体器件中的Cu线在线主体和阻挡层之间的粘附性优异。

公开(公告)号：US20110121459A1

公开(公告)日：2011-05-26

申请号：US13003181

申请日：2009-07-10

申请人： Takashi Onishi ,  Masao Mizuno ,  Hirotaka Ito ,  Kazuyuki Kohama ,  Kazuhiro Ito ,  Susumu Tsukimoto ,  Masanori Murakami

发明人： Takashi Onishi ,  Masao Mizuno ,  Hirotaka Ito ,  Kazuyuki Kohama ,  Kazuhiro Ito ,  Susumu Tsukimoto ,  Masanori Murakami

IPC分类号： H01L23/535

CPC分类号： H01L21/76843 ,  H01L21/2855 ,  H01L21/76867 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is a semiconductor interconnection wherein a barrier layer different from a TiO2 layer is formed on an interface between an insulating film and a Cu interconnection without increasing electrical resistivity of the Cu interconnection. In the semiconductor interconnection, a Cu interconnection containing Ti is embedded in a trench arranged on an insulating film on the semiconductor substrate, and a TiC layer is formed between the insulating film and the Cu interconnection. The insulating film is preferably composed of SiCO or SiCN. The thickness of the TiC layer is preferably 3-30 nm.

摘要翻译： 提供了一种半导体互连，其中在绝缘膜和Cu互连之间的界面上形成不同于TiO 2层的阻挡层，而不增加Cu互连的电阻率。 在半导体互连中，包含Ti的Cu互连嵌入设置在半导体衬底上的绝缘膜上的沟槽中，并且在绝缘膜和Cu互连之间形成TiC层。 绝缘膜优选由SiCO或SiCN构成。 TiC层的厚度优选为3-30nm。

公开(公告)号：US07994503B2

公开(公告)日：2011-08-09

申请号：US12517362

申请日：2007-12-04

申请人： Aya Hino ,  Katsufumi Tomihisa ,  Hiroshi Gotou ,  Takashi Onishi

发明人： Aya Hino ,  Katsufumi Tomihisa ,  Hiroshi Gotou ,  Takashi Onishi

IPC分类号： H01L29/04

CPC分类号： H01L21/32051 ,  C22C9/00 ,  C22C9/06 ,  C23C14/3414 ,  G02F2001/136295 ,  G02F2202/28 ,  H01B1/026 ,  H01L23/53233 ,  H01L27/124 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： An object of the present invention is to provide: a Cu alloy wiring film that makes it possible to use Cu having a low electrical resistivity as a wiring material, exhibit a high adhesiveness to a glass substrate, and avoid the danger of peel off from the glass substrate; a TFT element for a flat-panel display produced with the Cu alloy wiring film; and a Cu alloy sputtering target used for the deposition of the Cu alloy wiring film. The present invention is a wiring film 2 composing a TFT element 1 for a flat-panel display and a sputtering target used for the deposition of the film and the material comprises Cu as the main component and at least one element selected from the group consisting of Pt, Ir, Pd, and Sm by 0.01 to 0.5 atomic percent in total. The wiring film 2 is layered on a glass substrate 3 and further a transparent conductive film 5 is layered thereon while an insulating film 4 is interposed in between.

摘要翻译： 本发明的目的是提供：可以使用具有低电阻率的Cu作为布线材料的Cu合金布线膜，对玻璃基板表现出高粘合性，并且避免了从玻璃基板剥离的危险 玻璃基板; 用Cu合金布线膜制造的平板显示器用TFT元件; 以及用于沉积Cu合金布线膜的Cu合金溅射靶。 本发明是构成用于平板显示器的TFT元件1和用于沉积膜的溅射靶的布线膜2，并且该材料包括Cu作为主要成分和至少一种选自以下的元素： Pt，Ir，Pd和Sm总计为0.01〜0.5原子％。 布线膜2层叠在玻璃基板3上，另外，在其间插入有绝缘膜4，并且层叠透明导电膜5。

公开(公告)号：US20100012935A1

公开(公告)日：2010-01-21

申请号：US12517362

申请日：2007-12-04

申请人： Aya Hino ,  Katsufumi Tomihisa ,  Hiroshi Gotou ,  Takashi Onishi

发明人： Aya Hino ,  Katsufumi Tomihisa ,  Hiroshi Gotou ,  Takashi Onishi

IPC分类号： H01L29/786 ,  H01L23/48 ,  C23C14/34

CPC分类号： H01L21/32051 ,  C22C9/00 ,  C22C9/06 ,  C23C14/3414 ,  G02F2001/136295 ,  G02F2202/28 ,  H01B1/026 ,  H01L23/53233 ,  H01L27/124 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： An object of the present invention is to provide: a Cu alloy wiring film that makes it possible to use Cu having a low electrical resistivity as a wiring material, exhibit a high adhesiveness to a glass substrate, and avoid the danger of peel off from the glass substrate; a TFT element for a flat-panel display produced with the Cu alloy wiring film; and a Cu alloy sputtering target used for the deposition of the Cu alloy wiring film.The present invention is a wiring film 2 composing a TFT element 1 for a flat-panel display and a sputtering target used for the deposition of the film and the material comprises Cu as the main component and at least one element selected from the group consisting of Pt, Ir, Pd, and Sm by 0.01 to 0.5 atomic percent in total. The wiring film 2 is layered on a glass substrate 3 and further a transparent conductive film 5 is layered thereon while an insulating film 4 is interposed in between.

摘要翻译： 本发明的目的是提供：可以使用具有低电阻率的Cu作为布线材料的Cu合金布线膜，对玻璃基板表现出高粘合性，并且避免了从玻璃基板剥离的危险 玻璃基板; 用Cu合金布线膜制造的平板显示器用TFT元件; 以及用于沉积Cu合金布线膜的Cu合金溅射靶。 本发明是构成用于平板显示器的TFT元件1和用于沉积膜的溅射靶的布线膜2，并且该材料包括Cu作为主要成分和至少一种选自以下的元素： Pt，Ir，Pd和Sm总计为0.01〜0.5原子％。 布线膜2层叠在玻璃基板3上，另外，在其间插入有绝缘膜4，并且层叠透明导电膜5。

公开(公告)号：US20080014743A1

公开(公告)日：2008-01-17

申请号：US11765006

申请日：2007-06-19

申请人： Takashi Onishi ,  Mikako Takeda ,  Masao Mizuno ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

发明人： Takashi Onishi ,  Mikako Takeda ,  Masao Mizuno ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

IPC分类号： H01L21/768

CPC分类号： H01L21/76843 ,  H01L21/76864 ,  H01L21/76867

摘要： A method of fabricating semiconductor interconnections is provided which can form a Ti-rich layer as a barrier layer and which can embed pure Cu material as interconnection material into every corner of grooves provided in an insulating film even when the grooves have a narrow minimum width and are deep. The method may include the steps of forming one or more grooves in an insulating film on a semiconductor substrate, the recess having a minimum width of 0.15 μm or less and a ratio of a depth of the groove to the minimum width thereof (depth/minimum width) of 1 or more, forming a Cu alloy thin film containing 0.5 to 10 atomic % of Ti in the groove of the insulated film along a shape of the groove in a thickness of 10 to 50 nm, forming a pure Cu thin film in the groove with the Cu alloy thin film attached thereto, and annealing the substrate with the films at 350° C. or more to allow the Ti to be precipitated between the insulating film and the Cu alloy thin film.

摘要翻译： 提供一种制造半导体互连的方法，其可以形成富Ti层作为阻挡层，并且即使当沟槽具有窄的最小宽度时，也可以将纯Cu材料作为互连材料嵌入设置在绝缘膜中的沟槽的每个角落，并且 很深 该方法可以包括以下步骤：在半导体衬底上的绝缘膜中形成一个或多个凹槽，凹槽具有0.15μm或更小的最小宽度以及凹槽的深度与其最小宽度的比（深度/最小值 宽度）为1以上，沿着形状为10〜50nm的槽的形状，在绝缘膜的槽内形成含有0.5〜10原子％的Ti的Cu合金薄膜，形成纯Cu薄膜 与Cu合金薄膜连接的槽，并使膜在350℃以上退火，使Ti在绝缘膜与Cu合金薄膜之间析出。

公开(公告)号：US20070218690A1

公开(公告)日：2007-09-20

申请号：US11532796

申请日：2006-09-18

申请人： Takashi Onishi ,  Masao Mizuno ,  Mikako Takeda ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

发明人： Takashi Onishi ,  Masao Mizuno ,  Mikako Takeda ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

IPC分类号： H01L21/44

CPC分类号： H01L21/76882 ,  H01L21/76843 ,  H01L21/76867 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is provided a fabrication method for interconnections, capable of embedding a Cu-alloy in recesses in an insulating film, and forming a barrier layer on an interface between the an insulating film and Cu-interconnections, without causing a rise in electric resistivity of the interconnections when fabricating semiconductor interconnections of the Cu-alloy embedded in the recesses provided in the insulating film on a semiconductor substrate. The fabrication method for the interconnections may comprise the steps of forming the respective recesses having a minimum width not more than 0.15 μm, and a ratio of a depth thereof to the minimum width (a depth/minimum width ratio) not less than 1, forming a Cu-alloy film containing Ti in a range of 0.5 to 3 at %, and N in a range of 0.4 to 2.0 at % over the respective recesses, and subsequently, annealing the Cu-alloy film to not lower than 200° C., and pressurizing the Cu-alloy film to not less than 50 MPa to thereby embed the Cu-alloy film into the respective recesses.

摘要翻译： 提供了一种用于互连的制造方法，其能够将铜合金嵌入绝缘膜中的凹部中，并且在绝缘膜和Cu互连之间的界面上形成阻挡层，而不会导致电阻率的上升 当制造嵌入在设置在半导体衬底上的绝缘膜中的凹部中的Cu合金的半导体互连时，互连。 互连的制造方法可以包括以下步骤：形成具有不大于0.15μm的最小宽度的相应凹槽，以及其深度与最小宽度（深度/最小宽度比）的比不小于1，形成 在各凹部中含有0.5〜3原子％的Ti，N为0.4〜2.0原子％的Ti的Cu合金膜，然后将Cu合金膜退火至200℃以上。 并将Cu合金膜加压至50MPa以上，从而将Cu合金膜嵌入各凹部。

公开(公告)号：US20060068587A1

公开(公告)日：2006-03-30

申请号：US11229721

申请日：2005-09-20

申请人： Masao Mizuno ,  Takashi Onishi

发明人： Masao Mizuno ,  Takashi Onishi

IPC分类号： H01L21/44

CPC分类号： H01L21/2855 ,  C22C9/00 ,  C23C14/165 ,  C23C14/3414 ,  C23C14/5806 ,  H01L21/76882

摘要： A Cu alloy for semiconductor interconnections contains at least one selected from the group consisting of 0.10 to 10 atomic percent of Sb, 0.010 to 1.0 atomic percent of Bi, and 0.01 to 3 atomic percent of Dy, with the balance being Cu and inevitable impurities. The Cu alloy can be reliably embedded in narrow trenches and/or via holes for interconnections.

摘要翻译： 用于半导体互连的Cu合金含有选自由0.10〜10原子％的Sb，0.010〜1.0原子％的Bi和0.01〜3原子％的Dy，余量为Cu和不可避免的杂质的至少一种。 Cu合金可以可靠地嵌入狭窄的沟槽和/或用于互连的通孔中。