公开(公告)号：US20110121459A1

公开(公告)日：2011-05-26

申请号：US13003181

申请日：2009-07-10

申请人： Takashi Onishi ,  Masao Mizuno ,  Hirotaka Ito ,  Kazuyuki Kohama ,  Kazuhiro Ito ,  Susumu Tsukimoto ,  Masanori Murakami

发明人： Takashi Onishi ,  Masao Mizuno ,  Hirotaka Ito ,  Kazuyuki Kohama ,  Kazuhiro Ito ,  Susumu Tsukimoto ,  Masanori Murakami

IPC分类号： H01L23/535

CPC分类号： H01L21/76843 ,  H01L21/2855 ,  H01L21/76867 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is a semiconductor interconnection wherein a barrier layer different from a TiO2 layer is formed on an interface between an insulating film and a Cu interconnection without increasing electrical resistivity of the Cu interconnection. In the semiconductor interconnection, a Cu interconnection containing Ti is embedded in a trench arranged on an insulating film on the semiconductor substrate, and a TiC layer is formed between the insulating film and the Cu interconnection. The insulating film is preferably composed of SiCO or SiCN. The thickness of the TiC layer is preferably 3-30 nm.

摘要翻译： 提供了一种半导体互连，其中在绝缘膜和Cu互连之间的界面上形成不同于TiO 2层的阻挡层，而不增加Cu互连的电阻率。 在半导体互连中，包含Ti的Cu互连嵌入设置在半导体衬底上的绝缘膜上的沟槽中，并且在绝缘膜和Cu互连之间形成TiC层。 绝缘膜优选由SiCO或SiCN构成。 TiC层的厚度优选为3-30nm。

公开(公告)号：US20080014743A1

公开(公告)日：2008-01-17

申请号：US11765006

申请日：2007-06-19

申请人： Takashi Onishi ,  Mikako Takeda ,  Masao Mizuno ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

发明人： Takashi Onishi ,  Mikako Takeda ,  Masao Mizuno ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

IPC分类号： H01L21/768

CPC分类号： H01L21/76843 ,  H01L21/76864 ,  H01L21/76867

摘要： A method of fabricating semiconductor interconnections is provided which can form a Ti-rich layer as a barrier layer and which can embed pure Cu material as interconnection material into every corner of grooves provided in an insulating film even when the grooves have a narrow minimum width and are deep. The method may include the steps of forming one or more grooves in an insulating film on a semiconductor substrate, the recess having a minimum width of 0.15 μm or less and a ratio of a depth of the groove to the minimum width thereof (depth/minimum width) of 1 or more, forming a Cu alloy thin film containing 0.5 to 10 atomic % of Ti in the groove of the insulated film along a shape of the groove in a thickness of 10 to 50 nm, forming a pure Cu thin film in the groove with the Cu alloy thin film attached thereto, and annealing the substrate with the films at 350° C. or more to allow the Ti to be precipitated between the insulating film and the Cu alloy thin film.

摘要翻译： 提供一种制造半导体互连的方法，其可以形成富Ti层作为阻挡层，并且即使当沟槽具有窄的最小宽度时，也可以将纯Cu材料作为互连材料嵌入设置在绝缘膜中的沟槽的每个角落，并且 很深 该方法可以包括以下步骤：在半导体衬底上的绝缘膜中形成一个或多个凹槽，凹槽具有0.15μm或更小的最小宽度以及凹槽的深度与其最小宽度的比（深度/最小值 宽度）为1以上，沿着形状为10〜50nm的槽的形状，在绝缘膜的槽内形成含有0.5〜10原子％的Ti的Cu合金薄膜，形成纯Cu薄膜 与Cu合金薄膜连接的槽，并使膜在350℃以上退火，使Ti在绝缘膜与Cu合金薄膜之间析出。

公开(公告)号：US20070218690A1

公开(公告)日：2007-09-20

申请号：US11532796

申请日：2006-09-18

申请人： Takashi Onishi ,  Masao Mizuno ,  Mikako Takeda ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

发明人： Takashi Onishi ,  Masao Mizuno ,  Mikako Takeda ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

IPC分类号： H01L21/44

CPC分类号： H01L21/76882 ,  H01L21/76843 ,  H01L21/76867 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is provided a fabrication method for interconnections, capable of embedding a Cu-alloy in recesses in an insulating film, and forming a barrier layer on an interface between the an insulating film and Cu-interconnections, without causing a rise in electric resistivity of the interconnections when fabricating semiconductor interconnections of the Cu-alloy embedded in the recesses provided in the insulating film on a semiconductor substrate. The fabrication method for the interconnections may comprise the steps of forming the respective recesses having a minimum width not more than 0.15 μm, and a ratio of a depth thereof to the minimum width (a depth/minimum width ratio) not less than 1, forming a Cu-alloy film containing Ti in a range of 0.5 to 3 at %, and N in a range of 0.4 to 2.0 at % over the respective recesses, and subsequently, annealing the Cu-alloy film to not lower than 200° C., and pressurizing the Cu-alloy film to not less than 50 MPa to thereby embed the Cu-alloy film into the respective recesses.

摘要翻译： 提供了一种用于互连的制造方法，其能够将铜合金嵌入绝缘膜中的凹部中，并且在绝缘膜和Cu互连之间的界面上形成阻挡层，而不会导致电阻率的上升 当制造嵌入在设置在半导体衬底上的绝缘膜中的凹部中的Cu合金的半导体互连时，互连。 互连的制造方法可以包括以下步骤：形成具有不大于0.15μm的最小宽度的相应凹槽，以及其深度与最小宽度（深度/最小宽度比）的比不小于1，形成 在各凹部中含有0.5〜3原子％的Ti，N为0.4〜2.0原子％的Ti的Cu合金膜，然后将Cu合金膜退火至200℃以上。 并将Cu合金膜加压至50MPa以上，从而将Cu合金膜嵌入各凹部。

公开(公告)号：US07538027B2

公开(公告)日：2009-05-26

申请号：US11532796

申请日：2006-09-18

申请人： Takashi Onishi ,  Masao Mizuno ,  Mikako Takeda ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

发明人： Takashi Onishi ,  Masao Mizuno ,  Mikako Takeda ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

IPC分类号： H01L21/4763

CPC分类号： H01L21/76882 ,  H01L21/76843 ,  H01L21/76867 ,  H01L23/53233 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is provided a fabrication method for interconnections, capable of embedding a Cu-alloy in recesses in an insulating film, and forming a barrier layer on an interface between the an insulating film and Cu-interconnections, without causing a rise in electric resistivity of the interconnections when fabricating semiconductor interconnections of the Cu-alloy embedded in the recesses provided in the insulating film on a semiconductor substrate. The fabrication method for the interconnections may comprise the steps of forming the respective recesses having a minimum width not more than 0.15 μm, and a ratio of a depth thereof to the minimum width (a depth/minimum width ratio) not less than 1, forming a Cu-alloy film containing Ti in a range of 0.5 to 3 at %, and N in a range of 0.4 to 2.0 at % over the respective recesses, and subsequently, annealing the Cu-alloy film to not lower than 200° C., and pressurizing the Cu-alloy film to not less than 50 MPa to thereby embed the Cu-alloy film into the respective recesses.

摘要翻译： 提供了一种用于互连的制造方法，其能够将铜合金嵌入绝缘膜中的凹陷中，并且在绝缘膜和Cu互连之间的界面上形成阻挡层，而不会引起电阻率的上升 当制造嵌入在设置在半导体衬底上的绝缘膜中的凹部中的Cu合金的半导体互连时，互连。 互连的制造方法可以包括以下步骤：形成具有不大于0.15μm的最小宽度的相应凹槽，以及其深度与最小宽度（深度/最小宽度比）的比不小于1，形成 在各凹部中含有0.5〜3原子％的Ti，N为0.4〜2.0原子％的Ti的Cu合金膜，然后将Cu合金膜退火至200℃以上。 并将Cu合金膜加压至50MPa以上，从而将Cu合金膜嵌入各凹部。

公开(公告)号：US07781339B2

公开(公告)日：2010-08-24

申请号：US11765006

申请日：2007-06-19

申请人： Takashi Onishi ,  Mikako Takeda ,  Masao Mizuno ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

发明人： Takashi Onishi ,  Mikako Takeda ,  Masao Mizuno ,  Susumu Tsukimoto ,  Tatsuya Kabe ,  Toshifumi Morita ,  Miki Moriyama ,  Kazuhiro Ito ,  Masanori Murakami

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76864 ,  H01L21/76867

摘要： A method of fabricating semiconductor interconnections is provided which can form a Ti-rich layer as a barrier layer and which can embed pure Cu material as interconnection material into every corner of grooves provided in an insulating film even when the grooves have a narrow minimum width and are deep. The method may include the steps of forming one or more grooves in an insulating film on a semiconductor substrate, the recess having a minimum width of 0.15 μm or less and a ratio of a depth of the groove to the minimum width thereof (depth/minimum width) of 1 or more, forming a Cu alloy thin film containing 0.5 to 10 atomic % of Ti in the groove of the insulated film along a shape of the groove in a thickness of 10 to 50 nm, forming a pure Cu thin film in the groove with the Cu alloy thin film attached thereto, and annealing the substrate with the films at 350° C. or more to allow the Ti to be precipitated between the insulating film and the Cu alloy thin film.

摘要翻译： 提供一种制造半导体互连的方法，其可以形成富Ti层作为阻挡层，并且即使当沟槽具有窄的最小宽度时，也可以将纯Cu材料作为互连材料嵌入设置在绝缘膜中的沟槽的每个角落，并且 很深 该方法可以包括以下步骤：在半导体衬底上的绝缘膜中形成一个或多个凹槽，凹槽具有0.15μm或更小的最小宽度以及凹槽的深度与其最小宽度的比（深度/最小值 宽度）为1以上，沿着形状为10〜50nm的槽的形状，在绝缘膜的槽内形成含有0.5〜10原子％的Ti的Cu合金薄膜，形成纯Cu薄膜 与Cu合金薄膜连接的槽，并使膜在350℃以上退火，使Ti在绝缘膜与Cu合金薄膜之间析出。

公开(公告)号：US07572652B2

公开(公告)日：2009-08-11

申请号：US11708683

申请日：2007-02-21

申请人： Yuhei Ikemoto ,  Koji Hirata ,  Kazuhiro Ito ,  Yu Uchida ,  Susumu Tsukimoto ,  Masanori Murakami

发明人： Yuhei Ikemoto ,  Koji Hirata ,  Kazuhiro Ito ,  Yu Uchida ,  Susumu Tsukimoto ,  Masanori Murakami

IPC分类号： H01L21/00

CPC分类号： H01L33/0079 ,  H01L33/007

摘要： A light emitting element having a light emitting element portion formed of a group III nitride-based compound semiconductor and having a layer to emit light. The light emitting element portion is formed by lifting off a substrate by wet etching after the light emitting element portion is grown on the substrate. The light emitting element portion has a lift-off surface that is kept substantially intact as it is formed in growing the light emitting element portion on the substrate.

摘要翻译： 一种发光元件，具有由III族氮化物系化合物半导体形成并具有发光层的发光元件部。 发光元件部分是通过在发光元件部分在衬底上生长之后通过湿法蚀刻来剥离衬底而形成的。 发光元件部分具有剥离表面，其在将发光元件部分生长在基板上时形成为基本保持不变。

公开(公告)号：US20070210320A1

公开(公告)日：2007-09-13

申请号：US11708683

申请日：2007-02-21

申请人： Yuhei Ikemoto ,  Koji Hirata ,  Kazuhiro Ito ,  Yu Uchida ,  Susumu Tsukimoto ,  Masanori Murakami

发明人： Yuhei Ikemoto ,  Koji Hirata ,  Kazuhiro Ito ,  Yu Uchida ,  Susumu Tsukimoto ,  Masanori Murakami

IPC分类号： H01L33/00 ,  H01L21/00

CPC分类号： H01L33/0079 ,  H01L33/007

摘要： A light emitting element having a light emitting element portion formed of a group III nitride-based compound semiconductor and having a layer to emit light. The light emitting element portion is formed by lifting off a substrate by wet etching after the light emitting element portion is grown on the substrate. The light emitting element portion has a lift-off surface that is kept substantially intact as it is formed in growing the light emitting element portion on the substrate.

摘要翻译： 一种发光元件，具有由III族氮化物系化合物半导体形成并具有发光层的发光元件部。 发光元件部分是通过在发光元件部分在衬底上生长之后通过湿法蚀刻来剥离衬底而形成的。 发光元件部分具有剥离表面，其在将发光元件部分生长在基板上时形成为基本保持不变。

公开(公告)号：US20060065898A1

公开(公告)日：2006-03-30

申请号：US11233113

申请日：2005-09-23

申请人： Masanori Murakami ,  Teppei Watanabe ,  Susumu Tsukimoto ,  Kazuhiro Ito ,  Jun Ito ,  Miki Moriyama ,  Naoki Shibata

发明人： Masanori Murakami ,  Teppei Watanabe ,  Susumu Tsukimoto ,  Kazuhiro Ito ,  Jun Ito ,  Miki Moriyama ,  Naoki Shibata

IPC分类号： H01L29/15

CPC分类号： H01L21/28575 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/0254 ,  H01L33/007 ,  H01L33/12

摘要： In a semiconductor device in which a group III nitride compound semiconductor layer is formed without a low temperature grown buffer layer provided on an undercoat layer formed by a metal nitride layer, the metal nitride layer is formed of reddish brown titanium nitride. The reddish brown titanium nitride can be obtained by causing nitrogen to be rich in the titanium nitride.

摘要翻译： 在其中形成III族氮化物化合物半导体层的半导体器件中，没有设置在由金属氮化物层形成的底涂层上的低温生长缓冲层，金属氮化物层由红棕色氮化钛形成。 可以通过使氮富含氮化钛来获得微红棕色的氮化钛。

公开(公告)号：US07550782B2

公开(公告)日：2009-06-23

申请号：US11233113

申请日：2005-09-23

申请人： Masanori Murakami ,  Teppei Watanabe ,  Susumu Tsukimoto ,  Kazuhiro Ito ,  Jun Ito ,  Miki Moriyama ,  Naoki Shibata

发明人： Masanori Murakami ,  Teppei Watanabe ,  Susumu Tsukimoto ,  Kazuhiro Ito ,  Jun Ito ,  Miki Moriyama ,  Naoki Shibata

IPC分类号： H01L31/0224

CPC分类号： H01L21/28575 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/0254 ,  H01L33/007 ,  H01L33/12

摘要： In a semiconductor device in which a group III nitride compound semiconductor layer is formed without a low temperature grown buffer layer provided on an undercoat layer formed by a metal nitride layer, the metal nitride layer is formed of reddish brown titanium nitride. The reddish brown titanium nitride can be obtained by causing nitrogen to be rich in the titanium nitride.

摘要翻译： 在其中形成III族氮化物化合物半导体层的半导体器件中，没有设置在由金属氮化物层形成的底涂层上的低温生长缓冲层，金属氮化物层由红棕色氮化钛形成。 可以通过使氮富含氮化钛来获得微红棕色的氮化钛。

公开(公告)号：US08741909B2

公开(公告)日：2014-06-03

申请号：US13502465

申请日：2010-10-19

申请人： John King-Underwood ,  Kazuhiro Ito ,  Peter John Murray ,  George Hardy ,  Frederick Arthur Brookfield ,  Christopher John Brown

发明人： John King-Underwood ,  Kazuhiro Ito ,  Peter John Murray ,  George Hardy ,  Frederick Arthur Brookfield ,  Christopher John Brown

IPC分类号： A61K31/4985 ,  C07D471/04

CPC分类号： C07D487/04 ,  A61K31/4965

摘要： The present invention relates to compounds of formula (I) and to compositions comprising the same and to the use of the compounds and their compositions in treatment, for example in the treatment of inflammatory diseases, in particular respiratory inflammatory disease. The invention also extends to methods of making the compounds.

摘要翻译： 本发明涉及式（I）化合物和包含其的组合物，以及该化合物及其组合物在治疗中的用途，例如用于治疗炎性疾病，特别是呼吸道炎性疾病。 本发明还涉及制备化合物的方法。