摘要:
A television receiver comprising an information extracting circuit for extracting information from a format or content of an input video signal, a video signal processing circuit for processing this video signal by a program or data, a memory for storing the program and data, a CPU for controlling, operating or driving these elements, and a display device for displaying an image. The video signal processing circuit can, under the control of the CPU, decode the signal, correct or set the picture quality such as gradation and sharpness, or adaptively process an on-screen display based on the input video signal. The television receiver is also able to adaptively extend the functions of the television receiver corresponding to various signal formats.
摘要:
A video signal processing apparatus which can process video signals with different formats simply by switching between programs for processing video signals. Different system clock signals are sent to the input and output processes by employing a programmable signal processor 4, input synchronizing signal processor 8, programmable signal processor 6 and output synchronizing pulse processor 9. A method for processing the video signal can be flexibly changed simply by switching between signal processing programs for programmable signal processors. In addition, the use of a memory 5 enables the signal, which is processed using the system clock signal in the input process, to be processed using the system clock signal in the output process. The present invention thus allows the processing of video signals with many different signal formats. The design of efficient circuitry will greatly reduce costs and production processes.
摘要:
A video signal is reproduced by adjusting the amplitude of a horizontal high frequency signal, a vertical high frequency signal and a vertical temporal high frequency signal. Helper signals can be demodulated even if the helper signal levels vary due to receiving conditions. The number of circuits can be reduced by using a common circuit for amplitude adjustment of the helper signal and for automatic color control of a chrominance signal.
摘要:
A signal transmission system: that includes a signal transmission unit (101) that includes a MPEG decoder (102), which receives digital broadcasting and outputs a luminance signal Y and two color difference signals PB/PR, and a transmission path encoding circuit (103), which encodes the YPBPR outputted from the MPEG decoder (102) into signals in the forms suited to a transmission path and transmits the encoded signals; and a signal reception unit (104) that includes a transmission path decoding circuit (105), which receives the encoded YPBPR and decodes them, a Y processing circuit (106), which processes the decoded luminance signal Y, a chrominance processing circuit (107), which processes the respective decoded color difference signals PB/PR, a signal conversion circuit (108), which converts the YPBPR outputted from the Y processing circuit (106) and the chrominance processing circuit (107) into RGB signals, and a display device (108) which displays the RGB signals.
摘要翻译:一种信号传输系统,包括:信号传输单元(101),包括MPEG解码器(102),其接收数字广播并输出亮度信号Y和两个色差信号P SUB B / 和传送路径编码电路(103),其将从MPEG解码器(102)输出的YP SUB B R SUB编码为信号 适合于传输路径并发送编码信号的形式; 以及信号接收单元(104),其包括传输路径解码电路(105),该传输路径解码电路(105)接收编码的YP< B> P< R>并对其进行解码,Y处理电路 106),其处理解码的亮度信号Y,处理各个解码的色差信号P SUB B / P SUB R的色度处理电路(107),信号转换 电路(108)将从Y处理电路(106)和色度处理电路(107)输出的YP B SUB> R SUB转换成RGB信号,显示 显示RGB信号的装置(108)。
摘要:
An object is to provide a vertical contour correcting device for a video signal which reduces noise without deteriorating effect of the entire contour correction. A vertical contour correcting device (VCP1) which corrects vertical contour components (S1v, S1v′) of a video signal (S1) with a given quantity of correction (K) to enhance the vertical contour (Ev) of the video signal (S1) comprises a vertical contour component extracting device (3) for detecting said vertical contour components (S1v, S1v′) from said video signal (S1), a vertical contour component correlation detector (3, 29, 8c, 8d, 4) for detecting correlation between horizontally adjacent vertical contour components (Sb, Sb′, Sb′′) from said detected vertical contour components (S1v, S1v′), and a controller (5) for determining said quantity of correction (K) on the basis of said detected correlation (Sj1), thereby varying the quantity of correction (K) in accordance with the correlation (Sj1).
摘要:
A video signal processing device comprising an operating element array for processing video signals according to commands given from the outside, memories for temporarily storing the video signals according to commands given from the outside, and a network 3 for connecting the operating element array and the storage units according to commands given from the outside, thereby making it possible to switch ways of processing digitized video signals according to commands from the outside.
摘要:
A video signal compression apparatus extracts a specific value written in a read only memory at every system clock pulse. The specific value can be varied at every clock pulse. Therefore, for example, only the center part of a picture can be horizontally compressed. A FIFO memory may be used. It is possible to select a mode with a fixed compression ratio or a mode in which a compression ratio varies at every clock pulse. Further, the fixed compression ratio can be set from the outside. Display position of the picture can also be changed.
摘要:
The present invention provides an image processing device that converts an interlace image signal into a progressive signal so as not to cause degradation of image quality in edge parts of letters or the like, when performing an IP conversion with respect to an image that is mixed with an OSD such as a caption and a telop. The image processing device includes: an OSD mix part that mixes an on-screen display with an input interlace image signal; a motion detecting part that detects a motion by comparing pixel data between different fields; and an interpolation pixel generating part that generates a new pixel between lines of the interlace image signal by interpolating calculation with an interpolation method that depends on an OSD mix ratio of the OSD mix part and a result of the motion detection by the motion detecting part.
摘要:
A power-down determination circuit calculates the horizontal frequency and vertical frequency, respectively, employing a clock signal obtained from a multiplier circuit and horizontal synchronization signal and vertical synchronization signal obtained from a TMDS decode circuit. The power-down determination circuit then determines whether an input digital signal does or does not have a decodable video format by comparing the calculated horizontal frequency and vertical frequency with horizontal frequencies and vertical frequencies stored beforehand, for output of a power-down control signal indicative of the determination. Thus, in the case where the input digital signal does not have a decodable format, the power-down control signal controls a video/audio processing circuit to enter a power-down mode.
摘要:
A signal transmitter and a signal receiver comprises a time base compression part (101) for compressing an audio signal on a time base to output the compressed signal as a time base compressed audio signal and a multiplexing part (102) for multiplexing a video signal, a control signal, and the time base compressed audio signal to output the multiplexed signal to the external as a video/audio control multiplexed signal. The thus constituted signal transmitter and the signal receiver realize a signal transmission system for multiplexing and transmitting the video signal, audio signal, and control signal, for consequently transmitting high-quality diverse digital audio signals without conversion into an analog signal, and for transmission at high speed with minimal error.