摘要:
Semiconductor integrated circuit of the present invention comprises a signal output terminal, a load circuit connected to the signal output terminal, a transistor circuit which is constituted by at least one first channel MOS transistor and has an output terminal connected to the signal output terminal and an input terminal connected to a signal input terminal, and a first channel enhancement type MOS transistor that is inserted between the transistor circuit's output terminal and the signal output terminal and is made normally in an on state. It is an object of the present invention to provide a highly reliable semiconductor integrated circuit in which no deterioration of characteristics due to hot carriers occurs even when the circuit is constituted using short channel MOS transistors with an effective channel length of about 1 micron or less.
摘要:
In a semiconductor device according to the invention, first and second voltage dropping circuits, for generating voltages respectively having smaller values than that of an external power supply voltage, are provided. The first voltage dropping circuit, which consumes relatively less power, is always in the operative mode, and the second voltage dropping circuit, which consumes more power than that of the first voltage dropping circuit, is operated during an interval other than a standby interval. The voltages generated by the first and second voltage dropping circuits are supplied to an internal power supply line in parallel with each other.
摘要:
A static memory has an address transition detector, an input data transition detector and a pulse signal generator. When a detector detects that an input address or input data has changed, the pulse signal generator produces a pulse signal having a width longer than the shorter of the data-reading or data-writing cycle. This pulse signal controls the period of time during which a penetrating DC current flows between two power sources via some of the components of the memory.
摘要:
In a dynamic RAM, the refreshing operation is performed during one cycle of the read or write operation. A switch circuit selects either a row address signal output from address input circuit or a refresh row address signal output from a refresh circuit. By controlling the switch circuit by a switch selector, the refresh is performed during the operation delay time of the address input circuit or an input/output circuit for inputting and outputting data.
摘要:
Semiconductor integrated circuit of the present invention comprises a signal output terminal, a load circuit connected to the signal output terminal, a transistor circuit which is constituted by at least one first channel MOS transistor and has an output terminal connected to the signal output terminal and an input terminal connected to a signal input terminal, and a first channel enhancement type MOS transistor that is inserted between the transistor circuit's output terminal and the signal output terminal and is made normally in an on state. It is an object of the present invention to provide a highly reliable semiconductor integrated circuit in which no deterioration of characteristics due to hot carriers occurs even when the circuit is constituted using short channel MOS transistors with an effective channel length of about 1 micron or less.
摘要:
A self-refresh control circuit for a dynamic memory device having memory cells and a self-refresh circuit on a single chip. The circuit includes a leak current monitor circuit representing the leakage of a memory cell and an inverter circuit for detecting the leakage of the monitor circuit so as to control the refresh operation automatically.
摘要:
In the semiconductor memory device according to the present invention, when there is a defective portion in the memory cells, those memory cells are replaced by redundant memory cells. When defective portions are discovered in the memory cells, the fuse elements corresponding to the memory cells having the defective portions are cut off. Voltages of the select lines connected to the memory cells having the defective portions are held at an L level by the resistors. Due to this, the memory cells having the defective portions are not selected.
摘要:
A semiconductor memory device has a plurality of memory cells arranged in a two-dimensional matrix array, word lines for connecting memory cells of each row to a row decoder, and bit lines for connecting memory cells of each column to a column decoder. The word lines include first word lines each of which is connected to several memory cells in each column section of one row. The word lines also include a second word line connected to the first word lines of each row through corresponding switches. In response to a column address signal, one of the switches of each row is turned on, so that one of the first word lines is connected to the corresponding second word line.
摘要:
In one aspect, a liquid crystal display device includes a display region formed of a plural divided regions in a row direction. First and second driving circuits are arranged to face each other interposing the display region therebetween in the row direction. The first driving circuit is connected with odd scanning lines, and the second driving circuit is connected with the even scanning lines. A channel area of the TFT of the pixels connected to the odd scanning lines is the smallest in the divided region nearest to the first driving circuit and becomes larger gradually in the divided regions distant from the first driving circuit. A channel area of the TFT of the pixels connected to the even scanning lines is the smallest in the divided region nearest to the second driving circuit and becomes larger gradually in the divided regions with distant from the second driving circuit.
摘要:
In order to make a boundary inconspicuous, which is located between an image area which displays an image by translucent pixels and a dummy area which always displays a white color by reflection pixels, a size ratio of transparent areas in color filters of the reflection pixels with respect to reflection areas therein is made larger than a size ratio of transparent areas in color filters of the translucent pixels with respect to reflection areas therein. In such a way, brightness of the display is balanced by adjusting quantities of transmission light through the transparent areas of the reflection pixels with respect to quantities of reflection light generated unexpectedly on transmission areas of the translucent pixels. Then, degrees of whiteness in the translucent pixels and the reflection pixels are approximated to each other.