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1.发明授权Sound reproducing device adding audio data to decoded sound using processor selected based on trade-offs 有权使用基于权衡选择的处理器将音频数据添加到解码的声音的声音再现装置公开(公告)号：US08571879B2
公开(公告)日：2013-10-29
申请号：US12863898
申请日：2009-01-14
IPC分类号： G10L19/00
CPC分类号： G11B20/10527 , G11B27/034 , G11B2020/10546 , G11B2020/10759 , G11B2020/10805
摘要： A sound reproducing device includes a decoder section (1200) configured to decode an audio-signal bit stream input from the outside world, and to generate a decoded PCM signal; a control section (1100) configured to identify reproduction conditions from reproduction-instruction information obtained from the outside world and decoding information obtained from the decoder section (1200), and to provide a reproduction instruction; and an additional-audio addition section (1500) configured to process additional audio data input from the outside world, to add a result with the decoded PCM signal, and to output a result as an output PCM signal. The additional-audio addition section (1500) includes an additional-audio generation section (1510) configured to process the additional audio data so that the additional audio data can be added with the decoded PCM signal, and to output a result as an additional-audio PCM signal, and an adder (1520) configured to mix the additional-audio PCM signal and the decoded PCM signal. The additional-audio generation section (1510) includes a plurality of processing means (1511 and 1512) depending on a trade-off between the amount of load of computation process in the processing and acoustic properties of a processing result. The control section (1100) identifies one of the plurality of processing means (1511 and 1512) based on the reproduction-instruction information and the decoding information. The additional-audio generation section (1510) processes the additional audio data by the processing means identified by the control section (1100).
摘要翻译： 声音再现装置包括：解码器部分，被配置为解码从外部世界输入的音频信号比特流，并产生解码的PCM信号; 控制部（1100），被配置为根据从外部世界获得的再现指示信息和从解码器部分（1200）获得的解码信息来识别再现条件，并提供再现指令; 以及附加音频附加部分（1500），被配置为处理从外部世界输入的附加音频数据，以将结果与解码的PCM信号相加，并输出结果作为输出PCM信号。 附加音频附加部分（1500）包括附加音频生成部分（1510），其被配置为处理附加音频数据，使得附加音频数据可以与解码的PCM信号相加，并且作为附加音频输出部分输出结果， 音频PCM信号和被配置为混合附加音频PCM信号和解码的PCM信号的加法器（1520）。 根据处理中的计算处理的负载量和处理结果的声学特性之间的折衷，附加音频产生部分（1510）包括多个处理装置（1511和1512）。 控制部（1100）基于再现指示信息和解码信息来识别多个处理装置（1511和1512）中的一个。 附加音频生成部分（1510）由控制部分（1100）识别的处理装置处理附加音频数据。
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2.发明授权公开(公告)号：US08206623B2
公开(公告)日：2012-06-26
申请号：US12438249
申请日：2008-08-27
申请人： Hiroyuki Goto , Hideo Uemoto , Tomoki Sugino
发明人： Hiroyuki Goto , Hideo Uemoto , Tomoki Sugino
IPC分类号： B29B9/00
CPC分类号： C01B13/145 , B01J2/08 , B01J2/18 , C01P2004/03 , C01P2004/32 , C01P2004/52
摘要： Provided are a ceramic-fine-particle producing process making it possible to produce, with ease, ceramic fine particles which have a spherical shape close to a complete round and an excellent mono-dispersibility, and are made only of a solid component of a simple ceramic material without making a fine channel structure complicated, and an apparatus used therein for producing ceramic fine particles. The process includes the step (S100) of feeding a dispersion phase made of an aqueous liquid containing a gelling agent to act upon cooling and a ceramic material into a continuous phase made of an oily liquid containing a surfactant, thereby producing fine droplets; the step (S110) of collecting and cooling the produced fine droplets; the step (S120) of washing the cooled fine droplets; the step (S130) of drying the washed fine droplets; and the step (S140) of firing the dried fine droplets.
摘要翻译： 提供一种陶瓷微粒生产方法，可以容易地制造具有接近整圆的球形形状和优异的单分散性的陶瓷细颗粒，并且仅由简单的固体成分制成 不使细孔结构复杂的陶瓷材料，以及用于制造陶瓷微粒的装置。 该方法包括将由含有胶凝剂的水性液体制成的分散相进行冷却的步骤（S100），将陶瓷材料进料到含有表面活性剂的油性液体的连续相中，由此产生微细的液滴; 收集并冷却所产生的微小液滴的步骤（S110） 洗涤被冷却的微细液滴的步骤（S120） 干燥洗涤后的微细液滴的步骤（S130） 以及烧制干燥的细小液滴的步骤（S140）。
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公开(公告)号：US08153631B2
公开(公告)日：2012-04-10
申请号：US12621922
申请日：2009-11-19
申请人： Jay P. Powers , Mario G. Cardozo , Hiroyuki Goto , Kazuhito Harada , Katsuaki Imamura , Makoto Kakutani , Isamu Matsuda , Yasuhiro Ohe , Shinji Yata
发明人： Jay P. Powers , Mario G. Cardozo , Hiroyuki Goto , Kazuhito Harada , Katsuaki Imamura , Makoto Kakutani , Isamu Matsuda , Yasuhiro Ohe , Shinji Yata
IPC分类号： A61K31/4196 , A61K31/5377 , C07D413/12 , C07D249/08
CPC分类号： C07D401/12 , A61K31/18 , A61K31/4196 , A61K31/64 , A61K38/28 , A61K45/06 , C04B35/632 , C07D249/08 , C07D249/14 , C07D401/04 , C07D401/10 , C07D401/14 , C07D403/04 , C07D403/10 , C07D405/04 , C07D409/04 , C07D413/10 , C07D491/10
摘要： The present invention provides a triazole compound of the following formula: a prodrug thereof or a pharmaceutically acceptable salt thereof. The above-mentioned triazole compound has superior HSD1 inhibitory activity, and is useful as an HSD1 inhibitor, a therapeutic drug of diabetes or a therapeutic drug of obesity or a therapeutic drug of metabolic syndrome.
摘要翻译： 本发明提供下式的三唑化合物：其前药或其药学上可接受的盐。 上述三唑化合物具有优异的HSD1抑制活性，可用作HSD1抑制剂，糖尿病治疗药物或肥胖症治疗药物或代谢综合征治疗药物。
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公开(公告)号：US08103899B2
公开(公告)日：2012-01-24
申请号：US12245203
申请日：2008-10-03
申请人： Shigemasa Shiota , Hiroyuki Goto , Hirofumi Shibuya , Fumio Hara , Kinji Mitani
发明人： Shigemasa Shiota , Hiroyuki Goto , Hirofumi Shibuya , Fumio Hara , Kinji Mitani
IPC分类号： G06F11/00
CPC分类号： G11C16/349
摘要： A memory system permitting a number of alternative memory blocks to be made ready in order to extend the rewritable life and thereby contributing to enhanced reliability of information storage is to be provided. The memory system is provided with a nonvolatile memory having a plurality of data blocks in predetermined physical address units and a controller for controlling the nonvolatile memory in response to an access request from outside. Each of the data blocks has areas for holding a rewrite count and error check information regarding each data area. The controller, in a read operation on the nonvolatile memory, checks for any error in the area subject to the read according to error check information and, when there is any error, if the rewrite count is greater than a predetermined value, will replace the pertinent data block with another data block or if it is not greater, correct data in the data block pertaining to the error.
摘要翻译： 提供允许许多替代存储器块准备好以延长可重写寿命并由此有助于提高信息存储的可靠性的存储器系统。 该存储器系统具有非易失性存储器，该非易失性存储器具有预定物理地址单元中的多个数据块，以及用于响应于来自外部的访问请求来控制该非易失性存储器的控制器。 每个数据块具有用于保存关于每个数据区的重写计数和错误检查信息的区域。 控制器在非易失性存储器中的读取操作中，根据错误检查信息检查受读取区域的任何错误，并且当存在任何错误时，如果重写计数大于预定值，则将替换 与另一个数据块相关的数据块，或者如果不大于数据块，则与错误相关的数据块中的数据正确。
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公开(公告)号：US20090037767A1
公开(公告)日：2009-02-05
申请号：US12245203
申请日：2008-10-03
申请人： SHIGEMASA SHIOTA , Hiroyuki Goto , Hirofumi Shibuya , Fumio Hara , Kinji Mitani
发明人： SHIGEMASA SHIOTA , Hiroyuki Goto , Hirofumi Shibuya , Fumio Hara , Kinji Mitani
IPC分类号： G06F11/00
CPC分类号： G11C16/349
摘要： A memory system permitting a number of alternative memory blocks to be made ready in order to extend the rewritable life and thereby contributing to enhanced reliability of information storage is to be provided. The memory system is provided with a nonvolatile memory having a plurality of data blocks in predetermined physical address units and a controller for controlling the nonvolatile memory in response to an access request from outside. Each of the data blocks has areas for holding a rewrite count and error check information regarding each data area. The controller, in a read operation on the nonvolatile memory, checks for any error in the area subject to the read according to error check information and, when there is any error, if the rewrite count is greater than a predetermined value, will replace the pertinent data block with another data block or if it is not greater, correct data in the data block pertaining to the error.
摘要翻译： 提供允许许多替代存储器块准备好以延长可重写寿命并由此有助于提高信息存储的可靠性的存储器系统。 该存储器系统具有非易失性存储器，该非易失性存储器具有预定物理地址单元中的多个数据块，以及用于响应于来自外部的访问请求来控制该非易失性存储器的控制器。 每个数据块具有用于保存关于每个数据区的重写计数和错误检查信息的区域。 控制器在非易失性存储器中的读取操作中，根据错误检查信息检查受读取区域的任何错误，并且当存在任何错误时，如果重写计数大于预定值，则将替换 与另一个数据块相关的数据块，或者如果不大于数据块，则与错误相关的数据块中的数据正确。
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6.发明授权Memory storage device having a nonvolatile memory and memory controller with error check operation mode 失效具有非易失性存储器和具有错误检查操作模式的存储器控制器的存储器存储设备公开(公告)号：US07392457B2
公开(公告)日：2008-06-24
申请号：US11180538
申请日：2005-07-14
IPC分类号： G11C29/00
CPC分类号： G06F11/1068
摘要： A memory card includes a non-volatile memory, a memory controller for controlling the operation of the memory card. The memory controller is capable of providing an interface with outside according to a predetermined protocol, and performs error detection and correction of the memory information at regular time intervals or at the timing of connection of electric power supply, independently of reading out the memory information according to external access request. Therefore, it is possible to improve reliability of data retention in the non-volatile memory without the host device reading out the memory information from the non-volatile memory of the memory card.
摘要翻译： 存储卡包括非易失性存储器，用于控制存储卡的操作的存储器控制器。 存储器控制器能够根据预定协议向外部提供接口，并且以规定的时间间隔或在电力供应连接的定时执行存储器信息的错误检测和校正，而不依赖于读出存储器信息 到外部访问请求。 因此，无需主机装置从存储卡的非易失性存储器中读出存储器信息，可以提高非易失性存储器中的数据保持的可靠性。
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公开(公告)号：US07231580B2
公开(公告)日：2007-06-12
申请号：US10714982
申请日：2003-11-18
申请人： Shigemasa Shiota , Hiroyuki Goto , Hirofumi Shibuya , Fumio Hara , Kinji Mitani
发明人： Shigemasa Shiota , Hiroyuki Goto , Hirofumi Shibuya , Fumio Hara , Kinji Mitani
CPC分类号： G07F7/084 , G06F11/1044 , G06Q20/341 , G07F7/1008
摘要： The reliability of data is significantly increased without considerably increasing costs by performing minor data corrections within an information storage device and performing major error corrections in an information processing device. When a request to transfer user data for reading is issued from an information processing device, a control circuit transfers the user data and management data to an error detection circuit, which checks the user data for errors. If the user data contains no error, the control circuit notifies the information processing device that the user data can be transferred, and transfers it to the information processing device. If the user data contains errors, an X count error position and correction data calculation circuit uses the user data and the management data to calculate correction locations and correction data, and judges whether the correction locations are correctable. If uncorrectable (there are more correction locations than X locations), the control circuit notifies the information processing device that the user data is uncorrectable, and then transfers the user data and the management data to the information processing device.
摘要翻译： 通过在信息存储设备内进行小数据校正并且在信息处理设备中执行主要错误校正，数据的可靠性显着增加，而不会显着增加成本。 当从信息处理装置发出用于传送用于读取的用户数据的请求时，控制电路将用户数据和管理数据传送到检错用户数据的错误检测电路。 如果用户数据不包含错误，则控制电路通知信息处理装置可以传送用户数据，并将其传送到信息处理装置。 如果用户数据包含错误，X计数错误位置和校正数据计算电路使用用户数据和管理数据来计算校正位置和校正数据，并且判断校正位置是否可校正。 如果不可校正（比X位置更多的校正位置），则控制电路向信息处理设备通知用户数据是不可校正的，然后将用户数据和管理数据传送到信息处理设备。
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公开(公告)号：US07117328B2
公开(公告)日：2006-10-03
申请号：US10937258
申请日：2004-09-10
CPC分类号： G06F11/2056 , G06F11/2084 , G06F12/1433
摘要： This invention realizes separate control for each memory area. A memory unit is structured by including a semiconductor memory device capable of memorizing information, the aforementioned memory device is divided into plural memory areas logically and also management table, which is capable of controlling separately each aforementioned memory area for accessing from the outside, is tabled, control information, which prohibits accessing the prescribed memory area of the aforementioned plural memory areas, is provided in the aforementioned management information, and it is prohibited to access the specified memory area from the outside in accordance with control information.
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公开(公告)号：US07114117B2
公开(公告)日：2006-09-26
申请号：US10083502
申请日：2002-02-27
CPC分类号： G11C29/76 , G06F11/1068 , G06F13/1673 , G11C5/04 , G11C29/72 , G11C2029/0409
摘要： A memory card has a plurality of non-volatile memories and a main controller for controlling the operation of the non-volatile memories. The main controller performs an access control to the non-volatile memories in response to an external access instruction, and an alternate control for alternating an access error-related storage area of the non-volatile memory with other storage area. In the access control, the speeding up of the data transfer between flash memories is achieved by causing the plurality of non-volatile memories to parallel access operate. In the alternation control, the storage areas is made alternative for each non-volatile memory in which an access error occurs.
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公开(公告)号：US06535422B2
公开(公告)日：2003-03-18
申请号：US10023882
申请日：2001-12-21
IPC分类号： G11C1604
摘要： The present invention provides a nonvolatile memory system whose storage capacity can be easily changed. The nonvolatile memory system comprises plural memory modules, a controller for controlling the operation of the plural memory modules according to access requests from the outside, and a module selecting decoder for selectively enabling the memory modules by decoding a selection signal outputted from the controller, wherein the memory modules are freely mounted or dismounted. With this arrangement, the storage capacity can be changed by increasing or decreasing the memory modules.
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