公开(公告)号：US4706776A

公开(公告)日：1987-11-17

申请号：US825286

申请日：1986-02-03

申请人： Takuzan Hyoki ,  Atsushi Uchida ,  Yuichi Yamamoto

发明人： Takuzan Hyoki ,  Atsushi Uchida ,  Yuichi Yamamoto

IPC分类号： B60K37/00 ,  B62D1/02 ,  B62D1/18 ,  E02F3/84 ,  E02F9/20 ,  G05G1/01 ,  B60K26/00 ,  B62D1/16

CPC分类号： E02F3/84 ,  B62D1/18 ,  E02F9/2004

摘要： A steering and operating apparatus used mainly for motor graders and which enables positions and attitudes of a steering wheel and operating levers to be varied in the longitudinal and vertical directions of the vehicle. The apparatus has a steering wheel mounted box and support frames for the operating levers. Both the steering wheel mounted box and the support frames are respectively tilted in the longitudinal direction of the vehicle by the actions of mechanical arrangements which are different from each other and operated independently of each other. Thus, both the steering wheel mounted box and the support frames for operating levers can be tilted independently of each other.

摘要翻译： 主要用于平地机的转向和操作装置，其使方向盘和操作杆的位置和态度能够在车辆的纵向和垂直方向上变化。 该装置具有用于操作杆的方向盘安装盒和支撑框架。 方向盘安装盒和支撑框架分别通过彼此不同并且彼此独立地操作的机械装置的动作分别在车辆的纵向方向上倾斜。 因此，方向盘安装盒和用于操作杆的支撑框架可以彼此独立地倾斜。

公开(公告)号：US08799748B2

公开(公告)日：2014-08-05

申请号：US13537350

申请日：2012-06-29

申请人： Toshihiko Suzuki ,  Hidenori Takahashi ,  Terumasa Haneda ,  Atsushi Uchida

发明人： Toshihiko Suzuki ,  Hidenori Takahashi ,  Terumasa Haneda ,  Atsushi Uchida

IPC分类号： G11C29/00 ,  G06F11/10

CPC分类号： G06F11/1072 ,  G11C11/5621 ,  G11C16/0483

摘要： A non-volatile semiconductor memory device includes: a memory unit including a plurality of memory cells, each of the plurality of memory cells to perform a multi-level storage operation by assigning a value including a plurality of bits to at least four data states defined according to a threshold level; and a controller to control the memory unit, wherein the controller sets at least one of the plurality of bits to an error correction bit that indicates one of a first state and a second state; assigns the first state to the error correction bits that correspond to the data states having a minimum threshold level and a maximum threshold level and the second state to the error correction bits that correspond to the data state having other threshold level; and resets the error correction bit to the first state when the error correction bit indicates the second state.

摘要翻译： 一种非易失性半导体存储器件包括：存储器单元，包括多个存储器单元，所述多个存储器单元中的每一个通过将包括多个位的值分配给至少四个数据状态来执行多级存储操作 根据门槛值; 以及控制器，用于控制所述存储器单元，其中所述控制器将所述多个位中的至少一个设置为指示第一状态和第二状态之一的纠错位; 将对应于具有最小阈值电平和最大阈值电平的数据状态的第二状态分配给对应于具有其他阈值电平的数据状态的纠错位的纠错位; 并且当纠错位指示第二状态时，将纠错位复位到第一状态。

公开(公告)号：US08732414B2

公开(公告)日：2014-05-20

申请号：US13170740

申请日：2011-06-28

申请人： Yoko Kawano ,  Yuji Hanaoka ,  Atsushi Uchida

发明人： Yoko Kawano ,  Yuji Hanaoka ,  Atsushi Uchida

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F11/1446 ,  G06F11/2015 ,  G06F2212/7209

摘要： A control device including: a storage device that includes a first storage area including a plurality of blocks into which data can be written more than once and a second storage area into which data can be written only once, wherein the first storage area further stores a flag for each of the blocks, the flag indicating whether or not the block is allowed to be used; a flag management information creation unit configured to create, on the basis of the flag, a flag management information for managing whether or not data can be stored in each block of the storage device; and a management information controller configured to cause the flag management information to be stored in the second storage area.

摘要翻译： 一种控制装置，包括：存储装置，其包括第一存储区域，所述第一存储区域包括可以多次写入数据的多个块，以及可以仅写入数据的一个的第二存储区域，其中，所述第一存储区域还存储 每个块的标志，指示是否允许使用块的标志; 标志管理信息创建单元，被配置为基于所述标志创建用于管理数据是否可以存储在所述存储设备的每个块中的标志管理信息; 以及管理信息控制器，被配置为使得所述标志管理信息被存储在所述第二存储区域中。

公开(公告)号：US20130042164A1

公开(公告)日：2013-02-14

申请号：US13537350

申请日：2012-06-29

申请人： Toshihiko Suzuki ,  Hidenori Takahashi ,  Terumasa Haneda ,  Atsushi Uchida

发明人： Toshihiko Suzuki ,  Hidenori Takahashi ,  Terumasa Haneda ,  Atsushi Uchida

IPC分类号： G11C29/04

CPC分类号： G06F11/1072 ,  G11C11/5621 ,  G11C16/0483

摘要： A non-volatile semiconductor memory device includes: a memory unit including a plurality of memory cells, each of the plurality of memory cells to perform a multi-level storage operation by assigning a value including a plurality of bits to at least four data states defined according to a threshold level; and a controller to control the memory unit, wherein the controller sets at least one of the plurality of bits to an error correction bit that indicates one of a first state and a second state; assigns the first state to the error correction bits that correspond to the data states having a minimum threshold level and a maximum threshold level and the second state to the error correction bits that correspond to the data state having other threshold level; and resets the error correction bit to the first state when the error correction bit indicates the second state.

摘要翻译： 一种非易失性半导体存储器件包括：存储器单元，包括多个存储器单元，所述多个存储器单元中的每一个通过将包括多个位的值分配给至少四个数据状态来执行多级存储操作 根据门槛值; 以及控制器，用于控制所述存储器单元，其中所述控制器将所述多个位中的至少一个设置为指示第一状态和第二状态之一的纠错位; 将对应于具有最小阈值电平和最大阈值电平的数据状态的第二状态分配给对应于具有其他阈值电平的数据状态的纠错位的纠错位; 并且当纠错位指示第二状态时，将纠错位复位到第一状态。

公开(公告)号：US08203361B2

公开(公告)日：2012-06-19

申请号：US12719944

申请日：2010-03-09

申请人： Atsushi Uchida ,  Hirotoshi Inoue

发明人： Atsushi Uchida ,  Hirotoshi Inoue

IPC分类号： H03K19/0175 ,  H03K19/08

CPC分类号： G06F13/4217

摘要： A circuit system has a first and a second circuit sub-system, and a bidirectional bus, the first circuit sub-system having a first control circuit that receives a control signal for controlling the direction of the bidirectional bus, and controls the first sub-system to be either of a transmitting or a receiving state based on a state of the control signal, a first sending unit that receives the control signal, and outputs as a first control signal, and a second sending unit that receives the control signal, and outputs as a second control signal, the second circuit sub-system having a first receiving unit that receives the first control signal, a second receiving unit that receives the second control signal, and a second control circuit that controls the second sub-system to assume either the transmitting or the receiving state on the basis of the first and the second control signal.

摘要翻译： 电路系统具有第一和第二电路子系统和双向总线，第一电路子系统具有接收用于控制双向总线的方向的控制信号的第一控制电路，并且控制第一子系统， 系统基于控制信号的状态成为发送状态或接收状态，接收控制信号的第一发送单元，作为第一控制信号输出的第一发送单元和接收控制信号的第二发送单元，以及 输出作为第二控制信号，第二电路子系统具有接收第一控制信号的第一接收单元，接收第二控制信号的第二接收单元和控制第二子系统呈现的第二控制电路 基于第一和第二控制信号发送或接收状态。

公开(公告)号：US20120005436A1

公开(公告)日：2012-01-05

申请号：US13170740

申请日：2011-06-28

申请人： Yoko KAWANO ,  Yuji Hanaoka ,  Atsushi Uchida

发明人： Yoko KAWANO ,  Yuji Hanaoka ,  Atsushi Uchida

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F11/1446 ,  G06F11/2015 ,  G06F2212/7209

摘要： A control device including: a storage device that includes a first storage area including a plurality of blocks into which data can be written more than once and a second storage area into which data can be written only once, wherein the first storage area further stores a flag for each of the blocks, the flag indicating whether or not the block is allowed to be used; a flag management information creation unit configured to create, on the basis of the flag, a flag management information for managing whether or not data can be stored in each block of the storage device; and a management information controller configured to cause the flag management information to be stored in the second storage area.

摘要翻译： 一种控制装置，包括：存储装置，其包括第一存储区域，所述第一存储区域包括可以多次写入数据的多个块，以及可以仅写入数据的一个的第二存储区域，其中，所述第一存储区域还存储 每个块的标志，指示是否允许使用块的标志; 标志管理信息创建单元，被配置为基于所述标志创建用于管理数据是否可以存储在所述存储设备的每个块中的标志管理信息; 以及管理信息控制器，被配置为使得所述标志管理信息被存储在所述第二存储区域中。

公开(公告)号：US20060118804A1

公开(公告)日：2006-06-08

申请号：US11294539

申请日：2005-12-06

申请人： Makoto Nagai ,  Setsuo Yada ,  Atsushi Uchida

发明人： Makoto Nagai ,  Setsuo Yada ,  Atsushi Uchida

IPC分类号： H01L33/00

CPC分类号： H05K1/183 ,  H01L33/486 ,  H01L33/60 ,  H01L33/62 ,  H01L2224/32225 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/246 ,  H05K3/4614 ,  H05K3/4629 ,  H05K3/4697 ,  H05K2201/0347 ,  H05K2201/09836 ,  H05K2201/09981 ,  H05K2201/10106 ,  H05K2203/061

摘要： A wiring substrate for mounting a light emitting element, comprising: a substrate body comprising an insulating material and having a first surface and a back surface; and a cavity being opened into the first surface of said substrate body and having a mounting area for mounting a light emitting element at a bottom face of said cavity, wherein a metallized layer provided along a side face of said cavity and metallized layers provided in said substrate body are provided to continue to each other.

摘要翻译： 一种用于安装发光元件的布线基板，包括：基板主体，包括绝缘材料并具有第一表面和后表面; 并且腔体被打开到所述基板主体的第一表面中并且具有用于将发光元件安装在所述空腔的底面的安装区域，其中沿着所述腔体的侧面设置的金属化层和设置在所述腔体中的金属化层 衬底本体被设置成彼此连续。

公开(公告)号：US09047232B2

公开(公告)日：2015-06-02

申请号：US13227772

申请日：2011-09-08

申请人： Emi Cho ,  Yuji Hanaoka ,  Atsushi Uchida ,  Yoko Kawano

发明人： Emi Cho ,  Yuji Hanaoka ,  Atsushi Uchida ,  Yoko Kawano

IPC分类号： G06F12/16 ,  G06F11/14 ,  G06F12/08 ,  G06F11/20

CPC分类号： G06F11/1441 ,  G06F11/2015 ,  G06F11/2089 ,  G06F12/0866 ,  G06F12/0868 ,  G06F2212/222

摘要： A storage apparatus includes a storage medium configured to store data and a control unit configured to control access to the storage medium. The control unit includes first storage configured to store data to be stored in the storage medium, a second storage configured to store data, a control information generator configured to generate control information indicating a storage state of the data in the first storage and a transfer controller configured to control transfer of the data stored in the first storage to the second storage on the basis of the control information generated by the control information generator when the supply of power to the control unit is stopped.

摘要翻译： 存储装置包括被配置为存储数据的存储介质和被配置为控制对存储介质的访问的控制单元。 所述控制单元包括被配置为存储要存储在所述存储介质中的数据的第一存储器，被配置为存储数据的第二存储器，被配置为生成指示所述第一存储器中的数据的存储状态的控制信息的控制信息生成器，以及传送控制器 被配置为当停止向所述控制单元供电时，基于由所述控制信息发生器产生的控制信息来控制存储在所述第一存储器中的数据到所述第二存储器的传送。

公开(公告)号：US08356203B2

公开(公告)日：2013-01-15

申请号：US12787020

申请日：2010-05-25

申请人： Atsushi Uchida ,  Yuji Hanaoka ,  Terumasa Haneda ,  Yoko Kawano ,  Emi Narita

发明人： Atsushi Uchida ,  Yuji Hanaoka ,  Terumasa Haneda ,  Yoko Kawano ,  Emi Narita

IPC分类号： G06F1/12

CPC分类号： G06F1/12

摘要： An asynchronous interface circuit for transferring a data stream between different clock domains, the asynchronous interface circuits includes a data holding circuit for sequentially receiving and transferring data of the data stream in synchronism with a first clock signal, and holding the received data until an input of a next data, an asynchronous memory for sequentially receiving the data held in the data holding circuit in synchronism with the first clock signal and for outputting the data in the order of inputting in synchronism with a second clock signal. The asynchronous interface circuit further includes a monitor for detecting an operating state of the asynchronous memory, and a selector for selecting one of the data output from the asynchronous memory and the data output from the data holding circuit on the basis of a detecting result of the monitor.

摘要翻译： 一种用于在不同时钟域之间传送数据流的异步接口电路，异步接口电路包括数据保持电路，用于与第一时钟信号同步地顺序地接收和传送数据流的数据，并保持所接收的数据直到输入 下一个数据，异步存储器，用于与第一时钟信号同步地顺序地接收保存在数据保持电路中的数据，并以与第二时钟信号同步的顺序输出数据。 异步接口电路还包括用于检测异步存储器的操作状态的监视器，以及用于从异步存储器输出的数据中的一个和从数据保持电路输出的数据的选择器， 监控。

公开(公告)号：US20120254636A1

公开(公告)日：2012-10-04

申请号：US13402274

申请日：2012-02-22

申请人： Nina TSUKAMOTO ,  Yuji Hanaoka ,  Terumasa Haneda ,  Atsushi Uchida ,  Yoko Kawano

发明人： Nina TSUKAMOTO ,  Yuji Hanaoka ,  Terumasa Haneda ,  Atsushi Uchida ,  Yoko Kawano

IPC分类号： G06F1/30 ,  G06F12/16

CPC分类号： G06F1/30 ,  G06F11/1441 ,  G06F12/0868 ,  G06F2212/1032 ,  G06F2212/262 ,  Y02D10/13

摘要： A control apparatus includes a capacitor to store electric power supplied from the power supply unit and to supply the stored electric power to the control apparatus when the power supply from the power supply unit is stopped, a first nonvolatile memory, a second nonvolatile memory, a first controller, and a second controller. The first controller writes the data, stored in the cache memory, into the first nonvolatile memory when the external power supply is stopped verifies whether the data stored in the first nonvolatile memory is normal, and sends information of area where the data in the first nonvolatile memory is not normal when the verification indicates that the writing is not normal. And the second controller writes the information sent from the first controller into the second nonvolatile memory.

摘要翻译： 控制装置包括电容器，用于存储从电源单元提供的电力，并且当来自电源单元的电源停止时，将存储的电力提供给控制装置，第一非易失性存储器，第二非易失性存储器， 第一控制器和第二控制器。 当外部电源停止时，第一控制器将存储在高速缓冲存储器中的数据写入第一非易失性存储器，验证存储在第一非易失性存储器中的数据是否正常，并且发送第一非易失性存储器中的数据的区域的信息 当验证表明写入不正常时，内存不正常。 并且第二控制器将从第一控制器发送的信息写入第二非易失性存储器。