公开(公告)号：US20120056201A1

公开(公告)日：2012-03-08

申请号：US13320243

申请日：2010-04-27

申请人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Taro Nishiguchi ,  Makoto Sasaki ,  Shinsuke Fujiwara ,  Yasuo Namikawa

发明人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Taro Nishiguchi ,  Makoto Sasaki ,  Shinsuke Fujiwara ,  Yasuo Namikawa

IPC分类号： H01L29/739

CPC分类号： H01L29/7802 ,  C30B23/00 ,  C30B29/36 ,  C30B33/06 ,  H01L21/02378 ,  H01L21/02529 ,  H01L21/2007 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395

摘要： An IGBT, which is a vertical type IGBT allowing for reduced on-resistance while restraining defects from being produced, includes: a silicon carbide substrate, a drift layer, a well region, an n+ region, an emitter contact electrode, a gate oxide film, a gate electrode, and a collector electrode. The silicon carbide substrate includes: a base layer made of silicon carbide and having p type conductivity; and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. The base layer has a p type impurity concentration exceeding 1×1018 cm−3.

摘要翻译： IGBT是一种允许在抑制缺陷产生的同时降低导通电阻的垂直型IGBT，包括：碳化硅衬底，漂移层，阱区，n +区，发射极接触电极，栅极氧化膜 ，栅电极和集电极。 碳化硅基板包括：由碳化硅制成并具有p型导电性的基底层; 以及由单晶碳化硅制成并设置在基底层上的SiC层。 基极层的p型杂质浓度超过1×1018cm-3。

公开(公告)号：US20120056202A1

公开(公告)日：2012-03-08

申请号：US13320247

申请日：2010-04-27

申请人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

发明人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

IPC分类号： H01L29/24

CPC分类号： H01L29/7802 ,  C30B23/00 ,  C30B29/36 ,  C30B33/06 ,  H01L21/02378 ,  H01L21/02529 ,  H01L21/2007 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395

摘要： A MOSFET, which is a semiconductor device allowing for reduced on-resistance while restraining stacking faults from being produced due to heat treatment in a device manufacturing process, includes: a silicon carbide substrate; an active layer made of single-crystal silicon carbide and disposed on one main surface of the silicon carbide substrate; a source contact electrode disposed on the active layer; and a drain electrode formed on the other main surface of the silicon carbide substrate. The silicon carbide substrate includes: a base layer made of silicon carbide; and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. Further, the base layer has an impurity concentration greater than 2×1019 cm−3, and the SiC layer has an impurity concentration greater than 5×1018 cm−3 and smaller than 2×1019 cm−3.

摘要翻译： 一种MOSFET，其是在器件制造工艺中由于热处理而允许抑制堆垛层错而产生降低的导通电阻的半导体器件，包括：碳化硅衬底; 由单晶碳化硅构成的有源层，设置在碳化硅基板的一个主面上; 设置在有源层上的源极接触电极; 以及形成在碳化硅衬底的另一个主表面上的漏电极。 碳化硅基板包括：由碳化硅制成的基层; 以及由单晶碳化硅制成并设置在基底层上的SiC层。 此外，基底层的杂质浓度大于2×1019cm-3，并且SiC层的杂质浓度大于5×1018cm-3且小于2×1019cm-3。

公开(公告)号：US20120012862A1

公开(公告)日：2012-01-19

申请号：US13258801

申请日：2010-09-29

申请人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Shinsuke Fujiwara ,  Yasuo Namikawa ,  Takeyoshi Masuda

发明人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Shinsuke Fujiwara ,  Yasuo Namikawa ,  Takeyoshi Masuda

IPC分类号： H01L29/24 ,  H01L21/04

CPC分类号： H01L29/7802 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0475 ,  H01L21/187 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/66068

摘要： A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide and a SiC substrate made of single-crystal silicon carbide; and connecting the base substrate and SiC substrate to each other by forming an intermediate layer, which is made of carbon that is a conductor, between the base substrate and the SiC substrate.

摘要翻译： 制造碳化硅基板的方法包括以下步骤：制备由碳化硅制成的基底基板和由单晶碳化硅制成的SiC基板; 并且通过在基底基板和SiC基板之间形成由导电体的碳制成的中间层，将基底基板与SiC基板相互连接。

公开(公告)号：US20120025208A1

公开(公告)日：2012-02-02

申请号：US13258907

申请日：2010-09-29

申请人： Taro Nishiguchi ,  Takeyoshi Masuda ,  Makoto Sasaki ,  Shin Harada ,  Yasuo Namikawa ,  Shinsuke Fujiwara

发明人： Taro Nishiguchi ,  Takeyoshi Masuda ,  Makoto Sasaki ,  Shin Harada ,  Yasuo Namikawa ,  Shinsuke Fujiwara

IPC分类号： H01L29/161 ,  H01L21/762

CPC分类号： H01L29/7802 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0475 ,  H01L21/187 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/66068

摘要： A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide and a SiC substrate made of single-crystal silicon carbide; forming a Si film made of silicon on a main surface of the base substrate; fabricating a stacked substrate by placing the SiC substrate on and in contact with the Si film; and connecting the base substrate and the SiC substrate to each other by heating the stacked substrate to convert, into silicon carbide, at least a region making contact with the base substrate and a region making contact with the SiC substrate in the Si film.

摘要翻译： 制造碳化硅基板的方法包括以下步骤：制备由碳化硅制成的基底基板和由单晶碳化硅制成的SiC基板; 在所述基底基板的主表面上形成由硅制成的Si膜; 通过将SiC衬底置于Si膜上并与其接触来制造堆叠衬底; 并且通过加热所述堆叠的基板将所述基底基板和所述SiC基板彼此连接，以将至少与所述基底基板接触的区域和与所述Si膜中的所述SiC基板接触的区域转化为碳化硅。

公开(公告)号：US20120126251A1

公开(公告)日：2012-05-24

申请号：US13388691

申请日：2011-02-25

申请人： Makoto Sasaki ,  Shin Harada ,  Takeyoshi Masuda ,  Keiji Wada ,  Hiroki Inoue ,  Taro Nishiguchi ,  Kyoko Okita ,  Yasuo Namikawa ,  Taku Horii

发明人： Makoto Sasaki ,  Shin Harada ,  Takeyoshi Masuda ,  Keiji Wada ,  Hiroki Inoue ,  Taro Nishiguchi ,  Kyoko Okita ,  Yasuo Namikawa ,  Taku Horii

IPC分类号： H01L29/24 ,  H01L21/04

CPC分类号： H01L29/7802 ,  H01L21/2007 ,  H01L21/3247 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/66068

摘要： A method for manufacturing a silicon carbide substrate achieves reduced manufacturing cost. The method includes the steps of: preparing a base substrate and a SiC substrate; fabricating a stacked substrate by stacking the base substrate and the SiC substrate; fabricating a connected substrate by heating the stacked substrate; transferring a void, formed at a connection interface, in a thickness direction of the connected substrate by heating the connected substrate to cause the base substrate to have a temperature higher than that of the SiC substrate; and removing the void by removing a region including a main surface of the base substrate opposite to the SiC substrate.

摘要翻译： 制造碳化硅衬底的方法降低了制造成本。 该方法包括以下步骤：制备基底和SiC衬底; 通过堆叠基底基板和SiC基板来制造堆叠的基板; 通过加热堆叠的基板来制造连接的基板; 通过加热连接的基板，在连接的基板的厚度方向上形成在连接界面处形成的空隙，使得基底基板的温度高于SiC基板的温度; 并且通过去除包括与SiC衬底相对的基底衬底的主表面的区域来去除空隙。

公开(公告)号：US08435866B2

公开(公告)日：2013-05-07

申请号：US13256991

申请日：2010-09-28

申请人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

发明人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

IPC分类号： H01L21/306 ,  H01L21/304

CPC分类号： C30B29/36 ,  C30B33/06

摘要： At least one single crystal substrate, each having a backside surface and made of silicon carbide, and a supporting portion having a main surface and made of silicon carbide, are prepared. In this preparing step, at least one of the backside surface and main surface is formed by machining. By this forming step, a surface layer having distortion in the crystal structure is formed on at least one of the backside surface and main surface. The surface layer is removed at least partially. Following this removing step, the backside surface and main surface are connected to each other.

摘要翻译： 制备至少一个具有背面并由碳化硅制成的单晶基板和具有主表面并由碳化硅制成的支撑部分。 在该制备步骤中，通过机械加工形成背面和主表面中的至少一个。 通过该形成步骤，在背面和主面中的至少一个上形成有晶体结构变形的表层。 表面层至少部分去除。 在该去除步骤之后，背面和主表面彼此连接。

公开(公告)号：USD651991S1

公开(公告)日：2012-01-10

申请号：US29379460

申请日：2010-11-19

申请人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Shinsuke Fujiwara ,  Yasuo Namikawa

设计人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Shinsuke Fujiwara ,  Yasuo Namikawa

公开(公告)号：US20120061687A1

公开(公告)日：2012-03-15

申请号：US13319599

申请日：2010-04-27

申请人： Shin Harada ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

发明人： Shin Harada ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

IPC分类号： H01L29/16

CPC分类号： H01L29/7802 ,  C30B23/00 ,  C30B29/36 ,  C30B33/06 ,  H01L21/02378 ,  H01L21/02529 ,  H01L21/2007 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395

摘要： A silicon carbide substrate, which allows for reduced resistivity in the thickness direction thereof while restraining stacking faults from being produced due to heat treatment, includes: a base layer made of silicon carbide; and a SiC layer made of single-crystal silicon carbide and disposed on one main surface of the base layer. The base layer has an impurity concentration greater than 2×1019 cm−3. Further, the SiC layer has an impurity concentration greater than 5×1018 cm−3 and smaller than 2×1019 cm−3.

摘要翻译： 一种碳化硅衬底，其允许在其抑制由于热处理而产生的堆垛层错的同时在其厚度方向上具有降低的电阻率，包括：由碳化硅制成的基底层; 以及由单晶碳化硅制成并设置在基层的一个主表面上的SiC层。 基层的杂质浓度大于2×10 19 cm -3。 此外，SiC层的杂质浓度大于5×10 18 cm -3，小于2×10 19 cm -3。

公开(公告)号：US20120056203A1

公开(公告)日：2012-03-08

申请号：US13320250

申请日：2010-04-27

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Taro Nishiguchi ,  Makoto Sasaki ,  Yasuo Namikawa ,  Shinsuke Fujiwara

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Taro Nishiguchi ,  Makoto Sasaki ,  Yasuo Namikawa ,  Shinsuke Fujiwara

IPC分类号： H01L29/12

CPC分类号： H01L29/1608 ,  H01L29/32 ,  H01L29/66068 ,  H01L29/808

摘要： A JFET, which is a semiconductor device allowing for reduced manufacturing cost, includes: a silicon carbide substrate; an active layer made of single-crystal silicon carbide and disposed on one main surface of the silicon carbide substrate; a source electrode disposed on the active layer; and a drain electrode formed on the active layer and separated from the source electrode. The silicon carbide substrate includes: a base layer made of single-crystal silicon carbide, and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. The SiC layer has a defect density smaller than that of the base layer.

摘要翻译： 作为允许降低制造成本的半导体器件的JFET包括：碳化硅衬底; 由单晶碳化硅构成的有源层，设置在碳化硅基板的一个主面上; 设置在所述有源层上的源电极; 以及形成在有源层上并与源电极分离的漏电极。 碳化硅基板包括：由单晶碳化硅制成的基底层和由单晶碳化硅制成并设置在基底层上的SiC层。 SiC层的缺陷密度小于基底层的缺陷密度。

公开(公告)号：US20110175107A1

公开(公告)日：2011-07-21

申请号：US13005714

申请日：2011-01-13

申请人： Taro NISHIGUCHI ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

发明人： Taro NISHIGUCHI ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

IPC分类号： H01L29/16

CPC分类号： H01L21/02378 ,  H01L21/02002 ,  H01L21/02529 ,  H01L21/02667 ,  H01L21/30625 ,  H01L29/1608

摘要： A base portion is made of silicon carbide and has a main surface. At least one silicon carbide layer is provided on the main surface of the base portion in a manner exposing a region of the main surface along an outer edge of the main surface. At least one protection layer is provided on this region of the main surface of the base portion along the outer edge of the main surface. Thus, a silicon carbide substrate can be polished with high in-plane uniformity.

摘要翻译： 基部由碳化硅制成并具有主表面。 至少一个碳化硅层以沿着主表面的外边缘露出主表面的区域的方式设置在基部的主表面上。 沿着主表面的外缘在基部的主表面的该区域上设置至少一个保护层。 因此，可以以高的面内均匀性抛光碳化硅衬底。