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    IDLE POWER REDUCTION FOR MEMORY SUBSYSTEMS
    1.
    发明申请
    IDLE POWER REDUCTION FOR MEMORY SUBSYSTEMS 有权
    空闲功率减少用于存储器子系统

    公开(公告)号：US20130042127A1

    公开(公告)日：2013-02-14

    申请号：US13206888

    申请日：2011-08-10

    申请人： Tessil Thomas ,  Baskaran Ganesan ,  Sampath Dakshinamurthy

    发明人： Tessil Thomas ,  Baskaran Ganesan ,  Sampath Dakshinamurthy

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3225 ,  G06F1/26 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3237 ,  G06F1/3275 ,  Y02D10/128 ,  Y02D10/14 ,  Y02D50/20

    摘要： Embodiments of the invention describe systems and processes directed towards reducing memory subsystem idle power consumption. Embodiments of the invention enable low power states for various components of a memory subsystem under certain operating conditions, and exiting said low power states under certain operating conditions.Embodiments of the invention may comprise of logic, modules or any combination thereof, to detect operating conditions in a computing system. Some of these operating conditions may include, but are not limited to, a memory controller being empty of transactions directed towards its respective memory unit(s), a processor core executing a processor low-power mode, and a processor socket (operatively coupling the processing core and the memory unit) executing an idle mode. In response to detecting said operating conditions, embodiments of the invention may execute a low-power idle state for the memory unit(s) and various components of the memory subsystem.

    摘要翻译： 本发明的实施例描述了旨在减少存储器子系统空闲功耗的系统和过程。 本发明的实施例使得能够在某些操作条件下存储子系统的各种组件的低功率状态，并且在某些操作条件下退出所述低功率状态。 本发明的实施例可以包括用于检测计算系统中的操作条件的逻辑，模块或其任何组合。 这些操作条件中的一些可以包括但不限于存储器控制器，其不涉及指向其相应存储器单元的事务，执行处理器低功率模式的处理器核心和处理器插座（可操作地耦合 处理核心和存储器单元）执行空闲模式。 响应于检测到所述操作条件，本发明的实施例可以为存储器单元和存储器子系统的各种组件执行低功率空闲状态。

    Opportunistic transmission of software state information within a link based computing system
    3.
    发明授权
    Opportunistic transmission of software state information within a link based computing system 有权
    基于链路的计算系统中的软件状态信息的机会传递

    公开(公告)号：US08122175B2

    公开(公告)日：2012-02-21

    申请号：US12790383

    申请日：2010-05-28

    申请人： Keshavram N. Murty ,  Tessil Thomas ,  Keshavan Tiruvallur

    发明人： Keshavram N. Murty ,  Tessil Thomas ,  Keshavan Tiruvallur

    IPC分类号： G06F13/14

    CPC分类号： G06F11/3664

    摘要： A method is described that involves determining that software state information of program code is to be made visible to a monitoring system. The method also involves initiating the writing of the software state information into a register. The method also involves waiting for the software state information to be placed onto a link within a link based computing system.

    摘要翻译： 描述了一种方法，其涉及确定程序代码的软件状态信息对监视系统可见。 该方法还涉及开始将软件状态信息写入寄存器。 该方法还涉及等待​​软件状态信息被放置在基于链路的计算系统内的链路上。

    Memory Command Issue Rate Controller
    6.
    发明申请
    Memory Command Issue Rate Controller 审中-公开
    存储器命令发布速率控制器

    公开(公告)号：US20080162855A1

    公开(公告)日：2008-07-03

    申请号：US11854386

    申请日：2007-09-12

    申请人： Tessil Thomas

    发明人： Tessil Thomas

    IPC分类号： G06F12/00

    CPC分类号： G06F13/161

    摘要： Method and apparatus to reduce latency of command while maintaining the thermal level of a memory in a safe value is disclosed. A memory request with or without a command to a memory may be scheduled by a memory request scheduler. If the memory request has the command to the memory then a memory command credit counter for that memory may be decreased. If the memory request does not have the command to the memory then the memory command credit counter for that memory may be increased. The increased credits of the memory command credit counter may be used to execute the memory requests frequently and the latency of the command may thus be reduced.

    摘要翻译： 公开了一种在将存储器的热水平保持在安全值的同时降低命令的等待时间的方法和装置。 具有或不具有对存储器的命令的存储器请求可以由存储器请求调度器调度。 如果存储器请求具有对存储器的命令，则可以减少该存储器的存储器命令积分计数器。 如果存储器请求没有对存储器的命令，则可以增加该存储器的存储器命令积分计数器。 可以使用存储器命令信用计数器的增加的信用来频繁地执行存储器请求，因此可以减少命令的等待时间。

    MEMORY LINK POWER MANAGEMENT
    8.
    发明申请
    MEMORY LINK POWER MANAGEMENT 有权
    存储器链接电源管理

    公开(公告)号：US20130042126A1

    公开(公告)日：2013-02-14

    申请号：US13206923

    申请日：2011-08-10

    申请人： Baskaran Ganesan ,  Suresh Sugumar ,  Vijayanand Naik ,  Tessil Thomas

    发明人： Baskaran Ganesan ,  Suresh Sugumar ,  Vijayanand Naik ,  Tessil Thomas

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3225 ,  G06F1/3237 ,  G06F1/3275 ,  Y02D10/128 ,  Y02D10/14 ,  Y02D50/20

    摘要： Embodiments of the invention describe systems and processes directed towards improving link power-management during memory subsystem idle states. Embodiments of the invention control memory link operations when various components of a memory subsystem enter low power states under certain operating conditions. Embodiments of the invention similarly describe exiting low power states for memory links and various components of a memory subsystem upon detecting certain operating conditions.Embodiments of the invention may detect operating conditions in a computing system. Some of these operating conditions may include, but are not limited to, a memory controller being empty of transactions directed towards a memory unit, a processor core executing a processor low-power mode, and a processor socket executing an idle mode. In response to detecting said operating conditions, embodiments of the invention may execute a low-power idle state for the memory unit and various components of the memory subsystem.

    摘要翻译： 本发明的实施例描述了在存储器子系统空闲状态期间改进链路功率管理的系统和过程。 当存储器子系统的各个组件在某些操作条件下进入低功率状态时，本发明的实施例控制存储器连接操作。 本发明的实施例类似地描述了在检测到某些操作条件时存储器链路和存储器子系统的各种组件的退出低功率状态。 本发明的实施例可以检测计算系统中的操作条件。 这些操作条件中的一些可以包括但不限于存储器控制器，其不涉及指向存储器单元的事务，执行处理器低功率模式的处理器核心以及执行空闲模式的处理器插座。 响应于检测到所述操作条件，本发明的实施例可以为存储器单元和存储器子系统的各种组件执行低功率空闲状态。