公开(公告)号：US20110115471A1

公开(公告)日：2011-05-19

申请号：US12620438

申请日：2009-11-17

申请人： Tetsuo Sato ,  Matsuura Nobuyoshi ,  Ryotaro Kudo ,  Hideo Ishii ,  Shin Chiba

发明人： Tetsuo Sato ,  Matsuura Nobuyoshi ,  Ryotaro Kudo ,  Hideo Ishii ,  Shin Chiba

IPC分类号： G01R19/00

CPC分类号： G01R19/0092

摘要： A method can include obtaining a voltage across a first transistor as an obtained voltage. The method can also include multiplying the obtained voltage by a predetermined multiple M to yield a multiplied voltage. The method can further include applying the multiplied voltage to a second transistor, wherein the second transistor is N times smaller than the first transistor. The method can additionally include providing an output current of the second transistor as an M/N scaled estimate of an output current of the first transistor.

摘要翻译： 一种方法可以包括获得跨第一晶体管的电压作为获得的电压。 该方法还可以包括将获得的电压乘以预定的倍数M以产生倍增的电压。 该方法还可以包括将倍增电压施加到第二晶体管，其中第二晶体管比第一晶体管小N倍。 该方法还可以包括提供第二晶体管的输出电流作为第一晶体管的输出电流的M / N定标估计。

公开(公告)号：US08314606B2

公开(公告)日：2012-11-20

申请号：US12620438

申请日：2009-11-17

申请人： Tetsuo Sato ,  Matsuura Nobuyoshi ,  Ryotaro Kudo ,  Hideo Ishii ,  Shin Chiba

发明人： Tetsuo Sato ,  Matsuura Nobuyoshi ,  Ryotaro Kudo ,  Hideo Ishii ,  Shin Chiba

IPC分类号： G01R19/00 ,  G01R31/26

CPC分类号： G01R19/0092

摘要： A method can include obtaining a voltage across a first transistor as an obtained voltage. The method can also include multiplying the obtained voltage by a predetermined multiple M to yield a multiplied voltage. The method can further include applying the multiplied voltage to a second transistor, wherein the second transistor is N times smaller than the first transistor. The method can additionally include providing an output current of the second transistor as an M/N scaled estimate of an output current of the first transistor.

摘要翻译： 一种方法可以包括获得跨第一晶体管的电压作为获得的电压。 该方法还可以包括将获得的电压乘以预定的倍数M以产生倍增的电压。 该方法还可以包括将倍增电压施加到第二晶体管，其中第二晶体管比第一晶体管小N倍。 该方法还可以包括提供第二晶体管的输出电流作为第一晶体管的输出电流的M / N定标估计。

公开(公告)号：US09812942B2

公开(公告)日：2017-11-07

申请号：US13347197

申请日：2012-01-10

申请人： Tetsuo Sato ,  Ryotaro Kudo ,  Hideo Ishii ,  Kenichi Nakano

发明人： Tetsuo Sato ,  Ryotaro Kudo ,  Hideo Ishii ,  Kenichi Nakano

IPC分类号： G05F1/00 ,  H02M1/088 ,  H02M3/158 ,  H02M1/00

CPC分类号： H02M1/088 ,  H02M3/158 ,  H02M2001/0054 ,  Y02B70/1491

摘要： A step down convertor with a distributed driving system. In one embodiment, an apparatus is disclosed that includes an inductor coupled to an output node. The apparatus also includes first and second circuits. The first circuit can transmit current to the output node via the inductor, and the second can transmit current to the output node via the inductor. The apparatus also includes a third circuit for modifying operational aspects of the first circuit or the second circuit based on a magnitude of current flowing through the inductor.

公开(公告)号：US20130176015A1

公开(公告)日：2013-07-11

申请号：US13347197

申请日：2012-01-10

申请人： Tetsuo Sato ,  Ryotaro Kudo ,  Hideo Ishii ,  Kenichi Nakano

发明人： Tetsuo Sato ,  Ryotaro Kudo ,  Hideo Ishii ,  Kenichi Nakano

IPC分类号： G05F3/16

CPC分类号： H02M1/088 ,  H02M3/158 ,  H02M2001/0054 ,  Y02B70/1491

摘要： A step down convertor with a distributed driving system. In one embodiment, an apparatus is disclosed that includes an inductor coupled to an output node. The apparatus also includes first and second circuits. The first circuit can transmit current to the output node via the inductor, and the second can transmit current to the output node via the inductor. The apparatus also includes a third circuit for modifying operational aspects of the first circuit or the second circuit based on a magnitude of current flowing through the inductor.

摘要翻译： 具有分布式驱动系统的降压转换器。 在一个实施例中，公开了一种包括耦合到输出节点的电感器的装置。 该装置还包括第一和第二电路。 第一个电路可以通过电感将电流传输到输出节点，而第二个电路可以通过电感将电流传输到输出节点。 该装置还包括第三电路，用于基于流过电感器的电流的大小来修改第一电路或第二电路的操作方面。

公开(公告)号：US08360636B2

公开(公告)日：2013-01-29

申请号：US12574588

申请日：2009-10-06

申请人： Tetsuo Sato ,  Ryotaro Kudo

发明人： Tetsuo Sato ,  Ryotaro Kudo

IPC分类号： G01K7/00

CPC分类号： G01K7/00 ,  G01K1/026 ,  G01K3/00 ,  G01K7/01 ,  G01K2003/145 ,  G06F1/206 ,  G06F1/26 ,  H01L23/34 ,  H01L2924/0002 ,  H05K1/0201 ,  H05K1/0262 ,  H05K2201/10151 ,  H05K2201/10166 ,  H05K2203/163 ,  Y02D10/16 ,  H01L2924/00

摘要： An apparatus, in one embodiment, can include a configuration including a plurality of heat generation devices. The apparatus also includes a plurality of thermal sensors respectively, operably connected to each of the plurality of heat generation devices, wherein each thermal sensor of the plurality of thermal sensors includes a respective output terminal configured to provide a voltage representative of the temperature of the respective heat generation device. The apparatus further includes an output circuit configured to output the highest temperature information among the heat generation devices. The output terminals of the plurality of thermal sensors are tied together. A corresponding method is also discussed.

摘要翻译： 在一个实施例中，装置可以包括包括多个发热装置的构造。 该装置还包括分别可操作地连接到多个发热装置中的每一个的多个热传感器，其中多个热传感器中的每个热传感器包括相应的输出端子，其被配置为提供代表相应 发热装置。 该装置还包括：输出电路，被配置为在发热装置之间输出最高温度信息。 多个热传感器的输出端子被连接在一起。 还讨论了相应的方法。

公开(公告)号：US20090256537A1

公开(公告)日：2009-10-15

申请号：US12101665

申请日：2008-04-11

申请人： Tetsuo Sato ,  Masato Ono ,  Ryotaro Kudo

发明人： Tetsuo Sato ,  Masato Ono ,  Ryotaro Kudo

IPC分类号： G05F1/00

CPC分类号： H02M3/1584 ,  H02M1/36

摘要： A multiphase voltage regulator system comprises a microcontroller unit (MCU) including a reference voltage generator, and a timing generator for generating n-phase start timing signals; a load for receiving an output voltage; a comparator comparing the reference voltage and output voltage to generate a comparison result; and at least n points of load (POLs) coupled between the MCU and load for controlling output voltage in response to the n-phase start timing signals and the comparison result. Each POL may include a high-side and low-side transistor; and a D-FlipFlop, the D terminal coupled High, the clock terminal coupled to receive a control signal based on a respective one of the n-phase start timing signals, the Q terminal coupled to drive the high-side transistor, the /Q terminal coupled to drive the low-side transistor, and the reset terminal coupled to receive a reset control signal based on the comparison result.

摘要翻译： 多相电压调节器系统包括一个包括参考电压发生器的微控制器单元（MCU）和用于产生n相启动定时信号的定时发生器; 用于接收输出电压的负载; 比较器比较参考电压和输出电压以产生比较结果; 以及耦合在MCU和负载之间的至少n个负载点（POL），用于响应于n相开始定时信号和比较结果来控制输出电压。 每个POL可以包括高边和低边晶体管; 和D-FlipFlop，D端耦合高电平，时钟端子被耦合以基于n相开始定时信号中的相应一个接收控制信号，Q端耦合以驱动高侧晶体管，/ Q 端子耦合以驱动低侧晶体管，并且复位端子被耦合以基于比较结果接收复位控制信号。

公开(公告)号：US09570985B2

公开(公告)日：2017-02-14

申请号：US12829975

申请日：2010-07-02

申请人： Tetsuo Sato ,  Jim Comstock ,  Ryotaro Kudo ,  Masashi Koyano

发明人： Tetsuo Sato ,  Jim Comstock ,  Ryotaro Kudo ,  Masashi Koyano

IPC分类号： G05F1/00 ,  H02M3/158 ,  H02M1/00

CPC分类号： H02M3/1588 ,  H02M2001/0019 ,  H02M2001/0022 ,  Y02B70/1466

摘要： According to an embodiment of the invention, an apparatus includes a microprocessor-based pulse-width modulation controller configured to generate a pulse-width modulation signal, and a synchronous converter including a first transistor, a second transistor, a first driver, and a second driver. The apparatus further includes a drive voltage generator configured to generate a drive voltage for the synchronous converter. The drive voltage generator is further configured to generate the drive voltage based on a measured output current and a measured input voltage.

摘要翻译： 根据本发明的实施例，一种装置包括：微处理器的脉冲宽度调制控制器，被配置为产生脉宽调制信号;以及同步转换器，包括第一晶体管，第二晶体管，第一驱动器和第二驱动器 司机。 该装置还包括被配置为产生用于同步转换器的驱动电压的驱动电压发生器。 驱动电压发生器还被配置为基于测量的输出电流和测量的输入电压来产生驱动电压。

公开(公告)号：US07898233B2

公开(公告)日：2011-03-01

申请号：US12101665

申请日：2008-04-11

申请人： Tetsuo Sato ,  Masato Ono ,  Ryotaro Kudo

发明人： Tetsuo Sato ,  Masato Ono ,  Ryotaro Kudo

IPC分类号： G05F1/40

CPC分类号： H02M3/1584 ,  H02M1/36

摘要： A multiphase voltage regulator system comprises a microcontroller unit (MCU) including a reference voltage generator, and a timing generator for generating n-phase start timing signals; a load for receiving an output voltage; a comparator comparing the reference voltage and output voltage to generate a comparison result; and at least n points of load (POLs) coupled between the MCU and load for controlling output voltage in response to the n-phase start timing signals and the comparison result. Each POL may include a high-side and low-side transistor; and a D-FlipFlop, the D terminal coupled High, the clock terminal coupled to receive a control signal based on a respective one of the n-phase start timing signals, the Q terminal coupled to drive the high-side transistor, the /Q terminal coupled to drive the low-side transistor, and the reset terminal coupled to receive a reset control signal based on the comparison result.

摘要翻译： 多相电压调节器系统包括一个包括参考电压发生器的微控制器单元（MCU）和用于产生n相启动定时信号的定时发生器; 用于接收输出电压的负载; 比较器比较参考电压和输出电压以产生比较结果; 以及耦合在MCU和负载之间的至少n个负载点（POL），用于响应于n相开始定时信号和比较结果来控制输出电压。 每个POL可以包括高边和低边晶体管; 和D-FlipFlop，D端耦合高电平，时钟端子被耦合以基于n相开始定时信号中的相应一个接收控制信号，Q端耦合以驱动高侧晶体管，/ Q 端子耦合以驱动低侧晶体管，并且复位端子被耦合以基于比较结果接收复位控制信号。

公开(公告)号：US20110002358A1

公开(公告)日：2011-01-06

申请号：US12574588

申请日：2009-10-06

申请人： Tetsuo Sato ,  Ryotaro Kudo

发明人： Tetsuo Sato ,  Ryotaro Kudo

IPC分类号： G01K7/00

CPC分类号： G01K7/00 ,  G01K1/026 ,  G01K3/00 ,  G01K7/01 ,  G01K2003/145 ,  G06F1/206 ,  G06F1/26 ,  H01L23/34 ,  H01L2924/0002 ,  H05K1/0201 ,  H05K1/0262 ,  H05K2201/10151 ,  H05K2201/10166 ,  H05K2203/163 ,  Y02D10/16 ,  H01L2924/00

摘要： An apparatus, in one embodiment, can include a configuration including a plurality of heat generation devices. The apparatus also includes a plurality of thermal sensors respectively, operably connected to each of the plurality of heat generation devices, wherein each thermal sensor of the plurality of thermal sensors includes a respective output terminal configured to provide a voltage representative of the temperature of the respective heat generation device. The apparatus further includes an output circuit configured to output the highest temperature information among the heat generation devices. The output terminals of the plurality of thermal sensors are tied together. A corresponding method is also discussed.

摘要翻译： 在一个实施例中，装置可以包括包括多个发热装置的构造。 该装置还包括分别可操作地连接到多个发热装置中的每一个的多个热传感器，其中多个热传感器中的每个热传感器包括相应的输出端子，其被配置为提供代表相应 发热装置。 该装置还包括：输出电路，被配置为在发热装置之间输出最高温度信息。 多个热传感器的输出端子被连接在一起。 还讨论了相应的方法。

公开(公告)号：US5512888A

公开(公告)日：1996-04-30

申请号：US253506

申请日：1994-06-03

申请人： Masakazu Hoshino ,  Tetsuo Sato

发明人： Masakazu Hoshino ,  Tetsuo Sato

IPC分类号： G06F13/42 ,  H04L12/413 ,  G08C19/16

CPC分类号： G06F13/4291 ,  H04L12/4135

摘要： In a communications system having a plurality of stations interconnected by a two-line circuit, in which the two-line circuit consists of a data bus circuit for transmitting a series of data bits between at least one sending station and at least one receiving station of the plurality of stations and a clock bus circuit for transmitting clock signals in synchronism with each of the data bits; the data bus circuit sends a signal or a command requesting the receiving station to enter a standby or an execute state after taking in data supplied, while a logic value on the clock bus circuit is fixed. In more detail, the sending station transmits signals to make at least one of the receiving stations enter the standby state after taking in data and then sends data to another receiving station, after which the sending station sends a signal or command to make both the first and second receiving stations simultaneously enter the execute state. The signal or command requesting the standby or execute state is added at the end of a data packet containing a series of data. The data packet includes data to be transferred to the receiving station and an address of the receiving station.

摘要翻译： 在具有通过双线电路互连的多个站的通信系统中，其中双线电路由用于在至少一个发送站和至少一个接收站之间传送一系列数据位的数据总线电路组成 多个站和用于与每个数据位同步发送时钟信号的时钟总线电路; 数据总线电路在接收到所提供的数据之后发送一个信号或命令请求接收站进入待机或执行状态，同时时钟总线电路上的逻辑值是固定的。 更详细地，发送站发送信号，使接收站中的至少一个在接收数据之后进入待机状态，然后将数据发送到另一个接收站，之后发送站发送信号或命令，使第一个 第二接收站同时进入执行状态。 在包含一系列数据的数据包的末尾添加请求待机或执行状态的信号或命令。 数据分组包括要传送到接收站的数据和接收站的地址。