公开(公告)号：US07834962B2

公开(公告)日：2010-11-16

申请号：US12330105

申请日：2008-12-08

申请人： Tetsuya Satake ,  Takumi Nakahata ,  Takanori Okumura ,  Yusuke Yamagata ,  Takeshi Ono ,  Naoki Nakagawa ,  Suguru Nagae

发明人： Tetsuya Satake ,  Takumi Nakahata ,  Takanori Okumura ,  Yusuke Yamagata ,  Takeshi Ono ,  Naoki Nakagawa ,  Suguru Nagae

IPC分类号： G02F1/1333 ,  G02F1/1335

CPC分类号： G02F1/133305 ,  G02F1/133512 ,  G02F2001/133354

摘要： In a liquid crystal display (10) having a curved display surface, long sides of pixel structures (11) are arranged along the curve direction (Y) of the display surface and on a side of counter substrate provided is a black matrix having a black matrix opening (41a) whose length in the curve direction (Y) is not longer than E−L {(T1/2)+(T2/2)+d}/R, assuming that the length of the display surface in the curve direction (Y) is L, the thickness of an array substrate is T1, the thickness of the counter substrate is T2, the size of the gap between the array substrate and the counter substrate is d, the radius of curvature of the curved display surface is R and the length of a long side of a pixel electrode (29) provided in each of the pixel structures (11) is E. It thereby becomes possible to suppress display unevenness resulting from positional misalignment of the two substrates due to curvature and provide a liquid crystal display achieving a high-quality display image.

摘要翻译： 在具有弯曲显示面的液晶显示器（10）中，像素结构（11）的长边沿着显示面的曲线方向（Y）配置，在相对基板的一侧设有具有黑色 假设曲线中的显示面的长度，曲线方向（Y）的长度不长于E-L {（T1 / 2）+（T2 / 2）+ d} / R的矩阵开口41a 方向（Y）为L，阵列基板的厚度为T1，对置基板的厚度为T2，阵列基板与对置基板的间隔尺寸为d，曲面显示面的曲率半径 是R，并且设置在每个像素结构（11）中的像素电极（29）的长边的长度为E.因此，由此可以抑制由于曲率而导致的两个基板的位置偏移导致的显示不均匀，并且提供 实现高质量显示图像的液晶显示器。

公开(公告)号：US20120112194A1

公开(公告)日：2012-05-10

申请号：US13232251

申请日：2011-09-14

申请人： Takeshi Ono ,  Naoki Nakagawa ,  Yusuke Yamagata ,  Kazunori Inoue ,  Nobuaki Ishiga ,  Kensuke Nagayama ,  Naoki Tsumura ,  Toru Takeguchi

发明人： Takeshi Ono ,  Naoki Nakagawa ,  Yusuke Yamagata ,  Kazunori Inoue ,  Nobuaki Ishiga ,  Kensuke Nagayama ,  Naoki Tsumura ,  Toru Takeguchi

IPC分类号： H01L33/08

CPC分类号： H01L29/458 ,  H01L29/42384 ,  H01L29/66765

摘要： It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.

摘要翻译： 本发明的目的是提供一种即使在没有形成高熔点金属阻挡层的情况下也可以改善高温处理后的电特性的技术。 半导体器件包括形成在透明绝缘基板上的栅极电极，具有Si半导体活性膜的半导体层和具有n型导电性的欧姆低电阻Si膜依次形成在具有栅绝缘层的栅电极上 插入在栅电极和半导体层之间的膜，以及直接连接到半导体层并且至少包含铝（Al）的源极和漏极。 在SI半导体活性膜的侧面与源电极和漏极之间的界面附近的第一区域中至少含有氮（N）。

公开(公告)号：US08546804B2

公开(公告)日：2013-10-01

申请号：US13232251

申请日：2011-09-14

申请人： Takeshi Ono ,  Naoki Nakagawa ,  Yusuke Yamagata ,  Kazunori Inoue ,  Nobuaki Ishiga ,  Kensuke Nagayama ,  Naoki Tsumura ,  Toru Takeguchi

发明人： Takeshi Ono ,  Naoki Nakagawa ,  Yusuke Yamagata ,  Kazunori Inoue ,  Nobuaki Ishiga ,  Kensuke Nagayama ,  Naoki Tsumura ,  Toru Takeguchi

IPC分类号： H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  G02F1/136

CPC分类号： H01L29/458 ,  H01L29/42384 ,  H01L29/66765

摘要： It is an object to provide a technique to improve electric characteristics after a high-temperature treatment even when a high melting point metal barrier layer is not formed. A semiconductor device includes a gate electrode formed on a transparent insulation substrate, a semiconductor layer having a Si semiconductor active film and an ohmic low resistance Si film having an n-type conductivity, being formed in this order on the gate electrode with a gate insulation film interposed between the gate electrode and the semiconductor layer, and the source and drain electrodes directly connected to the semiconductor layer and containing at least aluminum (Al). At least nitrogen (N) is contained in a first region that is in the vicinity of an interface between a side surface of the SI semiconductor active film and the source and drain electrodes.

摘要翻译： 本发明的目的是提供一种即使在没有形成高熔点金属阻挡层的情况下也可以改善高温处理后的电特性的技术。 半导体器件包括形成在透明绝缘基板上的栅极电极，具有Si半导体活性膜的半导体层和具有n型导电性的欧姆低电阻Si膜依次形成在具有栅绝缘层的栅电极上 插入在栅电极和半导体层之间的膜，以及直接连接到半导体层并且至少包含铝（Al）的源极和漏极。 在SI半导体活性膜的侧面与源电极和漏极之间的界面附近的第一区域中至少含有氮（N）。

公开(公告)号：US08159749B2

公开(公告)日：2012-04-17

申请号：US12545217

申请日：2009-08-21

申请人： Kazunori Inoue ,  Naoki Tsumura ,  Nobuaki Ishiga ,  Takeshi Ono ,  Naoki Nakagawa ,  Masafumi Agari ,  Yusuke Yamagata ,  Kensuke Nagayama

发明人： Kazunori Inoue ,  Naoki Tsumura ,  Nobuaki Ishiga ,  Takeshi Ono ,  Naoki Nakagawa ,  Masafumi Agari ,  Yusuke Yamagata ,  Kensuke Nagayama

IPC分类号： G02B5/28 ,  G02F1/1335

CPC分类号： G02B1/116 ,  C08K3/08 ,  C09D1/00 ,  C09D7/61 ,  C23C14/0036 ,  C23C14/0641 ,  C23C14/18 ,  G02F1/133502 ,  Y10T428/265

摘要： An antireflection coating is formed on a transparent substrate and includes an Al film having a transmittance of lower than 10% at a wavelength of 550 nm with a thickness of 25 nm and predominantly composed of aluminum (Al), and an Al—N film formed in at least one of an upper layer and a lower layer of the Al film, having a transmittance of equal to or higher than 10% at a wavelength of 550 nm with a thickness of 25 nm, predominantly composed of Al and at least containing a nitrogen (N) element as an additive. A specific resistance of the antireflection coating is equal to or lower than 1.0×10−2 O·cm, and a reflectance of a surface of the Al—N film is equal to or lower than 50% in a visible light region.

摘要翻译： 在透明基板上形成防反射膜，在550nm波长下透射率低于10％的Al膜，厚度为25nm，主要由铝（Al）构成，形成Al-N膜 在Al膜的上层和下层中的至少一层中，在550nm的波长下具有等于或高于10％的透射率，厚度为25nm，主要由Al组成并且至少含有 氮（N）元素作为添加剂。 抗反射涂层的电阻率为1.0×10 -2 O·cm以下，Al-N膜的表面的可反射率在可见光区域为50％以下。

公开(公告)号：US20110198606A1

公开(公告)日：2011-08-18

申请号：US13010281

申请日：2011-01-20

申请人： Koji Oda ,  Tomoyuki Irizumi ,  Naoki Nakagawa ,  Takeshi Ono

发明人： Koji Oda ,  Tomoyuki Irizumi ,  Naoki Nakagawa ,  Takeshi Ono

IPC分类号： H01L33/16 ,  H01L29/786

CPC分类号： H01L29/78696 ,  H01L29/04

摘要： An exemplary aspect of the present invention is a thin film transistor including: a gate electrode formed on a substrate; a gate insulating film that includes a nitride film and covers the gate electrode; and a semiconductor layer that is disposed to be opposed to the gate electrode with the gate insulating film interposed therebetween, and has a microcrystalline semiconductor layer formed in at least an interface in contact with the nitride film, in which the microcrystalline semiconductor layer contains oxygen at a concentration higher than that of contained nitrogen in at least the vicinity of the interface with the nitride film, the nitrogen being diffused from the nitride film.

摘要翻译： 本发明的示例性方面是一种薄膜晶体管，包括：形成在基板上的栅电极; 栅极绝缘膜，其包括氮化物膜并覆盖所述栅电极; 以及半导体层，其被设置为与栅极电极相对设置，其间具有栅极绝缘膜，并且具有形成在至少与氮化物膜接触的界面中的微晶半导体层，其中微晶半导体层包含氧 在至少与氮化物膜的界面附近的浓度高于含氮的浓度，氮从氮化膜扩散。

公开(公告)号：US20090159884A1

公开(公告)日：2009-06-25

申请号：US12335806

申请日：2008-12-16

申请人： Koji ODA ,  Naoki Nakagawa ,  Takeshi Ono ,  Yusuke Uchida

发明人： Koji ODA ,  Naoki Nakagawa ,  Takeshi Ono ,  Yusuke Uchida

IPC分类号： H01L29/78 ,  H01L21/02

CPC分类号： H01L29/4908 ,  H01L29/66765

摘要： A method of manufacturing a thin-film transistor according to an embodiment of the present invention includes the step of forming a gate insulator on a gate electrode. The gate insulator includes at least a first region being in contact with a hydrogenated amorphous silicon film, and a second region positioned below the first region. The first and second regions are deposited using a source gas including NH3, N2, and SiH4, and H2 gas or a mixture of H2 and He. The first region is deposited by setting the flow-rate ratio NH3/SiH4 in a range from 11 to 14 and the second region is deposited by setting the flow-rate ratio NH3/SiH4 to be equal to or less than 4. It is thus possible to provide a thin-film transistor having excellent characteristics and high reliability, a method of manufacturing the same, and a display device including the thin-film transistor mounted thereon.

摘要翻译： 根据本发明的实施例的制造薄膜晶体管的方法包括在栅电极上形成栅极绝缘体的步骤。 栅极绝缘体至少包括与氢化非晶硅膜接触的第一区域和位于第一区域下方的第二区域。 使用包括NH 3，N 2和SiH 4，H 2气体或H 2和He的混合物的源气体来沉积第一和第二区域。 通过将流量比NH3 / SiH4设定在11〜14的范围内来沉积第一区域，并且通过将流量比NH3 / SiH4设定为等于或小于4来沉积第二区域。因此 可以提供具有优异特性和高可靠性的薄膜晶体管，其制造方法以及安装在其上的薄膜晶体管的显示装置。

公开(公告)号：US20130082964A1

公开(公告)日：2013-04-04

申请号：US13633420

申请日：2012-10-02

申请人： Masafumi AGARI ,  Naoki Nakagawa ,  Takeshi Ono ,  Seiichiro Mori ,  Takashi Miyayama ,  Takuji Imamura ,  Tatsuya Nakamura

发明人： Masafumi AGARI ,  Naoki Nakagawa ,  Takeshi Ono ,  Seiichiro Mori ,  Takashi Miyayama ,  Takuji Imamura ,  Tatsuya Nakamura

IPC分类号： G06F3/041

CPC分类号： G06F3/044

摘要： A touch screen includes a base substrate, a bundle of rectangular wirings in a column direction including a plurality of detection column wirings that are electrically connected in common, and a bundle of rectangular wirings in a row direction including a plurality of detection row wirings that are electrically connected in common, the bundle of wirings being formed on the base substrate. Also, a plurality of block areas obtained by dividing an intersection area in which the bundle of wirings in the column direction and the bundle of wirings in the row direction intersect in a plan view are defined, and only the detection column wiring or only the detection row wiring is provided in each of the block areas.

摘要翻译： 触摸屏包括基底，在列方向上包括多个共同电连接的检测列布线的一束矩形布线，以及包括多个检测列布线的行方向的一束矩形布线， 电连接在一起，所述布线束形成在基底基板上。 此外，通过划分其中列方向上的布线束和行方向上的布线束在平面图中相交的交叉区域而获得的多个块区域，并且仅检测列布线或仅检测 在每个块区域中设置行布线。

公开(公告)号：US08487309B2

公开(公告)日：2013-07-16

申请号：US13010281

申请日：2011-01-20

申请人： Koji Oda ,  Tomoyuki Irizumi ,  Naoki Nakagawa ,  Takeshi Ono

发明人： Koji Oda ,  Tomoyuki Irizumi ,  Naoki Nakagawa ,  Takeshi Ono

IPC分类号： H01L29/786

CPC分类号： H01L29/78696 ,  H01L29/04

摘要： An exemplary aspect of the present invention is a thin film transistor including: a gate electrode formed on a substrate; a gate insulating film that includes a nitride film and covers the gate electrode; and a semiconductor layer that is disposed to be opposed to the gate electrode with the gate insulating film interposed therebetween, and has a microcrystalline semiconductor layer formed in at least an interface in contact with the nitride film, in which the microcrystalline semiconductor layer contains oxygen at a concentration higher than that of contained nitrogen in at least the vicinity of the interface with the nitride film, the nitrogen being diffused from the nitride film.

摘要翻译： 本发明的示例性方面是一种薄膜晶体管，包括：形成在基板上的栅电极; 栅极绝缘膜，其包括氮化物膜并覆盖所述栅电极; 以及半导体层，其被设置为与栅极电极相对设置，其间具有栅极绝缘膜，并且具有形成在至少与氮化物膜接触的界面中的微晶半导体层，其中微晶半导体层包含氧 在至少与氮化物膜的界面附近的浓度高于含氮的浓度，氮从氮化膜扩散。

公开(公告)号：US08913025B2

公开(公告)日：2014-12-16

申请号：US13756388

申请日：2013-01-31

申请人： Takuji Imamura ,  Tatsuya Nakamura ,  Seiichiro Mori ,  Takashi Miyayama ,  Masafumi Agari ,  Naoki Nakagawa ,  Takeshi Ono

发明人： Takuji Imamura ,  Tatsuya Nakamura ,  Seiichiro Mori ,  Takashi Miyayama ,  Masafumi Agari ,  Naoki Nakagawa ,  Takeshi Ono

IPC分类号： G06F3/044

CPC分类号： G06F3/044 ,  G06F2203/04111

摘要： In a touch screen, the number of dummy column block region patterns is made smaller than the number of plurality of detection block region patterns. The plurality of detection block region pattern are obtained as a result of dividing a crossing region where a column direction wire bunch and a row direction wire bunch cross each other. The dummy column block region patterns are obtained as a result of dividing a crossing region where a dummy column direction wire bunch and a row direction wire bunch cross each other.

摘要翻译： 在触摸屏中，使虚拟列块区域图案的数量小于多个检测块区域图案的数量。 作为划分列方向线束和行方向线束交叉的交叉区域的结果，获得多个检测块区域图案。 作为将虚拟列方向线束和行方向线束交叉的交叉区域分割的结果，获得虚拟列块区域图案。

公开(公告)号：US09244575B2

公开(公告)日：2016-01-26

申请号：US13633420

申请日：2012-10-02

申请人： Masafumi Agari ,  Naoki Nakagawa ,  Takeshi Ono ,  Seiichiro Mori ,  Takashi Miyayama ,  Takuji Imamura ,  Tatsuya Nakamura

发明人： Masafumi Agari ,  Naoki Nakagawa ,  Takeshi Ono ,  Seiichiro Mori ,  Takashi Miyayama ,  Takuji Imamura ,  Tatsuya Nakamura

IPC分类号： G06F3/041 ,  G06F3/044

CPC分类号： G06F3/044

摘要： A touch screen includes a base substrate, a bundle of rectangular wirings in a column direction including a plurality of detection column wirings that are electrically connected in common, and a bundle of rectangular wirings in a row direction including a plurality of detection row wirings that are electrically connected in common, the bundle of wirings being formed on the base substrate. Also, a plurality of block areas obtained by dividing an intersection area in which the bundle of wirings in the column direction and the bundle of wirings in the row direction intersect in a plan view are defined, and only the detection column wiring or only the detection row wiring is provided in each of the block areas.

摘要翻译： 触摸屏包括基底，在列方向上包括多个共同电连接的检测列布线的一束矩形布线，以及包括多个检测列布线的行方向的一束矩形布线， 电连接在一起，所述布线束形成在基底基板上。 此外，通过划分其中列方向上的布线束和行方向上的布线束在平面图中相交的交叉区域而获得的多个块区域，并且仅检测列布线或仅检测 在每个块区域中设置行布线。