公开(公告)号：US11798979B2

公开(公告)日：2023-10-24

申请号：US17156793

申请日：2021-01-25

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Elizabeth Costner Stewart ,  Jeffrey A. West ,  Thomas D. Bonifield ,  Joseph Andre Gallegos ,  Jay Sung Chun ,  Zhiyi Yu

IPC分类号： H01L49/02 ,  H01L21/02 ,  H01L21/768 ,  H01L21/311

CPC分类号： H01L28/40 ,  H01L21/02211 ,  H01L21/02214 ,  H01L21/02216 ,  H01L21/02263 ,  H01L21/02274 ,  H01L21/31116 ,  H01L21/7682 ,  H01L21/76822 ,  H01L21/76825 ,  H01L21/76837 ,  H01L21/7682 ,  H01L21/76825

摘要： An integrated capacitor on a semiconductor surface on a substrate includes a capacitor dielectric layer including at least one silicon compound material layer on a bottom plate. The capacitor dielectric layer includes a pitted sloped dielectric sidewall. Each of the pits is at least partially filled by one of a plurality of noncontiguous dielectric portions. A conformal dielectric layer may be formed over the noncontiguous dielectric portions. A top metal layer provides a top plate of the capacitor.

公开(公告)号：US11205695B2

公开(公告)日：2021-12-21

申请号：US15850999

申请日：2017-12-21

申请人： Texas Instruments Incorporated

发明人： Elizabeth C. Stewart ,  Jeffrey Alan West ,  Thomas D. Bonifield ,  Jay Sung Chun ,  Byron Lovell Williams

IPC分类号： H01L21/02 ,  H01L23/522 ,  H01L49/02 ,  H01L21/027 ,  H01L21/311

摘要： Methods of fabricating a thick oxide feature on a semiconductor wafer include forming a oxide layer having a thickness of at least six micrometers and depositing a photoresist layer on the oxide layer. The oxide layer has a first etch rate of X with a given etchant, the photoresist layer has a second etch rate of Y with the given etchant and the ratio of X:Y is less than 4:1. Prior to etching the photoresist layer and the oxide layer, the photoresist layer is patterned with a grayscale mask that creates a photoresist layer having a sidewall that forms an angle with the horizontal that is less than or equal to 10 degrees.

公开(公告)号：US10978548B2

公开(公告)日：2021-04-13

申请号：US15348580

申请日：2016-11-10

申请人： Texas Instruments Incorporated

发明人： Elizabeth Costner Stewart ,  Jeffrey A. West ,  Thomas D. Bonifield ,  Joseph Andre Gallegos ,  Jay Sung Chun ,  Zhiyi Yu

IPC分类号： H01L49/02 ,  H01L21/02 ,  H01L21/311

摘要： A method of forming an integrated capacitor on a semiconductor surface on a substrate includes etching a capacitor dielectric layer including at least one silicon compound material layer on a bottom plate which is above and electrically isolated from the semiconductor surface to provide at least one defined dielectric feature having sloped dielectric sidewall portion. A dielectric layer is deposited to at least partially fill pits in the sloped dielectric sidewall portion to smooth a surface of the sloped dielectric sidewall portion. The dielectric layer is etched, and a top plate is then formed on top of the dielectric feature.

公开(公告)号：US20190198604A1

公开(公告)日：2019-06-27

申请号：US15850999

申请日：2017-12-21

申请人： Texas Instruments Incorporated

发明人： Elizabeth C. Stewart ,  Jeffrey Alan West ,  Thomas D. Bonifield ,  Jay Sung Chun ,  Byron Lovell Williams

IPC分类号： H01L49/02 ,  H01L21/027 ,  H01L21/311 ,  H01L21/02 ,  H01L23/522

CPC分类号： H01L28/40 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/0274 ,  H01L21/31116 ,  H01L21/31144 ,  H01L23/5223

摘要： Methods of fabricating a thick oxide feature on a semiconductor wafer include forming a oxide layer having a thickness of at least six micrometers and depositing a photoresist layer on the oxide layer. The oxide layer has a first etch rate of X with a given etchant, the photoresist layer has a second etch rate of Y with the given etchant and the ratio of X:Y is less than 4:1. Prior to etching the photoresist layer and the oxide layer, the photoresist layer is patterned with a grayscale mask that creates a photoresist layer having a sidewall that forms an angle with the horizontal that is less than or equal to 10 degrees.