Soybean event pDAB9582.814.19.1 detection method
    3.
    发明授权
    Soybean event pDAB9582.814.19.1 detection method 有权
    大豆事件pDAB9582.814.19.1检测方法

    公开(公告)号:US08632978B2

    公开(公告)日:2014-01-21

    申请号:US13558982

    申请日:2012-07-26

    IPC分类号: C12Q1/68 C07H21/04 C12P19/34

    CPC分类号: C12Q1/6895 C12Q2600/16

    摘要: Soybean Event pDAB9582.814.19.1 comprises genes encoding Cry1F, Cry1Ac (synpro), and PAT, affording insect resistance and herbicide tolerance to soybean crops containing the event, and enabling methods for crop protection and protection of stored products. The invention provides PCR event detection methods.

    摘要翻译: 大豆事件pDAB9582.814.19.1包含编码Cry1F,Cry1Ac(synpro)和PAT的基因,为含有该事件的大豆作物提供抗昆虫抗性和除草剂耐受性,以及对作物保护和保护储存产品的有效方法。 本发明提供PCR事件检测方法。

    VOLTAGE CLAMPING CIRCUIT
    5.
    发明申请
    VOLTAGE CLAMPING CIRCUIT 有权
    电压钳位电路

    公开(公告)号:US20160126727A1

    公开(公告)日:2016-05-05

    申请号:US14677921

    申请日:2015-04-02

    IPC分类号: H02H9/04

    摘要: A voltage supply for providing a clamped voltage to a circuit element to be protected against electrical overstress (EOS) has a reference voltage module and a voltage clamp module. The reference voltage module has a first field-effect transistor (FET) whose source and drain are connected in series between a programmable reference current source and a first resistor across a power supply. The gate of the first FET is connected to its drain to provide a reference voltage defined by the reference current flowing in the first resistor. The voltage clamp module has a second FET whose gate receives the reference voltage and whose source is connected to provide to the protected circuit element the clamped voltage whose variation is limited by the reference voltage.

    摘要翻译: 用于向要被保护以防止电过压(EOS)的电路元件提供钳位电压的电压源具有参考电压模块和电压钳模块。 参考电压模块具有第一场效应晶体管(FET),其源极和漏极串联在可编程参考电流源和跨电源的第一电阻之间。 第一FET的栅极连接到其漏极,以提供由在第一电阻器中流动的参考电流限定的参考电压。 电压钳模块具有第二FET,其栅极接收参考电压,并且其源极连接以向受保护的电路元件提供变化受参考电压限制的钳位电压。

    Super-Transparent Electrodes for Photovoltaic Applications
    6.
    发明申请
    Super-Transparent Electrodes for Photovoltaic Applications 审中-公开
    用于光伏应用的超透明电极

    公开(公告)号:US20150107660A1

    公开(公告)日:2015-04-23

    申请号:US14129428

    申请日:2012-06-27

    摘要: Super-transparent electrodes for photovoltaic applications are disclosed. In some embodiments, a photovoltaic cell (1) includes an absorber material (16) capable of absorbing solar energy and converting the absorbed energy into electrical current; a window electrode (10) disposed on a light-entry surface of the absorber material (16), the window electrode (10) comprising an anti-reflective coating (ARC) layer (12) and a metallic layer (13), and a rear electrode (18) disposed on a surface of the absorber material (16) in opposing relation to the window electrode (10), wherein the rear electrode (18) in combination with the window electrode (10) are configured to collect electrical current generated in the absorber material (16).

    摘要翻译: 公开了用于光伏应用的超透明电极。 在一些实施例中,光伏电池(1)包括能吸收太阳能并将吸收的能量转换成电流的吸收材料(16) 设置在吸收体材料(16)的光入射面上的窗口电极(10),所述窗口电极(10)包括抗反射涂层(ARC)层(12)和金属层(13),以及 所述后电极(18)与所述窗电极(10)相对设置在所述吸收体材料(16)的表面上,其中与所述窗电极(10)组合的所述后电极(18)被构造成收集产生的电流 在吸收材料(16)中。

    TRUE RANDOM NUMBER GENERATOR WITH REPEATEDLY ACTIVATED OSCILLATOR
    7.
    发明申请
    TRUE RANDOM NUMBER GENERATOR WITH REPEATEDLY ACTIVATED OSCILLATOR 有权
    具有重复激活振荡器的真实随机数发生器

    公开(公告)号:US20150106415A1

    公开(公告)日:2015-04-16

    申请号:US14461445

    申请日:2014-08-18

    IPC分类号: G06F7/58 H03K3/03

    CPC分类号: G06F7/588 H03K3/0315 H03K3/84

    摘要: A true random number generator (RNG) has one or more oscillators and an output register for storing a random number output. Each of the oscillators is activated, successively, in a free-running oscillation phase, and a capture phase during which the oscillator is quiescent. The output register latches during the capture phase of each oscillator an end state of that oscillator at or close to the end of its oscillation phase. The random number output is derived from the latched end states.

    摘要翻译: 真正的随机数生成器(RNG)具有一个或多个振荡器和用于存储随机数输出的输出寄存器。 每个振荡器依次被激活,处于自由运行的振荡阶段以及振荡器静止期间的捕获阶段。 输出寄存器在每个振荡器的捕获阶段锁存该振荡器的结束状态或接近其振荡阶段的结束。 随机数输出是从锁存结束状态得出的。

    SURFACE-TEXTURED CONDUCTIVE GLASS FOR SOLAR CELLS, AND PREPARATION METHOD AND APPLICATION THEREOF
    8.
    发明申请
    SURFACE-TEXTURED CONDUCTIVE GLASS FOR SOLAR CELLS, AND PREPARATION METHOD AND APPLICATION THEREOF 审中-公开
    太阳能电池表面纹理导电玻璃及其制备方法及应用

    公开(公告)号:US20140174521A1

    公开(公告)日:2014-06-26

    申请号:US13822485

    申请日:2012-09-02

    申请人: Yang Wang

    发明人: Yang Wang

    IPC分类号: H01L31/0236

    摘要: Disclosed are surface-textured conductive glass for solar cells, and a preparation method and application thereof. In the surface-textured conductive glass for solar cells, a transparent conductive film is coated on a glass substrate, and the upper surface of the transparent conductive film is textured with nano/micro-scopic U-shaped pits uniformly distributed. The preparation method comprises: coating the transparent conductive film by magnetron sputtering, and then absorbing nano/micro-spheres onto the surface of the transparent conductive film as a mask by using an immersion coating method, followed by increasing the thickness of the transparent conductive film in gaps among the nano/micro-spheres by magnetron sputtering, and finally removing the nano/micro-spheres by using an ultrasonic vibration method to realize the large-scale and low-cost production of the conductive glass with nano/microscopic U-shaped surface texture. The conductive glass obtained by the method above has high repeatability, proper U-shaped texture feature size, high distribution uniformity, high production efficiency and low production cost, and thus is suitable for popularization and applications.

    摘要翻译: 公开了用于太阳能电池的表面纹理导电玻璃及其制备方法和应用。 在用于太阳能电池的表面纹理导电玻璃中,将透明导电膜涂覆在玻璃基板上,并且透明导电膜的上表面被均匀分布的纳米/微观U形凹坑纹理化。 制备方法包括:通过磁控溅射涂覆透明导电膜,然后通过浸渍涂布法将纳米/微球吸收到透明导电膜的表面上作为掩模,然后增加透明导电膜的厚度 通过磁控溅射在纳米/微球之间的间隙中,最后通过超声波振动法去除纳米/微球,实现了具有纳米/微观U形的导电玻璃的大规模低成本生产 表面纹理。 通过上述方法获得的导电玻璃具有高重复性,适当的U形纹理特征尺寸,高分布均匀性,高生产效率和低生产成本,因此适用于普及和应用。

    Easy process modeling platform
    9.
    发明授权
    Easy process modeling platform 有权
    简单的流程建模平台

    公开(公告)号:US08762187B2

    公开(公告)日:2014-06-24

    申请号:US13293965

    申请日:2011-11-10

    IPC分类号: G06Q10/00

    CPC分类号: G06Q10/0633 G06Q10/06

    摘要: The present disclosure describes methods, systems, and computer program products for generic process modeling. One method includes identifying a business process for execution, the business process defined by one or more process steps, identifying a process routing table associated with the identified business process, at least a portion of the process routing table including one or more entries defining a set of business process rules for the identified business process, identifying a particular entry in the process routing table associated with a current state of the identified business process; and performing at least one action defined by the identified particular entry in the process routing table. In some instances, at least one entry in the process routing table is associated with one of a plurality of process patterns, with each process pattern comprising a reusable, predefined operation.

    摘要翻译: 本公开描述了用于通用过程建模的方法,系统和计算机程序产品。 一种方法包括识别用于执行的业务流程,由一个或多个流程步骤定义的业务流程,识别与所识别的业务流程相关联的流程路由表,流程路由表的至少一部分包括定义集合的一个或多个条目 识别所识别的业务流程的业务流程规则,识别与所识别的业务流程的当前状态相关联的流程路由表中的特定条目; 以及执行由所述识别的特定条目在所述进程路由表中定义的至少一个动作。 在一些情况下,过程路由表中的至少一个条目与多个过程模式中的一个相关联,其中每个过程模式包括可重用的预定义操作。

    RAIL TO RAIL DIFFERENTIAL BUFFER INPUT STAGE
    10.
    发明申请
    RAIL TO RAIL DIFFERENTIAL BUFFER INPUT STAGE 有权
    RAIL到RAIL差分缓冲器输入级

    公开(公告)号:US20140139267A1

    公开(公告)日:2014-05-22

    申请号:US13716194

    申请日:2012-12-16

    IPC分类号: H03K3/00

    CPC分类号: H03F3/45183 H03F2200/513

    摘要: A rail to rail differential buffer input stage includes n-type and p-type input differential transistor pairs connected in voltage follower configuration to the power supply rails. A reference voltage generator includes a reference differential transistor pair generating a dynamic reference voltage relative to the common mode input voltage. Dummy n-type and p-type transistor pairs have current conducting paths connected in parallel with the input differential pairs and are controlled by the dynamic reference voltage to divert supply rail current away from and deactivate one of the associated input differential pairs when the common mode input voltage is further from the dynamic reference voltage than a threshold value. Both the dummy pairs conduct and both the input differential pairs are activated when the common mode input voltage is closer to the dynamic reference voltage VB than the threshold value so that the overall transconductance of the buffer input stage remains constant.

    摘要翻译: 轨到轨差分缓冲器输入级包括以电压跟随器配置连接到电源轨的n型和p型输入差分晶体管对。 参考电压发生器包括相对于共模输入电压产生动态参考电压的参考差分晶体管对。 虚拟的n型和p型晶体管对具有与输入差分对并联连接的电流传导路径,并且由动态参考电压控制,以在共模时将供电轨电流转移离开并停用相关输入差分对中的一个 输入电压比动态参考电压进一步远离阈值。 当共模输入电压比阈值更接近于动态参考电压VB时,这两个虚拟对导通并且两个输入差分对被激活,使得缓冲器输入级的整个跨导保持恒定。