公开(公告)号：US5177582A

公开(公告)日：1993-01-05

申请号：US754377

申请日：1991-08-30

申请人： Thomas Meister ,  Hans-Willi Meul ,  Helmut Klose ,  Hermann Wendt

发明人： Thomas Meister ,  Hans-Willi Meul ,  Helmut Klose ,  Hermann Wendt

IPC分类号： H01L21/8249 ,  H01L27/06 ,  H01L29/08 ,  H01L29/732

CPC分类号： H01L29/0826 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/732

摘要： A bipolar transistor with a collector, a base and an emitter disposed in vertical succession includes a semiconductor substrate, insulating oxide zones disposed in the substrate for separating adjacent transistors, and a buried collector terminal layer at least partly disposed on the insulating oxide zones. An insulator structure laterally surrounding a collector. A subcollector is surrounded by the insulating oxide zones, has the same conductivity type with a lower impedance than the collector, is disposed under the collector and under the insulator structure, and is electrically connected to the collector. The insulator structure covers the buried collector terminal layer, laterally insulates the collector from the buried collector terminal layer, and has lateral surfaces extending inside the insulating oxide regions up to the subcollector. The buried collector terminal layer is in direct contact with the subcollector. The collector is electrically connected to the buried collector terminal layer only through the subcollector. The insulator structure has a contact hole extending to the buried collector terminal layer laterally of the active transistor zone, and a metallization filling the contact hole. A process for producing the bipolar transistor includes producing an insulator structure on a substrate for determining a location for a collector; and producing the collector by selective epitaxy only inside the insulator structure, for laterally insulating the collector with the insulator structure. An integrated circuit and method include such bipolar transistors and CMOS transistors.

摘要翻译： 具有垂直相继布置的集电极，基极和发射极的双极晶体管包括半导体衬底，设置在衬底中用于分离相邻晶体管的绝缘氧化物区域和至少部分地设置在绝缘氧化物区域上的埋地集电极端子层。 横向围绕收集器的绝缘体结构。 子集电极被绝缘氧化物区围绕，具有与集电体相比具有较低阻抗的相同的导电类型，设置在集电器下方和绝缘体结构下方，并且与集电极电连接。 绝缘体结构覆盖埋地集电极端子层，使集电体与埋地集电极端子层横向绝缘，并且具有在绝缘氧化物区域内延伸直到子集电极的侧表面。 埋地集电极端子层与子集电极直接接触。 集电极仅通过子集电极电连接到埋地集电极端子层。 绝缘体结构具有在有源晶体管区域侧向延伸到集电极端子层的接触孔，以及填充接触孔的金属化。 制造双极晶体管的方法包括：在基板上制造用于确定集电体位置的绝缘体结构; 并且仅通过绝缘体结构内的选择性外延生产集电体，用于使绝缘体结构的集电体横向绝缘。 集成电路和方法包括这样的双极晶体管和CMOS晶体管。

公开(公告)号：US5498567A

公开(公告)日：1996-03-12

申请号：US379861

申请日：1995-04-03

申请人： Helmut Klose ,  Thomas Meister ,  Hans-Willi Meul ,  Reinhard Stengl

发明人： Helmut Klose ,  Thomas Meister ,  Hans-Willi Meul ,  Reinhard Stengl

IPC分类号： H01L21/76 ,  H01L21/20 ,  H01L21/331 ,  H01L21/336 ,  H01L29/73 ,  H01L29/732 ,  H01L29/78

CPC分类号： H01L29/66287 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/02639 ,  H01L29/66651 ,  Y10S148/011

摘要： A method for the manufacture of a laterally limited single crystal region that is suitable for use as an active part of a transistor, including the steps of: a) providing a substrate made of a single crystal semiconductor material; b) forming a first layer on a surface of the substrate, said first layer being selectively etchable with respect to the substrate; c) forming a second layer on the first layer, the second layer being selectively etchable with respect to the first layer; d) providing an opening in the first and second layers so as to expose an area on the surface of the substrate; e) selectively etching the first layer with respect to the substrate and the second layer so as to provide an undercut between the second layer and the surface of the substrate; f) forming a single crystal region on the exposed surface of the substrate by selective epitaxy: g) doping the second layer such that parts of the second layer adjoining the single-crystal region acting as a channel region form a source region and a drain region; h) producing a gate dielectric at a surface of the single-crystal region; and i) forming a gate electrode that is insulated from the source and drain regions on the gate dielectric.

摘要翻译： 一种用于制造适合用作晶体管的有源部分的横向受限单晶区域的方法，包括以下步骤：a）提供由单晶半导体材料制成的衬底; b）在所述衬底的表面上形成第一层，所述第一层相对于所述衬底可选择性地蚀刻; c）在所述第一层上形成第二层，所述第二层可相对于所述第一层选择性地蚀刻; d）在所述第一层和所述第二层中设置开口以暴露所述基底表面上的区域; e）相对于所述基底和所述第二层选择性地蚀刻所述第一层，以便在所述第二层和所述基底的表面之间提供底切; f）通过选择性外延在衬底的暴露表面上形成单晶区域：g）掺杂第二层，使得与用作沟道区的单晶区相邻的第二层的部分形成源区和漏区 ; h）在单晶区域的表面产生栅电介质; 以及i）形成与栅极电介质上的源极和漏极区域绝缘的栅电极。

公开(公告)号：US5422303A

公开(公告)日：1995-06-06

申请号：US185514

申请日：1994-01-24

申请人： Helmut Klose ,  Thomas Meister ,  Hans-Willi Meul ,  Reinhard Stengl

发明人： Helmut Klose ,  Thomas Meister ,  Hans-Willi Meul ,  Reinhard Stengl

IPC分类号： H01L21/76 ,  H01L21/20 ,  H01L21/331 ,  H01L21/336 ,  H01L29/73 ,  H01L29/732 ,  H01L29/78

CPC分类号： H01L29/66287 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/02639 ,  H01L29/66651 ,  Y10S148/011

摘要： A method for the manufacture of a laterally limited single crystal region that is suitable for use as an active part of a transistor, including the steps of: a) providing a substrate made of a single crystal semiconductor material; b) forming a first layer on a surface of the substrate, said first layer being selectively etchable with respect to the substrate; c) forming a second layer on the first layer, the second layer being selectively etchable with respect to the first layer; d) providing an opening in the first and second layers so as to expose an area on the surface of the substrate; e) covering surfaces and sidewalls of the second layer with a third layer f) selectively etching the first layer with respect to the substrate and the second layer and the third layer so as to provide an undercut between the second layer and the surface of the substrate; g) forming a single crystal region on the exposed surface of the substrate by selective epitaxy without nucleation occurring at the surface of the third layer; h) forming a collector in the substrate under the single-crystal region; i) forming a base in the single-crystal region; j) doping and configuring the second layer such that it forms a base terminal; and k) forming an emitter above the base.

摘要翻译： 一种用于制造适合用作晶体管的有源部分的横向受限单晶区域的方法，包括以下步骤：a）提供由单晶半导体材料制成的衬底; b）在所述衬底的表面上形成第一层，所述第一层相对于所述衬底可选择性地蚀刻; c）在所述第一层上形成第二层，所述第二层可相对于所述第一层选择性地蚀刻; d）在所述第一层和所述第二层中设置开口以暴露所述基底表面上的区域; e）用第三层覆盖第二层的表面和侧壁f）相对于衬底和第二层和第三层选择性地蚀刻第一层，以便在第二层和衬底的表面之间提供底切 ; g）通过选择性外延在第三层的表面上没有成核而在衬底的暴露表面上形成单晶区; h）在单晶区域下在衬底中形成集电体; i）在单晶区域形成碱; j）掺杂和配置第二层，使得它形成基极; 和k）在基底上形成发射体。

公开(公告)号：US5326718A

公开(公告)日：1994-07-05

申请号：US950068

申请日：1992-09-23

申请人： Helmut Klose ,  Thomas Meister ,  Hans-Willi Meul ,  Reinhard Stengl

发明人： Helmut Klose ,  Thomas Meister ,  Hans-Willi Meul ,  Reinhard Stengl

IPC分类号： H01L21/76 ,  H01L21/20 ,  H01L21/331 ,  H01L21/336 ,  H01L29/73 ,  H01L29/732 ,  H01L29/78

CPC分类号： H01L29/66287 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/02639 ,  H01L29/66651 ,  Y10S148/011

摘要： A method for the manufacture of a laterally limited single crystal region that is suitable for use as an active part of a transistor.

摘要翻译： 一种用于制造适合用作晶体管的有源部分的横向受限的单晶区域的方法。

公开(公告)号：US5402002A

公开(公告)日：1995-03-28

申请号：US737607

申请日：1991-07-24

申请人： Thomas Meister ,  Hans-Willi Meul

发明人： Thomas Meister ,  Hans-Willi Meul

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/8249 ,  H01L29/08 ,  H01L29/732 ,  H01L29/72

CPC分类号： H01L29/66287 ,  H01L21/8249 ,  H01L29/0821 ,  H01L29/732

摘要： A bipolar transistor includes insulator structures defining an active transistor zone having a base, an emitter with a side facing away from the base, and a collector with a collector terminal having a side facing away from the base. The insulator structures are disposed on the sides of the emitter and the collector terminal facing away from the base, and the insulator structures limit current flow through the active transistor zone. A process for producing the bipolar transistor includes producing a collector by selective epitaxy on a zone of a substrate surrounded by insulators. A zone for the collector is defined with a spacer technique in the following steps: photolithographically producing a first opening in a first layer exposing a surface of a second layer; including at least one insulation layer in the second layer; producing spacers at edges of the first opening; and etching a second opening in the second layer defining the zone for the collector during selective back-etching of the spacers.

摘要翻译： 双极晶体管包括限定具有基极的有源晶体管区域的绝缘体结构，具有背离基极的一侧的发射极和具有背离基极的一侧的集电极端子的集电极。 绝缘体结构设置在发射极和集电极端子背离基极的侧面上，绝缘体结构限制电流通过有源晶体管区域流动。 制造双极晶体管的工艺包括通过在由绝缘体包围的衬底的区域上进行选择性外延生产集电极。 采用隔离技术在以下步骤中限定用于收集器的区域：光刻地产生暴露第二层表面的第一层中的第一开口; 包括在所述第二层中的至少一个绝缘层; 在所述第一开口的边缘处产生间隔物; 以及在所述间隔物的选择性反向蚀刻期间蚀刻限定所述收集器区域的所述第二层中的第二开口。

公开(公告)号：US07947552B2

公开(公告)日：2011-05-24

申请号：US12106667

申请日：2008-04-21

申请人： Herbert Schäfer ,  Martin Franosch ,  Thomas Meister ,  Josef Böck

发明人： Herbert Schäfer ,  Martin Franosch ,  Thomas Meister ,  Josef Böck

IPC分类号： H01L21/8238

CPC分类号： H01L21/02639 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/0262 ,  H01L21/02661

摘要： One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy. In one embodiment of the present invention a preparation surface is formed, resulting in two distinct crystalline regions, a monocrystalline silicon substrate region and an isolating layer region. A monocrystalline silicon layer and an amorphous silicon layer are concurrently formed directly onto the preparation surface in the monocrystalline silicon substrate region and the isolating layer region, respectively. Deposition comprises the formation of two or more sub-layers. The process parameters can be varied for each individual sub-layer to optimize deposition characteristics.

摘要翻译： 本发明的一个实施例涉及利用原位差分外延在半导体主体上同时沉积多个不同结晶结构的方法。 在本发明的一个实施方案中，形成制备表面，得到两个不同的结晶区域，单晶硅衬底区域和隔离层区域。 单晶硅层和非晶硅层同时直接分布在单晶硅衬底区域和隔离层区域的制备表面上。 沉积包括形成两个或更多个子层。 可以为每个单独的子层改变工艺参数以优化沉积特性。

公开(公告)号：US07449389B2

公开(公告)日：2008-11-11

申请号：US11553704

申请日：2006-10-27

申请人： Thomas Meister ,  Herbert Schäfer ,  Josef Böck ,  Rudolf Lachner

发明人： Thomas Meister ,  Herbert Schäfer ,  Josef Böck ,  Rudolf Lachner

IPC分类号： H01L21/20

CPC分类号： H01L21/8249 ,  H01L27/0635 ,  H01L27/0658 ,  H01L29/66242 ,  H01L29/7378 ,  H01L29/93

摘要： A method for fabricating a semiconductor including defining a first component region and a second component region in a semiconductor body is provided. A first epitaxial layer is formed through the first component region. A second epitaxial layer is formed over the first epitaxial layer, including configuring the physical dimensions of a first active zone of the first component region independent of a second active zone of the second component region via the first epitaxial layer and the second epitaxial layer. In one embodiment, the first component is a radio-frequency transistor and the second component is a varactor.

摘要翻译： 提供了一种制造半导体的方法，包括在半导体本体中限定第一分量区域和第二分量区域。 通过第一分量区域形成第一外延层。 第二外延层形成在第一外延层上方，包括经由第一外延层和第二外延层，与第二成分区的第二有源区独立地配置第一成分区的第一有源区的物理尺寸。 在一个实施例中，第一部件是射频晶体管，第二部件是变容二极管。

公开(公告)号：US20070222032A1

公开(公告)日：2007-09-27

申请号：US11716526

申请日：2007-03-09

申请人： Herbert Schaefer ,  Josef Boeck ,  Rudolf Lachner ,  Thomas Meister

发明人： Herbert Schaefer ,  Josef Boeck ,  Rudolf Lachner ,  Thomas Meister

IPC分类号： H01L27/082

CPC分类号： H01L29/7378 ,  H01L29/0804 ,  H01L29/66242 ,  H01L29/66287 ,  H01L29/732

摘要： A bipolar transistor has a base, an emitter and an emitter contact. The emitter has a monocrystalline layer and a polycrystalline layer, which are disposed between the base and the emitter contact in the mentioned order.

摘要翻译： 双极晶体管具有基极，发射极和发射极接触。 发射极具有单晶层和多晶层，它们以所述顺序设置在基极和发射极之间。

公开(公告)号：US20050233536A1

公开(公告)日：2005-10-20

申请号：US11153062

申请日：2005-06-15

申请人： Josef Bock ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer

发明人： Josef Bock ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer

IPC分类号： H01L21/331 ,  H01L29/06 ,  H01L29/08 ,  H01L29/737

CPC分类号： H01L29/66287 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/167 ,  H01L29/66242 ,  H01L29/7371 ,  H01L29/7378

摘要： The invention relates to a method for producing a bipolar transistor. A semiconductor substrate is provided that encompasses a collector area of a first conductivity type, which is embedded therein and is bare towards the top. A monocrystalline base area is provided and a base-connecting area of the second conductivity type is provided above the base area. An insulating area is provided above the base-connecting area and a window is formed in the insulating area and the base-connecting area so as to at least partly expose the base area. An insulating sidewall spacer is provided in the window in order to insulate the base-connecting area. An emitter layer which forms a monocrystalline emitter area above the base area and a polycrystalline emitter area above the insulating area and the sidewall spacer is differentially deposited and structured, and a tempering step is carried out.

摘要翻译： 本发明涉及一种制造双极晶体管的方法。 提供了一种半导体衬底，其包含嵌入其中并且朝向顶部裸露的第一导电类型的集电极区域。 提供单晶基底区域，并且在基底区域上方设置第二导电类型的基底连接区域。 绝缘区域设置在基底连接区域上方，并且在绝缘区域和基底连接区域中形成窗口，以便至少部分地暴露基部区域。 在窗口中设置绝缘侧壁间隔件，以便使基部连接区域绝缘。 在绝缘区域之上形成单晶发射极区域和绝缘区域上方的多晶发射极区域的发射极层被差异地沉积和结构化，并进行回火步骤。

公开(公告)号：US06867105B2

公开(公告)日：2005-03-15

申请号：US10215152

申请日：2002-08-08

申请人： Reinhard Stengl ,  Thomas Meister ,  Herbert Schäfer ,  Martin Franosch

发明人： Reinhard Stengl ,  Thomas Meister ,  Herbert Schäfer ,  Martin Franosch

IPC分类号： H01L21/331 ,  H01L29/732

CPC分类号： H01L29/66287 ,  H01L29/7322

摘要： A bipolar transistor includes a first layer with a collector. A second layer has a base cutout for a base. A third layer includes a lead for the base. The third layer is formed with an emitter cutout for an emitter. An undercut is formed in the second layer adjoining the base cutout. The base is at least partially located in the undercut. In order to obtain a low transition resistance between the lead and the base, an intermediate layer is provided between the first and the second layer. The intermediate layer is selectively etchable with respect to the second layer. At least in the region of the undercut between the lead and the base, a base connection zone is provided that can be adjusted independent of other production conditions. The intermediate layer is removed in a contact region with the base.

摘要翻译： 双极晶体管包括具有集电极的第一层。 第二层具有用于基座的基部切口。 第三层包括用于底座的引线。 第三层形成有用于发射极的发射极切口。 在与基座切口相邻的第二层中形成底切。 基部至少部分位于底切中。 为了在引线和基底之间获得低的过渡电阻，在第一和第二层之间设置中间层。 中间层相对于第二层可选择性地蚀刻。 至少在引线和基座之间的底切区域中，提供可以独立于其他生产条件进行调节的基础连接区域。 在与基底的接触区域中去除中间层。