公开(公告)号：US20060001146A1

公开(公告)日：2006-01-05

申请号：US11143398

申请日：2005-06-02

申请人： Thomas Passe ,  Oliver Schilling

发明人： Thomas Passe ,  Oliver Schilling

IPC分类号： H01L23/48

CPC分类号： H01L24/49 ,  H01L24/48 ,  H01L25/072 ,  H01L2224/0603 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor device has connecting leads, whose base points (1f, 2f, 3f) have centroids (1m, 2m, 3m), wherein the connecting line between the centroids (1m, 3m) of the base points (1f, 3f) of the first (1) and third (3) connecting lead, and the connecting line between the centroids (2m, 3m) of the base points (2f, 3f) of the second (2) and third (3) connecting lead enclose an angle (α) of 20° maximum. In addition, a semiconductor module may incorporate two or more semiconductor devices which are connected electrically in parallel.

摘要翻译： 半导体器件具有连接引线，其基点（1f，2f，3f）具有重心（1m，2m，3m），其中基座的质心（1m，3m） 第一（1）和第三（3）连接引线的点（1f，3f）和第二（1）和第三（3）连接引线的基点（2f，3f）的质心（2m，3m） （2）和第三（3）连接引线包含最大20°的角度（α）。 此外，半导体模块可以并入两个或更多个并联电连接的半导体器件。

公开(公告)号：US07279963B2

公开(公告)日：2007-10-09

申请号：US11143398

申请日：2005-06-02

申请人： Thomas Passe ,  Oliver Schilling

发明人： Thomas Passe ,  Oliver Schilling

IPC分类号： H01L23/58 ,  H01L23/50 ,  H01L27/092

CPC分类号： H01L24/49 ,  H01L24/48 ,  H01L25/072 ,  H01L2224/0603 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： A semiconductor device has first, second, and third connecting leads (1, 2, 3), whose respective base points (1f, 2f, 3f) have centroids (1m, 2m, 3m). The connecting leads are arranged wherein an angle (α) between a first line drawn between the centroids (1m, 3m) of the base points (1f, 3f) of first lead (1) and third lead (3) and a second line drawn between the centroids (2m, 3m) of the base points (2f, 3f) of second lead (2) and third lead (3) is 20° maximum. In addition, a semiconductor module may incorporate two or more semiconductor devices which are connected electrically in parallel.

摘要翻译： 半导体器件具有其各自的基点（1f，2f，3f）具有重心（1m，2m，3m）的第一，第二和第三连接引线（1,2,3）。 布置连接引线，其中在第一引线（1）和第三引线（3）的基点（1f，3f）的质心（1m，3m）之间绘制的第一线之间的角度（α）和 在第二引线（2）和第三引线（3）的基点（2f，3f）的质心（2m，3m）之间绘制的第二条线最大为20°。 此外，半导体模块可以并入两个或更多个并联电连接的半导体器件。

公开(公告)号：US20070200227A1

公开(公告)日：2007-08-30

申请号：US11549765

申请日：2006-10-16

申请人： Thomas Licht ,  Thomas Passe

发明人： Thomas Licht ,  Thomas Passe

IPC分类号： H01L23/34

CPC分类号： H01L23/4006 ,  H01L23/3735 ,  H01L24/24 ,  H01L24/72 ,  H01L24/82 ,  H01L2023/4031 ,  H01L2224/2402 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/82007 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01073 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/053 ,  H05K3/14 ,  H05K3/32 ,  H05K2203/1311 ,  H05K2203/1344 ,  H05K2203/1469 ,  H01L2924/00

摘要： A power semiconductor arrangement has a heat-removing base with at least one planar exterior. The base consists of a metal material or is provided with a metal coat. The exterior is at least partially provided with an electrically insulating oxide layer on top of the metal material. The power semiconductor arrangement also has a power semiconductor component that is disposed on the one exterior of the base in such a manner that it is electrically insulated from the base by the oxide layer. An electrically insulated film is at least partially laminated onto the one exterior across the power semiconductor component. The film, in the area of the power semiconductor component, is provided with recesses for contacting the power semiconductor component. An upper metallization layer is applied to the power semiconductor component on top of the film and its recesses across a large area thereof or in a structured manner.

摘要翻译： 功率半导体装置具有至少一个平面外部的除热基座。 底座由金属材料制成，或设有金属外套。 外部至少部分地在金属材料的顶部上设置有电绝缘的氧化物层。 功率半导体装置还具有功率半导体部件，其设置在基座的一个外部，使得其通过氧化物层与基极电绝缘。 电绝缘膜至少部分地层压在跨越功率半导体部件的一个外部。 在功率半导体部件的区域中的膜设置有用于接触功率半导体部件的凹部。 将上部金属化层施加到膜的顶部上的功率半导体部件及其大面积上的结构化方式的凹部。

公开(公告)号：US20060226531A1

公开(公告)日：2006-10-12

申请号：US11329571

申请日：2006-01-11

申请人： Thomas Passe ,  Gottfried Ferber ,  Benedikt Specht

发明人： Thomas Passe ,  Gottfried Ferber ,  Benedikt Specht

IPC分类号： H01L23/52

CPC分类号： H01L23/49861 ,  H01L24/49 ,  H01L25/16 ,  H01L2224/0603 ,  H01L2224/4903 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/4092 ,  H05K2201/0397 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A semiconductor power module has a support (1), whereon are formed conductor strips (5, 6, 7, 8) by applying a structure on an electrically conductive layer (3) applied on one side (2) of the support. A semiconductor power module can be manufactured easily and economically enabling several mounting technologies by using a homogeneous base support. Therefore, the conductor strips (5, 6, 7, 8), as integral elements of the conductor circuit have loose ends (6a, 7a, 8a) detached from the side (2) of the support, the ends of the conductor strips extending outside the support (1) and forming external connections.

摘要翻译： 半导体功率模块具有通过在施加在支撑体的一侧（2）上的导电层（3）上施加结构而形成导体条（5,6,7,8）的支撑件（1）。 半导体功率模块可以容易且经济地制造，通过使用均匀的基座支撑来实现多种安装技术。 因此，作为导体电路的整体元件的导体条（5,6,7,8）具有从支撑件的侧面（2）分离的松散端部（6a，7a，8a）， 导体条延伸到支撑件（1）外部并形成外部连接。