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公开(公告)号：US6130842A
公开(公告)日：2000-10-10
申请号：US908861
申请日：1997-08-08
IPC分类号： G11C29/50 , H03K19/177 , G11C29/00
CPC分类号： G11C29/028 , G11C29/50 , H03K19/1776 , H03K19/1778 , G11C16/04 , G11C2029/5004
摘要： A voltage source is configured to produce a desired voltage and the desired voltage is applied to a programmable cell coupled to the voltage source. Configuration may be accomplished by loading a register with a programmed voltage value which may be received as a serial data stream through a test access port coupled to the register. For one embodiment, the voltage source may be coupled to a gate of the programmable cell, thus allowing testing of margin voltages of the programmable cell. In a further embodiment, the voltage source may be coupled to a drain of the programmable cell through a load line circuit, thus providing a programmed voltage for the programmable cell. In general then, the programmable voltage source is configurable to provide a voltage to the programmable cell in accordance with a programmed voltage value loaded into the programmable voltage source. The present invention may be embodied in a programmable device such as a PLD a CPLD or an FPGA and provides easily adjustable verify and/or program voltages, configurable through use of the programmable register, to test the operation of the programmable cell. The higher the bit count of the register, the more precise a verify and/or program voltage that may be provided.
摘要翻译： 电压源被配置为产生期望的电压，并且将期望的电压施加到耦合到电压源的可编程单元。 可以通过加载具有编程电压值的寄存器来实现配置，所述编程电压值可以通过耦合到寄存器的测试访问端口作为串行数据流来接收。 对于一个实施例，电压源可以耦合到可编程单元的栅极，从而允许测试可编程单元的裕度电压。 在另一实施例中，电压源可以通过负载线路电路耦合到可编程单元的漏极，从而为可编程单元提供编程电压。 通常，可编程电压源可配置为根据加载到可编程电压源中的编程电压值向可编程单元提供电压。 本发明可以体现在诸如PLD或CPLD的可编程器件中，并且通过使用可编程寄存器提供可配置的易于调整的校验和/或编程电压来测试可编程单元的操作。 寄存器的位计数越高，可能提供的验证和/或编程电压越精确。
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公开(公告)号：US20110234318A1
公开(公告)日：2011-09-29
申请号：US13159672
申请日：2011-06-14
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45094
摘要： A low voltage differential signal (LVDS) driver circuit with reduced power consumption. A pre-driver stage, implemented as a differential current mode amplifier, is driven by the differential input signal and provides a corresponding differential drive signal, which drives the output stage, implemented as a differential voltage mode amplifier, which, in turn, provides the differential output signal for the load. Total current consumption equals the load current, which is provided by the output stage, plus a much smaller current used by the pre-driver stage.
摘要翻译： 低电压差分信号（LVDS）驱动电路，功耗降低。 实现为差分电流模式放大器的预驱动器级由差分输入信号驱动，并提供驱动输出级的相应的差分驱动信号，该差分驱动信号被实现为差分电压模式放大器，其反过来提供 负载的差分输出信号。 总电流消耗等于由输出级提供的负载电流，加上预驱动级使用的电流要小得多。
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3.发明申请REFERENCE VOLTAGE SHIFTING TECHNIQUE FOR OPTIMIZING SNR PERFORMANCE IN PIPELINE ADCS WITH RESPECT TO INPUT SIGNAL 失效参考电压转换技术，用于优化管道信号在输入信号方面的SNR性能公开(公告)号：US20080238737A1
公开(公告)日：2008-10-02
申请号：US11693618
申请日：2007-03-29
申请人： Khaldoon Abugharbieh , Ping Jing
发明人： Khaldoon Abugharbieh , Ping Jing
CPC分类号： H03M1/0604 , H03M1/0695 , H03M1/442
摘要： An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a plurality of digital intermediate signals in response to an analog input signal, a first set of threshold and reference voltages and a second set of threshold and reference voltages, where the threshold and reference voltages of the first set are shifted with respect to corresponding threshold and reference voltages of the second set. The second circuit may be configured to generate a digital output signal in response to the plurality of digital intermediate signals.
摘要翻译： 一种包括第一电路和第二电路的装置。 第一电路可以被配置为响应于模拟输入信号，第一组阈值和参考电压以及第二组阈值和参考电压而产生多个数字中间信号，其中第一组的阈值和参考电压 相对于第二组的相应阈值和参考电压移位。 第二电路可以被配置为响应于多个数字中间信号而产生数字输出信号。
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公开(公告)号：US08638125B2
公开(公告)日：2014-01-28
申请号：US13159672
申请日：2011-06-14
IPC分类号： H03K5/22
CPC分类号： H03F3/45475 , H03F3/45094
摘要： A low voltage differential signal (LVDS) driver circuit with reduced power consumption. A pre-driver stage, implemented as a differential current mode amplifier, is driven by the differential input signal and provides a corresponding differential drive signal, which drives the output stage, implemented as a differential voltage mode amplifier, which, in turn, provides the differential output signal for the load. Total current consumption equals the load current, which is provided by the output stage, plus a much smaller current used by the pre-driver stage.
摘要翻译： 低电压差分信号（LVDS）驱动电路，功耗降低。 实现为差分电流模式放大器的预驱动器级由差分输入信号驱动，并提供驱动输出级的相应的差分驱动信号，该差分驱动信号被实现为差分电压模式放大器，其反过来提供 负载的差分输出信号。 总电流消耗等于由输出级提供的负载电流，加上预驱动级使用的电流要小得多。
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5.发明授权Reference voltage shifting technique for optimizing SNR performance in pipeline ADCs with respect to input signal 失效参考电压移位技术，用于优化管道ADC相对于输入信号的SNR性能公开(公告)号：US07535399B2
公开(公告)日：2009-05-19
申请号：US11693618
申请日：2007-03-29
申请人： Khaldoon Abugharbieh , Ping Jing
发明人： Khaldoon Abugharbieh , Ping Jing
IPC分类号： H03M1/12
CPC分类号： H03M1/0604 , H03M1/0695 , H03M1/442
摘要： An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a plurality of digital intermediate signals in response to an analog input signal, a first set of threshold and reference voltages and a second set of threshold and reference voltages, where the threshold and reference voltages of the first set are shifted with respect to corresponding threshold and reference voltages of the second set. The second circuit may be configured to generate a digital output signal in response to the plurality of digital intermediate signals.
摘要翻译： 一种包括第一电路和第二电路的装置。 第一电路可以被配置为响应于模拟输入信号，第一组阈值和参考电压以及第二组阈值和参考电压而产生多个数字中间信号，其中第一组的阈值和参考电压 相对于第二组的相应阈值和参考电压移位。 第二电路可以被配置为响应于多个数字中间信号而产生数字输出信号。
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公开(公告)号：US06275117B1
公开(公告)日：2001-08-14
申请号：US09216460
申请日：1998-12-18
申请人： Khaldoon Abugharbieh , Sung-Ki Min
发明人： Khaldoon Abugharbieh , Sung-Ki Min
IPC分类号： H03B500
CPC分类号： H03K3/0315 , H03L7/0891 , H03L7/0995
摘要： A circuit and method configured to generate a variable impedance. The circuit may comprise a voltage controlled resistor configured to generate the variable impedance in response to (i) a first transistor configured to receive a first control signal and (ii) a bias transistor configured to receive a bias signal. In one example, the variable impedance may be generated in further response to a clamp transistor.
摘要翻译： 一种配置成产生可变阻抗的电路和方法。 电路可以包括被配置为响应于（i）被配置为接收第一控制信号的第一晶体管和（ii）被配置为接收偏置信号的偏置晶体管而产生可变阻抗的电压控制电阻器。 在一个示例中，可以进一步响应于钳位晶体管产生可变阻抗。
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7.发明授权Method, circuit and/or architecture to improve the frequency range of a voltage controlled oscillator 有权提高压控振荡器频率范围的方法，电路和/或结构公开(公告)号：US06275116B1
公开(公告)日：2001-08-14
申请号：US09328083
申请日：1999-06-08
申请人： Khaldoon Abugharbieh , Sung-Ki Min
发明人： Khaldoon Abugharbieh , Sung-Ki Min
IPC分类号： H03L7099
CPC分类号： H03L7/099 , H03L2207/06
摘要： A circuit comprising an oscillator configured to generate a periodic signal in response to (i) control signal and (ii) a current. The current may be varied independently of the control signal. In one example, the oscillator may generate the periodic signal in further response to a second current that may vary in response to the control signal. In another example, the oscillator may be used in a phase-locked loop circuit.
摘要翻译： 一种电路，包括响应于（i）控制信号和（ii）电流而产生周期性信号的振荡器。 电流可以独立于控制信号而变化。 在一个示例中，振荡器可以进一步响应于可响应于控制信号而变化的第二电流产生周期信号。 在另一示例中，振荡器可以用在锁相环电路中。
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公开(公告)号：US06147908A
公开(公告)日：2000-11-14
申请号：US962860
申请日：1997-11-03
摘要： A nonvolatile memory circuit that includes a load circuit coupled to a band-gap reference circuit and a nonvolatile memory cell. The load line circuit is configured to provide a programming voltage to the nonvolatile memory cell. The programming voltage may be generated in response to the reference voltage generated by the band-gap reference circuit. The nonvolatile memory circuit may also include an amplifying circuit that amplifies the reference voltage of the band-gap circuit, and provides the amplified reference voltage to the load circuit. The nonvolatile memory circuit may further include a voltage trim circuit that trims the amplified reference voltage and provides the trimmed amplified reference voltage to the load circuit. The reference voltage, amplified reference voltage, and the trimmed amplified reference voltage may each output a stable voltage that is independent of variations in process parameters, operating temperatures, and supply voltages of the nonvolatile memory circuit.
摘要翻译： 一种非易失性存储器电路，包括耦合到带隙基准电路和非易失性存储单元的负载电路。 负载线电路被配置为向非易失性存储单元提供编程电压。 编程电压可以响应于由带隙基准电路产生的参考电压而产生。 非易失性存储器电路还可以包括放大电路，其放大带隙电路的参考电压，并将放大的参考电压提供给负载电路。 非易失性存储器电路还可以包括修整放大的参考电压并将修整的放大参考电压提供给负载电路的电压调整电路。 参考电压，放大参考电压和经修整的放大参考电压可以各自输出与非易失性存储器电路的工艺参数，工作温度和电源电压的变化无关的稳定电压。
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