公开(公告)号：US08305539B2

公开(公告)日：2012-11-06

申请号：US12213252

申请日：2008-06-17

申请人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

发明人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

IPC分类号： G02F1/1343 ,  G02F1/136

CPC分类号： G02F1/134336 ,  G02F1/133707 ,  G02F1/13624 ,  G02F2001/134345 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0443 ,  G09G2320/0209

摘要： A pixel structure of liquid crystal display including a first and a second sub-pixel electrodes, a first and a second data lines, a gate line, and a first and a second transistors is provided. The first and the second sub-pixel electrodes disposed in the first and second sub-pixel areas respectively include at least two display domains at left and right. The first data line is disposed under the interface between two domains of each of the first and second sub-pixel electrodes, and the second data line is disposed under the edges of the first and second sub-pixel electrodes. The gate line is disposed between the first and second sub-pixel areas. The first sub-pixel electrode is controlled by the gate line and the first data line through the first transistor. The second sub-pixel electrode is controlled by the gate line and the second data line through the second transistor.

摘要翻译： 提供包括第一和第二子像素电极，第一和第二数据线，栅极线以及第一和第二晶体管的液晶显示器的像素结构。 设置在第一子像素区域和第二子像素区域中的第一子像素电极和第二子像素电极分别在左侧和右侧包括至少两个显示域。 第一数据线设置在第一和第二子像素电极中的每一个的两个畴之间的界面下方，并且第二数据线设置在第一和第二子像素电极的边缘下方。 栅极线设置在第一和第二子像素区域之间。 第一子像素电极由栅极线和第一数据线通过第一晶体管控制。 第二子像素电极由栅极线和第二数据线通过第二晶体管控制。

公开(公告)号：US20090135321A1

公开(公告)日：2009-05-28

申请号：US12213252

申请日：2008-06-17

申请人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

发明人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

IPC分类号： G02F1/133 ,  G02F1/1343

CPC分类号： G02F1/134336 ,  G02F1/133707 ,  G02F1/13624 ,  G02F2001/134345 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0443 ,  G09G2320/0209

摘要： A pixel structure of liquid crystal display including a first and a second sub-pixel electrodes, a first and a second data lines, a gate line, and a first and a second transistors is provided. The first and the second sub-pixel electrodes disposed in the first and second sub-pixel areas respectively include at least two display domains at left and right. The first data line is disposed under the interface between two domains of each of the first and second sub-pixel electrodes, and the second data line is disposed under the edges of the first and second sub-pixel electrodes. The gate line is disposed between the first and second sub-pixel areas. The first sub-pixel electrode is controlled by the gate line and the first data line through the first transistor. The second sub-pixel electrode is controlled by the gate line and the second data line through the second transistor.

摘要翻译： 提供包括第一和第二子像素电极，第一和第二数据线，栅极线以及第一和第二晶体管的液晶显示器的像素结构。 设置在第一子像素区域和第二子像素区域中的第一子像素电极和第二子像素电极分别在左侧和右侧包括至少两个显示域。 第一数据线设置在第一和第二子像素电极中的每一个的两个畴之间的界面下方，并且第二数据线设置在第一和第二子像素电极的边缘下方。 栅极线设置在第一和第二子像素区域之间。 第一子像素电极由栅极线和第一数据线通过第一晶体管控制。 第二子像素电极由栅极线和第二数据线通过第二晶体管控制。

公开(公告)号：US08711075B2

公开(公告)日：2014-04-29

申请号：US12252496

申请日：2008-10-16

申请人： Pei-Chun Liao ,  Hung-Lung Hou ,  Ting-Wei Su

发明人： Pei-Chun Liao ,  Hung-Lung Hou ,  Ting-Wei Su

IPC分类号： G09G3/36 ,  G09G5/02 ,  G02F1/1343

CPC分类号： G02F1/13624 ,  G02F2001/134345 ,  G09G3/3607 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2320/028

摘要： A liquid crystal display includes first and second pixel electrodes, first to fourth data lines, and a first gate line. The first pixel electrode has separated first primary and secondary sub-pixel electrodes. The second pixel electrode has separated second primary and secondary sub-pixel electrodes. The first data line is coupled to the first secondary sub-pixel electrode and covered by the first pixel electrode. The second data line is coupled to the first primary sub-pixel electrode and covered by the second pixel electrode. The third data line is coupled to the second primary sub-pixel electrode and covered by the second pixel electrode. The fourth data line is coupled to the second secondary sub-pixel electrode. The first gate line is coupled to the first pixel electrode and the second pixel electrode.

摘要翻译： 液晶显示器包括第一和第二像素电极，第一至第四数据线和第一栅极线。 第一像素电极已经分离出第一初级和次级子像素电极。 第二像素电极具有分离的第二初级和次级子像素电极。 第一数据线耦合到第一辅助子像素电极并被第一像素电极覆盖。 第二数据线耦合到第一主要子像素电极并被第二像素电极覆盖。 第三数据线耦合到第二主子像素电极并被第二像素电极覆盖。 第四数据线耦合到第二辅助子像素电极。 第一栅极线耦合到第一像素电极和第二像素电极。

公开(公告)号：US20120320028A1

公开(公告)日：2012-12-20

申请号：US13593685

申请日：2012-08-24

申请人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

发明人： Ting-Wei Su ,  Pei-Chun Liao ,  Hung-Lung Hou

IPC分类号： G09G3/36 ,  G06F3/038

CPC分类号： G02F1/134336 ,  G02F1/133707 ,  G02F1/13624 ,  G02F2001/134345 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0443 ,  G09G2320/0209

摘要： A pixel structure of liquid crystal display includes a first and a second sub-pixel electrodes, a first and a second data lines, a gate line, and a first and a second transistors. The first and the second sub-pixel electrodes disposed in the first and second sub-pixel areas respectively include at least two display domains at left and right. The first data line is disposed under the interface between two domains of each of the first and second sub-pixel electrodes, and the second data line is disposed under the edges of the first and second sub-pixel electrodes. The gate line is disposed between the first and second sub-pixel areas. The first sub-pixel electrode is controlled by the gate line and the first data line through the first transistor. The second sub-pixel electrode is controlled by the gate line and the second data line through the second transistor.

摘要翻译： 液晶显示器的像素结构包括第一和第二子像素电极，第一和第二数据线，栅极线以及第一和第二晶体管。 设置在第一子像素区域和第二子像素区域中的第一子像素电极和第二子像素电极分别在左侧和右侧包括至少两个显示域。 第一数据线设置在第一和第二子像素电极中的每一个的两个畴之间的界面下方，并且第二数据线设置在第一和第二子像素电极的边缘下方。 栅极线设置在第一和第二子像素区域之间。 第一子像素电极由栅极线和第一数据线通过第一晶体管控制。 第二子像素电极由栅极线和第二数据线通过第二晶体管控制。

公开(公告)号：US08854561B2

公开(公告)日：2014-10-07

申请号：US12590765

申请日：2009-11-13

申请人： Pei-Chun Liao ,  Tien-Lun Ting ,  Wen-Hao Hsu ,  Hung-Lung Hou

发明人： Pei-Chun Liao ,  Tien-Lun Ting ,  Wen-Hao Hsu ,  Hung-Lung Hou

IPC分类号： G02F1/1343 ,  G02F1/136 ,  G09G3/36 ,  G02F1/1362 ,  G02F1/1337

CPC分类号： G09G3/3648 ,  G02F1/133707 ,  G02F1/136213 ,  G02F1/13624 ,  G09G3/3659 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2300/0852 ,  G09G2310/0205 ,  G09G2310/0251 ,  G09G2320/028

摘要： A LCD panel in which a pixel has a first sub-pixel area and a second sub-pixel area, each area having a storage capacitor. Each pixel has a first gate line for providing a first gate-line signal for charging the first and second storage capacitors, and a second gate line for providing a second gate-line signal for removing part of the charges in the second storage capacitor to a third capacitor after the first gate-line signal has passed. The width of the first and second gate-line signals and their timing can be varied so that the first gate-line signal provided to a row can be used as the second gate-line signal to one of the preceding rows. In some embodiments, a pixel in each row has a duplicate pixel arranged to similarly receive the first and second gate-line signals, but data signals are received from different data lines.

摘要翻译： 一种像素具有第一子像素区域和第二子像素区域的LCD面板，每个区域都具有存储电容器。 每个像素具有用于提供用于对第一和第二存储电容器充电的第一栅极线信号的第一栅极线和用于提供第二栅极线信号的第二栅极线，用于将第二存储电容器中的部分电荷去除为 第三个电容器经过第一个栅极线信号。 可以改变第一和第二栅极线信号的宽度及其定时，使得提供给行的第一栅极线信号可以用作前一行之一的第二栅极线信号。 在一些实施例中，每行中的像素具有布置成类似地接收第一和第二栅极线信号的复制像素，但是从不同的数据线接收数据信号。

公开(公告)号：US08194021B2

公开(公告)日：2012-06-05

申请号：US12188577

申请日：2008-08-08

申请人： Pei-Chun Liao ,  Hung-Lung Hou

发明人： Pei-Chun Liao ,  Hung-Lung Hou

IPC分类号： G09G3/36 ,  G02F1/136

CPC分类号： G09G3/3659 ,  G09G3/3607 ,  G09G3/3614 ,  G09G2310/0205 ,  G09G2320/028

摘要： A display apparatus, pixel structure and drive method thereof are provided. The display apparatus comprises a gate drive chip, a first gate line, a second gate line, a first pixel unit, and a second pixel unit. The gate driver is configured to generate a first gate drive signal and a second gate drive signal. The first and second gate drive signals are outputted to the first and second gate lines, respectively. Furthermore, the first and second gate drive signals are configured to adjust a first feed through (FT) voltage generated by a first pixel area of the first pixel unit, a second FT voltage generated by a second pixel area of the first pixel unit, a third FT voltage generated by a third pixel area of the second pixel unit, and a fourth FT voltage generated by a fourth pixel area of the second pixel unit.

摘要翻译： 提供了一种显示装置，像素结构及其驱动方法。 显示装置包括栅极驱动芯片，第一栅极线，第二栅极线，第一像素单元和第二像素单元。 栅极驱动器被配置为产生第一栅极驱动信号和第二栅极驱动信号。 第一和第二栅极驱动信号分别输出到第一和第二栅极线。 此外，第一和第二栅极驱动信号被配置为调整由第一像素单元的第一像素区域产生的第一馈通（FT）电压，由第一像素单元的第二像素区域产生的第二FT电压， 由第二像素单元的第三像素区域产生的第三FT电压和由第二像素单元的第四像素区域产生的第四FT电压。

公开(公告)号：US20090295695A1

公开(公告)日：2009-12-03

申请号：US12188577

申请日：2008-08-08

申请人： Pei-Chun Liao ,  Hung-Lung Hou

发明人： Pei-Chun Liao ,  Hung-Lung Hou

IPC分类号： G09G3/36

CPC分类号： G09G3/3659 ,  G09G3/3607 ,  G09G3/3614 ,  G09G2310/0205 ,  G09G2320/028

摘要： A display apparatus, pixel structure and drive method thereof are provided. The display apparatus comprises a gate drive chip, a first gate line, a second gate line, a first pixel unit, and a second pixel unit. The gate driver is configured to generate a first gate drive signal and a second gate drive signal. The first and second gate drive signals are outputted to the first and second gate lines, respectively. Furthermore, the first and second gate drive signals are configured to adjust a first feed through (FT) voltage generated by a first pixel area of the first pixel unit, a second FT voltage generated by a second pixel area of the first pixel unit, a third FT voltage generated by a first pixel area of the second pixel unit, and a fourth FT voltage generated by a second pixel area of the second pixel unit.

摘要翻译： 提供了一种显示装置，像素结构及其驱动方法。 显示装置包括栅极驱动芯片，第一栅极线，第二栅极线，第一像素单元和第二像素单元。 栅极驱动器被配置为产生第一栅极驱动信号和第二栅极驱动信号。 第一和第二栅极驱动信号分别输出到第一和第二栅极线。 此外，第一和第二栅极驱动信号被配置为调整由第一像素单元的第一像素区域产生的第一馈通（FT）电压，由第一像素单元的第二像素区域产生的第二FT电压， 由第二像素单元的第一像素区域产生的第三FT电压和由第二像素单元的第二像素区域产生的第四FT电压。

公开(公告)号：US20110115998A1

公开(公告)日：2011-05-19

申请号：US12590765

申请日：2009-11-13

申请人： Pei-Chun Liao ,  Tien-Lun Ting ,  Wen-Hao Hsu ,  Hung-Lung Hou

发明人： Pei-Chun Liao ,  Tien-Lun Ting ,  Wen-Hao Hsu ,  Hung-Lung Hou

IPC分类号： G02F1/1343

CPC分类号： G09G3/3648 ,  G02F1/133707 ,  G02F1/136213 ,  G02F1/13624 ,  G09G3/3659 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2300/0852 ,  G09G2310/0205 ,  G09G2310/0251 ,  G09G2320/028

摘要： A LCD panel in which a pixel has a first sub-pixel area and a second sub-pixel area, each area having a storage capacitor. Each pixel has a first gate line for providing a first gate-line signal for charging the first and second storage capacitors, and a second gate line for providing a second gate-line signal for removing part of the charges in the second storage capacitor to a third capacitor after the first gate-line signal has passed. The width of the first and second gate-line signals and their timing can be varied so that the first gate-line signal provided to a row can be used as the second gate-line signal to one of the preceding rows. In some embodiments, a pixel in each row has a duplicate pixel arranged to similarly receive the first and second gate-line signals, but data signals are received from different data lines.

摘要翻译： 一种像素具有第一子像素区域和第二子像素区域的LCD面板，每个区域都具有存储电容器。 每个像素具有用于提供用于对第一和第二存储电容器充电的第一栅极线信号的第一栅极线和用于提供第二栅极线信号的第二栅极线，用于将第二存储电容器中的部分电荷去除为 第三个电容器经过第一个栅极线信号。 可以改变第一和第二栅极线信号的宽度及其定时，使得提供给行的第一栅极线信号可以用作前一行之一的第二栅极线信号。 在一些实施例中，每行中的像素具有布置成类似地接收第一和第二栅极线信号的复制像素，但是从不同的数据线接收数据信号。

公开(公告)号：US07579859B2

公开(公告)日：2009-08-25

申请号：US11763077

申请日：2007-06-14

申请人： Pei-Chun Liao ,  Chia-Lin Chen

发明人： Pei-Chun Liao ,  Chia-Lin Chen

IPC分类号： G01R31/26

CPC分类号： G01R31/2858 ,  G01R31/129 ,  G01R31/2623

摘要： The current invention provides a method of determining the lifetime of a semiconductor device due to time dependent dielectric breakdown (TDDB). This method includes providing a plurality of samples of dielectric layer disposed as a gate dielectric layer of a MOS transistor, approximating a source/drain current density distribution as a first function of voltage applied on the samples, approximating a substrate current density distribution as a second function of voltage applied on the samples, approximating a dielectric layer lifetime distribution as a third function of source/drain current density and substrate current density in the samples, deriving, from the first, the second, and the third functions, an empirical model wherein a dielectric layer lifetime is a function of voltage applied thereon, and using the model to determine dielectric layer lifetime at a pre-determined operating gate voltage.

摘要翻译： 本发明提供一种由于时间依赖介电击穿（TDDB）确定半导体器件的寿命的方法。 该方法包括提供设置为MOS晶体管的栅介质层的介质层的多个样本，其近似源/漏电流密度分布作为施加在样本上的电压的第一函数，将基板电流密度分布近似为第二 作为施加在样品上的电压的函数，近似作为源/漏电流密度和样品中的衬底电流密度的第三函数的介电层寿命分布，从第一，第二和第三函数导出经验模型，其中 介电层寿命是施加在其上的电压的函数，并且使用该模型来确定在预定的工作栅极电压下的介电层寿命。

公开(公告)号：US07453280B1

公开(公告)日：2008-11-18

申请号：US11896364

申请日：2007-08-31

申请人： Sheng-Hui Liang ,  Chia-Lin Chen ,  Pei-Chun Liao ,  Chin-Yuan Ko

发明人： Sheng-Hui Liang ,  Chia-Lin Chen ,  Pei-Chun Liao ,  Chin-Yuan Ko

IPC分类号： G01R31/26 ,  G01R31/28

CPC分类号： G01R31/2623 ,  G01R31/2831 ,  G01R31/2894 ,  G11C11/41 ,  G11C29/006 ,  G11C29/50 ,  G11C2029/0403 ,  G11C2029/5002 ,  G11C2029/5006

摘要： A method for testing a batch of semiconductor devices in wafer level is provided. The method includes the following steps: (a) obtaining a breakdown voltage of gate dielectric of each semiconductor device; (b) applying, to the gate dielectric of each semiconductor device, a stress voltage below the breakdown voltage but above a base voltage of gate dielectric of the semiconductor devices; (c) after the step (b), measuring currents of gate dielectric of each semiconductor devices at the base voltage; and (d) obtaining a tailing distribution from the measured currents.

摘要翻译： 提供了一种用于测试晶片级的一批半导体器件的方法。 该方法包括以下步骤：（a）获得每个半导体器件的栅极电介质的击穿电压; （b）向每个半导体器件的栅极电介质施加低于击穿电压但高于半导体器件的栅极电介质的基极电压的应力电压; （c）在步骤（b）之后，测量每个半导体器件在基极电压下的栅极电介质的电流; 和（d）从测量的电流获得拖尾分布。