公开(公告)号：US07958279B2

公开(公告)日：2011-06-07

申请号：US12405953

申请日：2009-03-17

申请人： Tomohisa Takai ,  Ryo Fukuda

发明人： Tomohisa Takai ,  Ryo Fukuda

IPC分类号： G06F13/00 ,  G06F13/12

CPC分类号： G06F13/4282

摘要： A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of the data transmitter circuit to 2-bit complementary data transmitted via first and second transmission lines, a reception control circuit which, when a transfer completion signal has been received via a third transmission line, compares an allocated identification number with the restored identification number data, and a shift register provided in association with the reception control circuit, wherein each reception control circuit feeds transfer data transmitted from the data transmitter circuit corresponding to the identification number data to the associated shift register in accordance with a result of comparison between the identification number data and the allocated identification number.

摘要翻译： 一种半导体集成电路装置，包括数据发送器电路和多个数据接收器电路，每个数据接收器电路具有数据转换器电路，其恢复识别号码数据的每一位并将数据从数据发送器电路的移位寄存器传送到2位 通过第一和第二传输线传输的补充数据;接收控制电路，当经由第三传输线接收到传送完成信号时，将分配的识别号与恢复的标识号数据进行比较，以及移位寄存器 接收控制电路，其中每个接收控制电路根据识别号码数据和所分配的识别号码之间的比较结果，将对应于识别号码数据的数据发送器电路发送的传送数据提供给相关联的移位寄存器。

公开(公告)号：US20090183020A1

公开(公告)日：2009-07-16

申请号：US12405953

申请日：2009-03-17

申请人： Tomohisa Takai ,  Ryo Fukuda

发明人： Tomohisa Takai ,  Ryo Fukuda

IPC分类号： G06F1/08

CPC分类号： G06F13/4282

摘要： A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of the data transmitter circuit to 2-bit complementary data transmitted via first and second transmission lines, a reception control circuit which, when a transfer completion signal has been received via a third transmission line, compares an allocated identification number with the restored identification number data, and a shift register provided in association with the reception control circuit, wherein each reception control circuit feeds transfer data transmitted from the data transmitter circuit corresponding to the identification number data to the associated shift register in accordance with a result of comparison between the identification number data and the allocated identification number.

摘要翻译： 一种半导体集成电路装置，包括数据发送器电路和多个数据接收器电路，每个数据接收器电路具有数据转换器电路，其恢复识别号码数据的每一位并将数据从数据发送器电路的移位寄存器传送到2位 通过第一和第二传输线传输的补充数据;接收控制电路，当经由第三传输线接收到传送完成信号时，将分配的识别号与恢复的标识号数据进行比较，以及移位寄存器 接收控制电路，其中每个接收控制电路根据识别号码数据和所分配的识别号码之间的比较结果，将对应于识别号码数据的数据发送器电路发送的传送数据提供给相关联的移位寄存器。

公开(公告)号：US20060048027A1

公开(公告)日：2006-03-02

申请号：US11066250

申请日：2005-02-28

申请人： Tomohisa Takai ,  Ryo Fukuda

发明人： Tomohisa Takai ,  Ryo Fukuda

IPC分类号： G01R31/28

CPC分类号： G11C29/028 ,  G11C7/20 ,  G11C16/20 ,  G11C29/802 ,  G11C2029/4402

摘要： A semiconductor device transfers first data to a circuit block. The semiconductor device is provided with a storage circuit configured to store the first data, a shift register configured to set the first data, a transfer circuit configured to transfer the first data from the shift register to the circuit block, a first input terminal configured to receive a first signal indicating the end of a transfer operation, a resetting signal-generating circuit configured to generate a resetting signal for resetting the shift register based on the first signal, a setting signal-generating circuit configured to generate a setting signal for setting the first data in the shift register again after the shift register is reset, and an output circuit configured to externally output the first data that has been set again.

摘要翻译： 半导体器件将第一数据传送到电路块。 所述半导体装置具备：存储电路，被配置为存储所述第一数据，移位寄存器，被配置为设置所述第一数据;传送电路，被配置为将所述第一数据从所述移位寄存器传送到所述电路块;第一输入端， 接收指示传送操作结束的第一信号;复位信号发生电路，被配置为基于所述第一信号产生用于复位所述移位寄存器的复位信号;设置信号发生电路，被配置为产生用于设置所述移位寄存器的设置信号， 在移位寄存器复位之后，移位寄存器中的第一数据再次被配置为从外部输出再次被设置的第一数据。

公开(公告)号：US07519742B2

公开(公告)日：2009-04-14

申请号：US11368495

申请日：2006-03-07

申请人： Tomohisa Takai ,  Ryo Fukuda

发明人： Tomohisa Takai ,  Ryo Fukuda

IPC分类号： G06F3/00

CPC分类号： G06F13/4282

摘要： A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of the data transmitter circuit to 2-bit complementary data transmitted via first and second transmission lines, a reception control circuit which, when a transfer completion signal has been received via a third transmission line, compares an allocated identification number with the restored identification number data, and a shift register provided in association with the reception control circuit, wherein each reception control circuit feeds transfer data transmitted from the data transmitter circuit corresponding to the identification number data to the associated shift register in accordance with a result of comparison between the identification number data and the allocated identification number.

摘要翻译： 一种半导体集成电路装置，包括数据发送器电路和多个数据接收器电路，每个数据接收器电路具有数据转换器电路，其恢复识别号码数据的每一位并将数据从数据发送器电路的移位寄存器传送到2位 通过第一和第二传输线传输的补充数据;接收控制电路，当经由第三传输线接收到传送完成信号时，将分配的识别号与恢复的标识号数据进行比较，以及移位寄存器 接收控制电路，其中每个接收控制电路根据识别号码数据和所分配的识别号码之间的比较结果，将对应于识别号码数据的数据发送器电路发送的传送数据提供给相关联的移位寄存器。

公开(公告)号：US20090015310A1

公开(公告)日：2009-01-15

申请号：US12208847

申请日：2008-09-11

申请人： Tomohisa TAKAI ,  Ryo Fukuda

发明人： Tomohisa TAKAI ,  Ryo Fukuda

IPC分类号： H03K3/00

CPC分类号： G11C29/028 ,  G11C7/20 ,  G11C16/20 ,  G11C29/802 ,  G11C2029/4402

摘要： A semiconductor device transfers first data to a circuit block. The semiconductor device is provided with a storage circuit configured to store the first data, a shift register configured to set the first data, a transfer circuit configured to transfer the first data from the shift register to the circuit block, a first input terminal configured to receive a first signal indicating the end of a transfer operation, a resetting signal-generating circuit configured to generate a resetting signal for resetting the shift register based on the first signal, a setting signal-generating circuit configured to generate a setting signal for setting the first data in the shift register again after the shift register is reset, and an output circuit configured to externally output the first data that has been set again.

摘要翻译： 半导体器件将第一数据传送到电路块。 所述半导体装置具备：存储电路，被配置为存储所述第一数据，移位寄存器，被配置为设置所述第一数据;传送电路，被配置为将所述第一数据从所述移位寄存器传送到所述电路块;第一输入端， 接收指示传送操作结束的第一信号;复位信号发生电路，被配置为基于所述第一信号产生用于复位所述移位寄存器的复位信号;设置信号发生电路，被配置为产生用于设置所述移位寄存器的设置信号， 在移位寄存器复位之后，移位寄存器中的第一数据再次被配置为从外部输出再次被设置的第一数据。

公开(公告)号：US07433978B2

公开(公告)日：2008-10-07

申请号：US11066250

申请日：2005-02-28

申请人： Tomohisa Takai ,  Ryo Fukuda

发明人： Tomohisa Takai ,  Ryo Fukuda

IPC分类号： G06F3/00

CPC分类号： G11C29/028 ,  G11C7/20 ,  G11C16/20 ,  G11C29/802 ,  G11C2029/4402

摘要： A semiconductor device transfers first data to a circuit block. The semiconductor device is provided with a storage circuit configured to store the first data, a shift register configured to set the first data, a transfer circuit configured to transfer the first data from the shift register to the circuit block, a first input terminal configured to receive a first signal indicating the end of a transfer operation, a resetting signal-generating circuit configured to generate a resetting signal for resetting the shift register based on the first signal, a setting signal-generating circuit configured to generate a setting signal for setting the first data in the shift register again after the shift register is reset, and an output circuit configured to externally output the first data that has been set again.

摘要翻译： 半导体器件将第一数据传送到电路块。 所述半导体装置具备：存储电路，被配置为存储所述第一数据，移位寄存器，被配置为设置所述第一数据;传送电路，被配置为将所述第一数据从所述移位寄存器传送到所述电路块;第一输入端， 接收指示传送操作结束的第一信号;复位信号发生电路，被配置为基于所述第一信号产生用于复位所述移位寄存器的复位信号;设置信号发生电路，被配置为产生用于设置所述移位寄存器的设置信号， 在移位寄存器复位之后，移位寄存器中的第一数据再次被配置为从外部输出再次被设置的第一数据。

公开(公告)号：US20060200591A1

公开(公告)日：2006-09-07

申请号：US11368495

申请日：2006-03-07

申请人： Tomohisa Takai ,  Ryo Fukuda

发明人： Tomohisa Takai ,  Ryo Fukuda

IPC分类号： G06F3/00

CPC分类号： G06F13/4282

摘要： A semiconductor integrated circuit apparatus, comprising a data transmitter circuit, and a plurality of data receiver circuits each having a data converter circuit which restores each of bits of identification number data and transfer data from a shift register of the data transmitter circuit to 2-bit complementary data transmitted via first and second transmission lines, a reception control circuit which, when a transfer completion signal has been received via a third transmission line, compares an allocated identification number with the restored identification number data, and a shift register provided in association with the reception control circuit, wherein each reception control circuit feeds transfer data transmitted from the data transmitter circuit corresponding to the identification number data to the associated shift register in accordance with a result of comparison between the identification number data and the allocated identification number.

公开(公告)号：US20120068256A1

公开(公告)日：2012-03-22

申请号：US13232492

申请日：2011-09-14

申请人： Ryo Fukuda ,  Yoshihisa Iwata

发明人： Ryo Fukuda ,  Yoshihisa Iwata

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L27/11578 ,  G11C16/0416 ,  H01L27/11565 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： An dielectric film is formed above the semiconductor substrate. A first conductive layer is formed in the dielectric film and extending in a first direction. The first conductive layer is connected to a first select transistor. A second conductive layer formed in the dielectric film and extending in the first direction. The second conductive layer is connected to a second select transistor. A semiconductor layer is connected to both the first and second conductive layers and functioning as a channel layer of a memory transistor. A gate-insulating film is formed on the semiconductor layer. The gate-insulating film includes a charge accumulation film as a portion thereof. A third conductive layer is surrounded by the gate-insulating film.

摘要翻译： 在半导体衬底上方形成绝缘膜。 第一导电层形成在电介质膜中并沿第一方向延伸。 第一导电层连接到第一选择晶体管。 形成在电介质膜中并沿第一方向延伸的第二导电层。 第二导电层连接到第二选择晶体管。 半导体层连接到第一和第二导电层两者并用作存储晶体管的沟道层。 在半导体层上形成栅极绝缘膜。 栅极绝缘膜包括作为其一部分的电荷累积膜。 第三导电层被栅极绝缘膜包围。

公开(公告)号：US07609551B2

公开(公告)日：2009-10-27

申请号：US11860956

申请日：2007-09-25

申请人： Tomoaki Shino ,  Akihiro Nitayama ,  Takeshi Hamamoto ,  Hideaki Aochi ,  Takashi Ohsawa ,  Ryo Fukuda

发明人： Tomoaki Shino ,  Akihiro Nitayama ,  Takeshi Hamamoto ,  Hideaki Aochi ,  Takashi Ohsawa ,  Ryo Fukuda

IPC分类号： G11C14/00 ,  G11C16/04

CPC分类号： H01L29/792 ,  G11C11/404 ,  G11C11/4074 ,  G11C14/0018 ,  G11C2211/4016 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L27/1203 ,  H01L29/42344 ,  H01L29/785 ,  H01L29/78648

摘要： This disclosure concerns a memory comprising a charge trapping film; a gate insulating film; a back gate on the charge trapping film; a front gate on the gate insulating film; and a body region provided between a drain and a source, wherein the memory includes a first storage state for storing data depending on the number of majority carriers in the body region and a second storage state for storing data depending on the amount of charges in the charge trapping film, and the memory is shifted from the first storage state to the second storage state by converting the number of majority carriers in the body region into the amount of charges in the charge trapping film or from the second storage state to the first storage state by converting the amount of charges in the charge trapping film into the number of majority carriers in the body region.

摘要翻译： 本公开涉及包含电荷捕获膜的存储器; 栅极绝缘膜; 电荷捕获膜上的后门; 栅极绝缘膜上的前门; 以及设置在漏极和源极之间的体区，其中所述存储器包括用于根据所述身体区域中的多数载体的数量存储数据的第一存储状态和用于根据所述体内区域中的电荷量存储数据的第二存储状态 通过将身体区域中的多数载体的数量转换为电荷俘获膜中的电荷量或从第二存储状态到第一存储器，将存储器从第一存储状态转移到第二存储状态 通过将电荷俘获膜中的电荷量转换成体区中的多数载体的数量来进行状态。

公开(公告)号：US07602657B2

公开(公告)日：2009-10-13

申请号：US11950097

申请日：2007-12-04

申请人： Ryo Fukuda

发明人： Ryo Fukuda

IPC分类号： G11C7/00

CPC分类号： G11C11/404 ,  G11C7/065 ,  G11C7/08 ,  G11C7/12 ,  G11C11/4091 ,  G11C11/4094 ,  G11C2207/005 ,  G11C2207/2281 ,  G11C2211/4016

摘要： A semiconductor memory device includes a sense amplifier for the FBC, a first node and a second node can be disconnected from each other by a first isolation transistor. A third node and a fourth node can be disconnected from each other by a second isolation transistor. The first node is connected to the first memory cell. The third node is connected to the second memory cell. A first amplification transistor and a second amplification transistor are connected between the first node and the third node. A third amplification transistor and a fourth amplification transistor are connected between the second node and the fourth node. This enables to parallelly execute read data transfer to the data lines and precharge to prepare for the next read operation.

摘要翻译： 半导体存储器件包括用于FBC的读出放大器，第一节点和第二节点可以通过第一隔离晶体管彼此断开。 第三节点和第四节点可以通过第二隔离晶体管彼此断开。 第一个节点连接到第一个存储单元。 第三节点连接到第二个存储单元。 第一放大晶体管和第二放大晶体管连接在第一节点和第三节点之间。 第三放大晶体管和第四放大晶体管连接在第二节点和第四节点之间。 这使得能够并行地执行对数据线的读取数据传输并预充电以准备下一次读取操作。