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公开(公告)号：US20120251127A1
公开(公告)日：2012-10-04
申请号：US13365819
申请日：2012-02-03
IPC分类号： H04B10/04
CPC分类号： H04J3/1652
摘要： An apparatus for mapping multiple lower-speed signal transmission frames to a higher-speed signal transmission frame. The apparatus includes buffers configured to buffer the lower-speed signal transmission frames, determination units configured to determine frequency justification information for the lower-speed signal transmission frames, a barrel shifter configured to receive signals output from the buffers, and a controller configured to control the barrel shifter to map the lower-speed signal transmission frames to the higher-speed signal transmission frame based on external settings for the respective lower-speed signal transmission frames and the frequency justification information determined by the determination units. When the minimum unit of the lower-speed signal transmission frames is a channel, the number of the buffers and the number of the determination units correspond to the maximum number of channels that can be multiplexed in the higher-speed signal transmission frame.
摘要翻译： 一种用于将多个低速信号传输帧映射到更高速度的信号传输帧的装置。 该装置包括被配置为缓冲低速信号传输帧的缓冲器，被配置为确定低速信号传输帧的频率调整信息的确定单元，被配置为接收从缓冲器输出的信号的桶形移位器，以及被配置为控制 桶形移位器基于各个低速信号传输帧的外部设置和由确定单元确定的频率对齐信息将低速信号传输帧映射到较高速度的信号传输帧。 当低速信号传输帧的最小单位是信道时，缓冲器的数量和确定单元的数量对应于在高速信号传输帧中可以多路复用的最大信道数。
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公开(公告)号：US08571073B2
公开(公告)日：2013-10-29
申请号：US13365819
申请日：2012-02-03
IPC分类号： H04J3/02
CPC分类号： H04J3/1652
摘要： An apparatus for mapping multiple lower-speed signal transmission frames to a higher-speed signal transmission frame. The apparatus includes buffers configured to buffer the lower-speed signal transmission frames, determination units configured to determine frequency justification information for the lower-speed signal transmission frames, a barrel shifter configured to receive signals output from the buffers, and a controller configured to control the barrel shifter to map the lower-speed signal transmission frames to the higher-speed signal transmission frame based on external settings for the respective lower-speed signal transmission frames and the frequency justification information determined by the determination units. When the minimum unit of the lower-speed signal transmission frames is a channel, the number of the buffers and the number of the determination units correspond to the maximum number of channels that can be multiplexed in the higher-speed signal transmission frame.
摘要翻译： 一种用于将多个低速信号传输帧映射到更高速度的信号传输帧的装置。 该装置包括被配置为缓冲低速信号传输帧的缓冲器，被配置为确定低速信号传输帧的频率调整信息的确定单元，被配置为接收从缓冲器输出的信号的桶形移位器，以及被配置为控制 桶形移位器基于各个低速信号传输帧的外部设置和由确定单元确定的频率对齐信息将低速信号传输帧映射到较高速度的信号传输帧。 当低速信号传输帧的最小单位是信道时，缓冲器的数量和确定单元的数量对应于在高速信号传输帧中可以多路复用的最大信道数。
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公开(公告)号：US20130058643A1
公开(公告)日：2013-03-07
申请号：US13665146
申请日：2012-10-31
申请人： Hiroyuki HONMA , Toru Katagiri , Hiromichi Makishima , Masahiro Shioda , Hiroyuki Kitajima , Ichiro Yokokura
发明人： Hiroyuki HONMA , Toru Katagiri , Hiromichi Makishima , Masahiro Shioda , Hiroyuki Kitajima , Ichiro Yokokura
IPC分类号： H04B10/08
CPC分类号： H04J3/1652 , H04J2203/0058 , H04L43/0876
摘要： A data amount derivation apparatus includes: a first calculator configured to derive, for one series of parallelized mapping signals, amount of data in each frame period for a frame into which the parallelized mapping signals are mapped; and a second calculator configured to sum up amounts of data in N frame periods, where N is an integer, and to derive the resulting summation value as the amount of data to be mapped into the frame, each of the amounts of data in each of the frame periods being derived by the first calculator.
摘要翻译： 数据量导出装置包括：第一计算器，被配置为针对一系列并行映射信号，对并行映射信号映射到的帧的每个帧周期中的数据量; 以及第二计算器，被配置为对N个帧周期内的数据量进行相加，其中N是整数，并且导出所得到的求和值作为要映射到该帧中的数据量，每个数据量 帧周期由第一计算器导出。
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公开(公告)号：US08588256B2
公开(公告)日：2013-11-19
申请号：US12961463
申请日：2010-12-06
申请人： Toru Katagiri , Hiroyuki Kitajima
发明人： Toru Katagiri , Hiroyuki Kitajima
CPC分类号： H04J3/07 , H04J3/1629
摘要： A transmission apparatus exercises insertion control for inserting a client signal and a stuff byte into a payload area in a frame into which the client signal is to be mapped, and sends the frame after the insertion control. In addition, the transmission apparatus inserts the client signal or the stuff byte in columns of the frame into the payload area except a leading column.
摘要翻译： 发送装置进行插入控制，将客户端信号和填充字节插入到要映射客户端信号的帧中的有效载荷区域中，并且在插入控制之后发送帧。 此外，发送装置将客户端信号或填充字节插入到帧中的除了前导列之外的有效载荷区域中。
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5.发明申请METHOD OF APPLYING ETFB TO ABNORMAL PROLIFERATION OF CELL, AND ABNORMAL PROLIFERATION INHIBITOR 有权将ETFB应用于异常增殖细胞和异常增殖抑制剂的方法公开(公告)号：US20140235491A1
公开(公告)日：2014-08-21
申请号：US14342774
申请日：2011-12-27
IPC分类号： G01N33/68 , C12Q1/68 , C12N15/113 , G01N33/50
CPC分类号： G01N33/6872 , C12N15/113 , C12Q1/6883 , C12Q2600/158 , G01N33/5044 , G01N33/6893 , G01N2800/20
摘要： Provided is a method for identifying and suppressing abnormal growth of fibroblasts at an early stage. Provided is a method for identifying the growth state of fibroblasts using as an index the level of expression of ETFB (electron transfer flavoprotein beta subunit), comprising: judging, in cases where the level of expression of ETFB is high, that there is a high probability that fibroblasts are abnormally growing; and judging, in cases where the level of expression of ETFB is low, that there is a high probability that fibroblasts are normally growing. Further, by inhibition of ETFB, abnormal growth of fibroblasts can be suppressed.
摘要翻译： 提供了一种早期鉴别和抑制成纤维细胞异常生长的方法。 提供了使用作为ETFB（电子转移黄素蛋白β亚基）的表达水平的指标来鉴定成纤维细胞的生长状态的方法，其包括：在ETFB的表达水平高的情况下判断为高 成纤维细胞异常生长的可能性 并且在ETFB的表达水平低的情况下判断成纤维细胞正常生长的可能性很高。 此外，通过抑制ETFB，可以抑制成纤维细胞的异常生长。
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公开(公告)号：US06145091A
公开(公告)日：2000-11-07
申请号：US259408
申请日：1999-02-22
申请人： Akira Yamamoto , Hiroyuki Kitajima , Kouji Arai , Yoshihisa Kamo
发明人： Akira Yamamoto , Hiroyuki Kitajima , Kouji Arai , Yoshihisa Kamo
CPC分类号： G06F11/1076 , G06F2211/1009
摘要： When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.
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7.发明授权Cache control by adding record identification information to partial write request 失效通过将记录标识信息添加到部分写入请求中进行缓存控制
公开(公告)号：US5694576A
公开(公告)日：1997-12-02
申请号：US530711
申请日：1995-09-19
申请人： Akira Yamamoto , Shigeo Homma , Yoshihiro Asaka , Yoshiaki Kuwahara , Akira Kurano , Masafumi Nozawa , Hiroyuki Kitajima
发明人： Akira Yamamoto , Shigeo Homma , Yoshihiro Asaka , Yoshiaki Kuwahara , Akira Kurano , Masafumi Nozawa , Hiroyuki Kitajima
CPC分类号： G06F12/0866
摘要： In an information processing system having a data processing apparatus, a control unit for a cache memory, and a storage unit for storing a record, respectively interconnected together, wherein when the control unit receives from the data processing apparatus a write request for a record to be written and if the record to be written is not being stored in the cache memory, the control unit receives a data to be written in the object record from the data processing apparatus and stores the received data in the cache memory. After notifying the data processing apparatus of a completion of a data write process, the control unit checks if the object record in which the data stored in the cache memory is being stored in the storage unit, if the object record is being stored in the storage unit, the data in the cache memory is written in the storage unit, and if not, the data in the cache memory is not written and such effect is notified to the data processing apparatus.
摘要翻译： 在具有数据处理装置，高速缓冲存储器的控制单元和分别互连在一起的记录的存储单元的信息处理系统中，其中当控制单元从数据处理装置接收到对记录的写请求时， 写入，并且如果要写入的记录未被存储在高速缓冲存储器中，则控制单元从数据处理装置接收要写入对象记录中的数据，并将接收到的数据存储在高速缓冲存储器中。 在通知数据处理装置完成数据写入处理之后，如果对象记录被存储在存储单元中，则控制单元检查存储在存储单元中的存储在高速缓冲存储器中的数据的对象记录是否存储在存储单元中 高速缓冲存储器中的数据被写入存储单元中，如果不存在，则高速缓冲存储器中的数据不被写入，并且将该效果通知给数据处理装置。
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8.发明授权Limiting modification of cache entries in a write-back cache based upon the amount of dirty lines in the cache 失效基于高速缓存中脏线的数量限制对回写高速缓存中的缓存条目的修改
公开(公告)号：US5623631A
公开(公告)日：1997-04-22
申请号：US383093
申请日：1995-02-03
申请人： Toshiaki Tsuboi , Akira Yamamoto , Shigeo Honma , Yoshihiro Asaka , Koji Ozawa , Hiroyuki Kitajima , Michio Miyazaki
发明人： Toshiaki Tsuboi , Akira Yamamoto , Shigeo Honma , Yoshihiro Asaka , Koji Ozawa , Hiroyuki Kitajima , Michio Miyazaki
CPC分类号： G06F12/0873 , G06F12/0866 , G06F12/0804 , G06F2212/312
摘要： In allocating an area of a cache memory to each storage unit, proper allocation of the cache memory is made to each storage unit. If the amount of write-after data becomes equal to or more than a threshold value, an allocation limit is set to each disk unit. If CPU issues a data write request requiring the amount of data equal to or more than the allocation limit, the data write request is held in a wait state until the amount of write-after data becomes less than the allocation limit. Therefore, the allocation amount to the disk unit becomes neither too large nor too small. In this manner, proper allocation of the cache memory to each disk unit can be realized.
摘要翻译： 在向每个存储单元分配高速缓冲存储器的区域时，对每个存储单元进行高速缓冲存储器的适当分配。 如果写入数据量等于或大于阈值，则对每个盘单元设置分配限制。 如果CPU发出数据写请求，要求数据量等于或大于分配限制，则数据写入请求将保持在等待状态，直到写入数据量小于分配限制为止。 因此，对于盘单元的分配量既不太大也不太小。 以这种方式，可以实现对每个盘单元的高速缓冲存储器的适当分配。
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公开(公告)号：US5606684A
公开(公告)日：1997-02-25
申请号：US319775
申请日：1994-10-07
申请人： Toshio Nakano , Masafumi Nozawa , Kiyoshi Hisano , Akihito Ogino , Akira Kurano , Hiroyuki Kitajima , Akihiko Togawa
发明人： Toshio Nakano , Masafumi Nozawa , Kiyoshi Hisano , Akihito Ogino , Akira Kurano , Hiroyuki Kitajima , Akihiko Togawa
CPC分类号： G06F3/0601 , G06F13/20 , G06F2003/0691 , G06F2003/0692
摘要： A buffer memory capable of storing contents of a plurality of tracks of a disk volume is provided in a disk controller or a disk drive, and in dump processing requested by a higher rank unit (CPU) to the disk controller, the data is immediately transferred from the buffer memory if the data to be dumped is present in the buffer memory, and if the data to be dumped is not present in the buffer memory, dump prefetching into the buffer memory is started and the execution of the dump processing is interrupted so that an on-line input/output operation other than the dump processing is accepted. When the dump prefetching into the buffer memory is over, the interrupted dump processing is resumed.
摘要翻译： 在磁盘控制器或磁盘驱动器中提供能够存储磁盘卷的多个磁道的内容的缓冲存储器，并且在由高级单元（CPU）向磁盘控制器请求的转储处理中，立即传送数据 如果缓冲存储器中存在要转储的数据，则从缓冲存储器中读取缓冲存储器中的数据，如果缓存器中不存在要转储的数据，则转储预取到缓冲存储器中，转储处理的执行中断 接受转储处理以外的在线输入/输出操作。 当转储预取到缓冲存储器中时，恢复中断的转储处理。
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公开(公告)号：US5388016A
公开(公告)日：1995-02-07
申请号：US843213
申请日：1992-02-28
CPC分类号： G06F3/0601 , G11B15/1816 , G11B20/1209 , G11B27/107 , G11B27/11 , G11B27/328 , G06F2003/0698 , G11B2220/20 , G11B2220/65 , G11B2220/90 , G11B2220/913
摘要： A magnetic tape data management method and apparatus is described that reduces the access time for updating and referring to directory data. At the time of accessing data on a magnetic tape loaded in a magnetic tape subsystem, directory data for the magnetic tape is, in response to the completion of the processing of data, recorded in a region located near the place at which the magnetic tape head is positioned at that time, said region constituting a directory data region (DDR). Further, a directory data memory for recording directory data from the magnetic tape is provided in the magnetic tape subsystem, remote from the tape. At the time of accessing data on the magnetic tape loaded in the magnetic tape subsystem, directory data for the magnetic tape processing is, in response to completion of the processing of data, recorded in the directory data memory in the magnetic tape subsystem.
摘要翻译： 描述了一种减少用于更新和参考目录数据的访问时间的磁带数据管理方法和装置。 在访问磁带子系统中装载的磁带上的数据时，磁带的目录数据响应于数据处理的完成而被记录在位于磁带头附近的区域 位于此时，所述区域构成目录数据区域（DDR）。 此外，用于从磁带记录目录数据的目录数据存储器设置在远离磁带的磁带子系统中。 在访问装载在磁带子系统中的磁带上的数据时，磁带处理的目录数据是响应于数据处理完成而被记录在磁带子系统中的目录数据存储器中的。
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