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公开(公告)号：US20210349664A1
公开(公告)日：2021-11-11
申请号：US17382253
申请日：2021-07-21
发明人： Marie SIA , Yoshihisa KOJIMA , Suguru NISHIKAWA , Riki SUZUKI
摘要： A memory system includes a non-volatile memory chip that includes a memory cell array, and a memory controller. The memory controller is configured to perform a read operation on the non-volatile memory chip by instructing the non-volatile memory chip to perform a sensing operation to read data stored in the memory cell array, estimating a time when the read data becomes ready to be transferred from the non-volatile memory chip to the memory controller, and instructing the non-volatile memory chip, after the estimated time, to perform a transfer operation to transfer the read data to the memory controller.
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公开(公告)号：US20210005264A1
公开(公告)日：2021-01-07
申请号：US17027041
申请日：2020-09-21
IPC分类号： G11C16/10 , G11C16/04 , G11C16/14 , G06F3/06 , G11C11/56 , G11C16/08 , G11C16/34 , G11C29/02 , G11C29/42 , G11C16/32
摘要： According to one embodiment, a memory system includes a nonvolatile semiconductor memory, and a controller. The semiconductor memory includes a memory cell, and a write circuit configured to write data to the memory cell by applying a program voltage to the memory cell and comparing a threshold voltage of the memory cell with a first reference voltage corresponding to the write data. The write circuit is configured to execute a first programming operation to obtain a value of a write parameter by comparing the threshold voltage with a second reference voltage different from the first reference voltage.
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公开(公告)号：US20200301611A1
公开(公告)日：2020-09-24
申请号：US16557895
申请日：2019-08-30
发明人： Marie SIA , Yoshihisa KOJIMA , Suguru NISHIKAWA , Riki SUZUKI
摘要： A memory system includes a non-volatile memory chip that includes a memory cell array, and a memory controller. The memory controller is configured to perform a read operation on the non-volatile memory chip by instructing the non-volatile memory chip to perform a sensing operation to read data stored in the memory cell array, estimating a time when the read data becomes ready to be transferred from the non-volatile memory chip to the memory controller, and instructing the non-volatile memory chip, after the estimated time, to perform a transfer operation to transfer the read data to the memory controller.
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公开(公告)号：US20200073592A1
公开(公告)日：2020-03-05
申请号：US16280994
申请日：2019-02-20
摘要： A memory system includes a nonvolatile memory including a plurality of blocks, in each of which a plurality of memory cells is arranged between bit lines and a source line, and a memory controller configured to control an operation of the nonvolatile memory. The memory controller is configured to issue a warming command to the nonvolatile memory when a temperature of the nonvolatile memory is lower than a first temperature, and the nonvolatile memory, in response to the warming command, causes current to flow through at least one bit line connected to memory cells of a first block.
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公开(公告)号：US20190096487A1
公开(公告)日：2019-03-28
申请号：US16129157
申请日：2018-09-12
摘要： According to one embodiment, a memory system includes a nonvolatile semiconductor memory, and a controller. The semiconductor memory includes a memory cell, and a write circuit configured to write data to the memory cell by applying a program voltage to the memory cell and comparing a threshold voltage of the memory cell with a first reference voltage corresponding to the write data. The write circuit is configured to execute a first programming operation to obtain a value of a write parameter by comparing the threshold voltage with a second reference voltage different from the first reference voltage.
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