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公开(公告)号：US08541672B2
公开(公告)日：2013-09-24
申请号：US13035458
申请日：2011-02-25
IPC分类号： G10C3/26
摘要： A lever is supported by a lever supporting portion. The lever is urged by a first spring and a second spring. The urging force of the first spring varies over the entire operational range of the lever. The second spring and a third spring are provided serially through a movable supporting member. The displacement of the movable supporting member is restricted by a fixed supporting member. If the urging force of the second spring exceeds the urging force of the third spring, the restriction on the displacement of the movable supporting member is removed. Therefore, the present configuration provides a player with feeling similar to that the player perceives when he manipulates a damper pedal of an acoustic piano.
摘要翻译： 杠杆由杠杆支撑部分支撑。 杆被第一弹簧和第二弹簧推动。 第一弹簧的推动力在杠杆的整个操作范围内变化。 第二弹簧和第三弹簧串联地设置在可动支承部件上。 可移动支撑构件的位移由固定的支撑构件限制。 如果第二弹簧的作用力超过第三弹簧的作用力，则可移动支撑构件的移动限制被去除。 因此，本配置为玩家提供了当他操纵原声钢琴的减震踏板时感觉类似的玩家的感觉。
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公开(公告)号：US07956261B2
公开(公告)日：2011-06-07
申请号：US12408904
申请日：2009-03-23
IPC分类号： G10D3/00
摘要： A lever 40 is supported by a lever supporting portion 41. The lever 40 is urged by a first spring 45 and a second spring 46. The urging force of the first spring 45 varies over the entire operational range of the lever 40. The second spring 46 and a third spring 47 are provided serially through a movable supporting member 48. The displacement of the movable supporting member 48 is restricted by a fixed supporting member FR. If the urging force of the second spring 46 exceeds the urging force of the third spring 47, the restriction on the displacement of the movable supporting member 48 is removed. Therefore, the present invention provides a player with feeling similar to that the player perceives when he manipulates a damper pedal of an acoustic piano.
摘要翻译： 杠杆40由杠杆支撑部分41支撑。杠杆40由第一弹簧45和第二弹簧46推动。第一弹簧45的推力在杆40的整个操作范围内变化。第二弹簧 46和第三弹簧47串联地设置通过可动支撑构件48.可动支撑构件48的位移受到固定支撑构件FR的限制。 如果第二弹簧46的作用力超过第三弹簧47的作用力，则可移动支撑构件48的移动限制被去除。 因此，本发明提供一种玩家，其具有与玩家在操纵原声钢琴的减震踏板时感觉到的感觉相似的感觉。
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公开(公告)号：US07893334B2
公开(公告)日：2011-02-22
申请号：US12403171
申请日：2009-03-12
IPC分类号： G10D13/02
摘要： A lever 40 is supported by a lever supporting portion 41. The lever 40 is urged by a spring 45. A friction producing member 47 is in contact with a pivot restricting member 46 which is interlocked with the lever 40 to produce a frictional force in a direction opposite to the direction in which the lever 40 pivots. Such a configuration allows a pedal apparatus to exhibit hysteresis in characteristics of the amount of depression of the lever 40 and reaction force.
摘要翻译： 杠杆40由杠杆支撑部分41支撑。杠杆40由弹簧45推动。摩擦产生构件47与枢转限制构件46接触，枢转限制构件46与杠杆40互锁以产生摩擦力 方向与杆40枢转的方向相反。 这种构造允许踏板装置在杠杆40的下压量和反作用力的特性中表现出滞后。
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4.发明申请公开(公告)号：US20120315736A1
公开(公告)日：2012-12-13
申请号：US13585394
申请日：2012-08-14
申请人： Toshiyuki Iwamoto , Gen Tsutsui
发明人： Toshiyuki Iwamoto , Gen Tsutsui
IPC分类号： H01L21/336
CPC分类号： H01L21/823431 , H01L21/823412 , H01L21/823462
摘要： A method of manufacturing a semiconductor device includes forming a first region including a FinFET (Fin Field Effect Transistor), forming a second region including a PlanarFET (Planar Field Effect Transistor), forming first extension regions in the plurality of fins in the first region, forming second extension regions in the second region using the second gate electrode as a mask, forming first side walls and second side walls on side surfaces of the first gate electrode and on side surfaces of the second gate electrode, respectively, and forming a source and a drain of the FinFET in the first region using the first gate electrode and first side walls as masks and forming a source and a drain of the PlanarFET in the second region by an ion implantation method using the second gate electrode and second side walls as masks, at the same time.
摘要翻译： 一种制造半导体器件的方法包括：形成包括FinFET（Fin场效应晶体管）的第一区域，形成包括平面场效应晶体管的平面场效应晶体管的平面场效应晶体管的第二区域，形成第一区域中的多个鳍片的第一延伸区域; 使用所述第二栅电极作为掩模在所述第二区域中形成第二延伸区域，分别在所述第一栅电极的侧表面和所述第二栅电极的侧表面上分别形成第一侧壁和第二侧壁，以及形成源 使用第一栅电极和第一侧壁作为掩模在第一区域中的FinFET的漏极，并且通过使用第二栅电极和第二侧壁作为掩模的离子注入方法在第二区域中形成平面FET的源极和漏极 ， 与此同时。
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公开(公告)号：US20080203500A1
公开(公告)日：2008-08-28
申请号：US12071126
申请日：2008-02-15
IPC分类号： H01L29/78
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28211 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/6656 , H01L29/78
摘要： A semiconductor device provided with a MIS type field effect transistor comprising a silicon substrate, a gate insulating film having a high-dielectric-constant metal oxide film which is formed on the silicon substrate via a silicon containing insulating film, a silicon-containing gate electrode formed on the gate insulating film, and a sidewall including, as a constituting material, silicon oxide on a lateral face side of the gate electrode, wherein a silicon nitride film is interposed between the sidewall and at least the lateral face of the gate electrode. This semiconductor device, although having a fine structure with a small gate length, is capable of low power consumption and fast operation.
摘要翻译： 一种设置有MIS型场效应晶体管的半导体器件，包括硅衬底，具有通过含硅绝缘膜形成在硅衬底上的高介电常数金属氧化物膜的栅极绝缘膜，含硅栅电极 形成在所述栅极绝缘膜上的侧壁，以及在所述栅电极的侧面上包含氧化硅作为构成材料的侧壁，其中，所述侧壁与所述栅电极的至少所述侧面之间插入有氮化硅膜。 该半导体器件尽管具有栅极长度小的精细结构，但能够实现低功耗和快速操作。
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公开(公告)号：US20050263802A1
公开(公告)日：2005-12-01
申请号：US11129439
申请日：2005-05-16
申请人： Naohiko Kimizuka , Kiyotaka Imai , Yuri Masuoka , Toshiyuki Iwamoto , Motofumi Saitoh , Hirohito Watanabe , Ayuka Tada
发明人： Naohiko Kimizuka , Kiyotaka Imai , Yuri Masuoka , Toshiyuki Iwamoto , Motofumi Saitoh , Hirohito Watanabe , Ayuka Tada
IPC分类号： H01L27/092 , H01L21/28 , H01L21/3115 , H01L21/336 , H01L21/8238 , H01L29/51 , H01L29/76 , H01L29/78
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/31155 , H01L21/823857 , H01L29/513 , H01L29/517
摘要： A semiconductor device 100 comprises a silicon substrate 102, an N-type MOSFET 118 including a high concentration-high dielectric constant film 108b formed on the silicon substrate 102 and a polycrystalline silicon film 114, and a P-type MOSFET 120 including a low concentration-high dielectric constant film 108a and a polycrystalline silicon film 114 formed on the semiconductor substrate 102 to be juxtaposed to the N-type MOSFET 118. The low concentration-high dielectric constant film 108a and the high concentration-high dielectric constant film 108b are composed of a material containing one or more element (s) selected from a group consisting of Hf and Zr. The concentration of the above-described metallic element contained in the low concentration-high dielectric constant film 108a is lower than that contained in the high concentration-high dielectric constant film 108b.
摘要翻译： 半导体器件100包括硅衬底102，包括形成在硅衬底102上的高浓度 - 高介电常数膜108b和多晶硅膜114的N型MOSFET 118以及包括低电平的P型MOSFET 120 浓度高介电常数膜108a和形成在半导体衬底102上并与N型MOSFET 118并置的多晶硅膜114。 低浓度 - 高介电常数膜108a和高浓度 - 高介电常数膜108b由含有选自Hf和Zr的一种或多种元素的材料构成。 包含在低浓度 - 高介电常数膜108a中的上述金属元素的浓度低于高浓度 - 高介电常数膜108b中包含的金属元素的浓度。
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公开(公告)号：US4653378A
公开(公告)日：1987-03-31
申请号：US734952
申请日：1985-05-16
CPC分类号： G10H1/348
摘要： A pedal keyboard for an electronic musical instrument, includes a pedal key vertically pivotal about a pivot mechanism mounted on a frame of a housing for the electronic musical instrument, a spring for biasing the pedal key so as to cause the pedal key to return to an initial position, and a stopper for limiting pivotal movement of the pedal key. The spring is arranged behind the pivot mechanism of the pedal key, and the stopper is arranged behind the spring, thereby improving key depression feeling and forming a gap in the pivot mechanism to achieve smooth pivotal movement of the key.
摘要翻译： 一种用于电子乐器的踏板键盘，包括围绕安装在用于电子乐器的壳体的框架上的枢转机构垂直地枢转的踏板键，用于偏置踏板键的弹簧，以使踏板键返回到 初始位置和用于限制踏板键的枢转运动的止动器。 弹簧布置在踏板键的枢转机构的后面，止动件布置在弹簧的后面，从而改善按键的感觉并在枢转机构中形成间隙，以实现键的平稳的枢转运动。
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公开(公告)号：US08283223B2
公开(公告)日：2012-10-09
申请号：US12789558
申请日：2010-05-28
申请人： Toshiyuki Iwamoto
发明人： Toshiyuki Iwamoto
IPC分类号： H01L21/336 , H01L21/8234
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A method of manufacturing a semiconductor device includes: forming a gate insulating film over a semiconductor substrate; forming a mask that has an opening at a position corresponding to the gate insulating film formed in an NMOSFET forming region and covers the gate insulating film; forming a first metal layer over the gate insulating film disposed in the NMOSFET forming region and the mask formed in a PMOSFET forming region; and performing a heat treatment to thermally diffuse a metal material forming the first metal layer into the gate insulating film formed in the NMOSFET forming region.
摘要翻译： 一种制造半导体器件的方法包括：在半导体衬底上形成栅极绝缘膜; 形成掩模，所述掩模在与形成在NMOSFET形成区域中的所述栅极绝缘膜相对应的位置处具有开口，并且覆盖所述栅极绝缘膜; 在设置在NMOSFET形成区域中的栅极绝缘膜上形成第一金属层，形成在PMOSFET形成区域中的掩模; 并且进行热处理以将形成第一金属层的金属材料热扩散到形成在NMOSFET形成区域中的栅极绝缘膜。
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9.发明申请Semiconductor device including MOSFET with controlled threshold voltage, and manufacturing method of the same 审中-公开包括具有受控阈值电压的MOSFET的半导体器件及其制造方法公开(公告)号：US20100133622A1
公开(公告)日：2010-06-03
申请号：US12591545
申请日：2009-11-23
申请人： Toshiyuki Iwamoto , Kiyota Imai
发明人： Toshiyuki Iwamoto , Kiyota Imai
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823857 , H01L21/823842 , H01L29/517
摘要： Provided is a semiconductor device including an N-MOSFET and a P-MOSFET on a semiconductor substrate. The N-MOSFET is formed on the semiconductor substrate, and includes a first gate insulating film including a first high-dielectric-constant film having a higher dielectric constant than a silicon oxide film. The P-MOSFET is formed on the semiconductor substrate, and includes a second gate insulating film including a second high-dielectric-constant film having a higher dielectric constant than a silicon oxide film. The first high-dielectric-constant film contains a first metal, and a concentration of the first metal increases from a surface of the first high-dielectric-constant film toward the semiconductor substrate. The second high-dielectric-constant film contains a second metal, and a concentration of the second metal decreases from a surface of the second high-dielectric-constant film toward the semiconductor substrate.
摘要翻译： 提供了一种在半导体衬底上包括N-MOSFET和P-MOSFET的半导体器件。 N-MOSFET形成在半导体衬底上，并且包括第一栅极绝缘膜，其包括具有比氧化硅膜更高的介电常数的第一高介电常数膜。 P-MOSFET形成在半导体衬底上，并且包括具有比氧化硅膜更高的介电常数的第二高介电常数膜的第二栅极绝缘膜。 第一高介电常数膜包含第一金属，并且第一金属的浓度从第一高介电常数膜的表面朝向半导体基板增加。 第二高介电常数膜包含第二金属，并且第二金属的浓度从第二高介电常数膜的表面朝向半导体基板减小。
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公开(公告)号：US20090289285A1
公开(公告)日：2009-11-26
申请号：US12385960
申请日：2009-04-24
申请人： Toshiyuki Iwamoto
发明人： Toshiyuki Iwamoto
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7833 , H01L21/823418 , H01L29/665 , H01L29/6659
摘要： Provided is a semiconductor device including a transistor that has a silicide layer formed over a semiconductor substrate. The gate electrode of each transistor is composed of a polysilicon electrode and the silicide layer formed thereon. Each transistor further has source/drain impurity-diffused layers composed of low-concentration doped regions and high-concentration doped regions, and silicide layers formed over the source/drain impurity-diffused layers. The surface of each silicide layer is positioned above the surface of the semiconductor substrate. The silicide layers contain a silicidation-suppressive metal, and have a concentration profile of the silicidation-suppressive metal over a region of the silicide layers ranging from the surface to a predetermined depth, such as increasing the concentration from the surface of each silicide layer in the depth-wise direction of the semiconductor substrate.
摘要翻译： 提供了一种半导体器件，其包括在半导体衬底上形成有硅化物层的晶体管。 每个晶体管的栅电极由多晶硅电极和形成在其上的硅化物层组成。 每个晶体管还具有由低浓度掺杂区域和高浓度掺杂区域组成的源极/漏极杂质扩散层，并且在源极/漏极杂质扩散层上形成硅化物层。 每个硅化物层的表面位于半导体衬底的表面之上。 硅化物层包含硅化抑制金属，并且在硅化物层的范围从表面到预定深度之间具有硅化物抑制金属的浓度分布，例如从每个硅化物层的表面增加浓度 半导体衬底的深度方向。
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