公开(公告)号：US06866791B1

公开(公告)日：2005-03-15

申请号：US09562681

申请日：2000-05-02

申请人： Tricia L. Breen ,  Peter M. Fryer ,  Robert L. Wisnieff ,  John Christopher Flake

发明人： Tricia L. Breen ,  Peter M. Fryer ,  Robert L. Wisnieff ,  John Christopher Flake

IPC分类号： B05D1/28 ,  B81C1/00 ,  C23F1/02 ,  C23F1/28 ,  G03F7/00 ,  B44C1/22 ,  C23F1/00

CPC分类号： B81C1/0046 ,  B05D1/283 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  C23F1/02 ,  C23F1/28 ,  G03F7/0002

摘要： The process of derivatization and patterning of surfaces, and more particularly to the formation of self-assembled molecular monolayers on metal oxide surfaces using microcontact printing and the derivative articles produced thereby.

摘要翻译： 表面的衍生和图案化的过程，更具体地涉及使用微接触印刷和由此制备的衍生物物质在金属氧化物表面上形成自组装分子单层。

公开(公告)号：US06380101B1

公开(公告)日：2002-04-30

申请号：US09551454

申请日：2000-04-18

申请人： Tricia L. Breen ,  Peter M. Fryer ,  Ronald Wayne Nunes ,  Mary Elizabeth Rothwell

发明人： Tricia L. Breen ,  Peter M. Fryer ,  Ronald Wayne Nunes ,  Mary Elizabeth Rothwell

IPC分类号： H01L2131

CPC分类号： B82Y30/00 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  G03F7/165

摘要： Microcontact printing to pattern a self-assembled monolayer (SAM) of an alkanephosphonic acid on a film of indium zinc oxide (IZO). The SAM is robust enough to protect the undelying IZO from wet chemical etching, and thus defines a pattern of IZO on the substrate. In the microcontact printing process, a patterned, elastomeric stamp is inked with a solution of octadecylphosphonic acid and brought into conformal contact with the IZO surface. A SAM of alkanesulfonic acid forms where the stamp and the surface make contact; the rest remains underivatized. The stamp is then removed from the surface. Etching the sample in aqueous oxalic acid removes the unprotected areas, while the areas protected by the SAM remain in place.

摘要翻译： 微接触印刷以在氧化锌铟（IZO）的膜上图案化烷基膦酸的自组装单层（SAM）。 SAM足够坚固以保护不敏感的IZO免受湿化学蚀刻，因此在衬底上限定了IZO的图案。 在微接触印刷工艺中，图案化的弹性体印模用十八烷基膦酸溶液着墨，并与IZO表面保形接触。 烷基磺酸的SAM形成邮票和表面接触的地方; 其余的仍然未完成。 然后从表面上取下印章。 在草酸水溶液中蚀刻样品可除去未保护的区域，而由SAM保护的区域保留在适当的位置。

公开(公告)号：US07037769B2

公开(公告)日：2006-05-02

申请号：US10890759

申请日：2004-07-14

申请人： Peter M. Fryer ,  Robert L. Wisnieff ,  Takatoshi Tsujimura

发明人： Peter M. Fryer ,  Robert L. Wisnieff ,  Takatoshi Tsujimura

IPC分类号： H01L21/00 ,  G02F1/136

CPC分类号： H01L29/78696 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/41733 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78633 ,  H01L29/78666

摘要： The present invention is directed to a thin film transistor (and related multilayer structures) that includes: source and drain electrodes 14 and 15 disposed at a specified interval above an insulating substrate 11 and formed by printing-and-plating; an a-Si film 16 disposed for the source and drain electrodes 14 and 15; a gate insulating film 17 laminated on the a-Si film 16; and a gate electrode 18 laminated on the gate insulating film 17 and formed by printing-and-plating. The a-Si film 16 and the gate insulating film 17 have an offset region 20 that uniformly extends beyond the dimensions of the gate electrode 18.

摘要翻译： 本发明涉及一种薄膜晶体管（及相关的多层结构），其包括：以绝缘基板11上方的特定间隔设置并通过印刷和电镀形成的源极和漏极14和15; 为源极和漏极14和15设置的a-Si膜16; 层叠在a-Si膜16上的栅极绝缘膜17; 以及层叠在栅极绝缘膜17上并通过印刷和电镀形成的栅电极18。 a-Si膜16和栅极绝缘膜17具有均匀地延伸超过栅电极18的尺寸的偏移区域20。

公开(公告)号：US06791144B1

公开(公告)日：2004-09-14

申请号：US09604430

申请日：2000-06-27

申请人： Peter M. Fryer ,  Robert L. Wisnieff ,  Takatoshi Tsujimura

发明人： Peter M. Fryer ,  Robert L. Wisnieff ,  Takatoshi Tsujimura

IPC分类号： H01L2701

CPC分类号： H01L29/78696 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/41733 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78633 ,  H01L29/78666

摘要： The present invention is directed to a thin film transistor (and related multilayer structures) that includes: source and drain electrodes 14 and 15 disposed at a specified interval above an insulating substrate 11 and formed by printing-and-plating; an a-Si-film 16 disposed for the source and drain electrodes 14 and 15; a gate insulating film 17 laminated on the a-Si film 16; and a gate electrode 18 laminated on the gate insulating film 17 and formed by printing-and-plating. The a-Si film 16 and the gate insulating film 17 have an offset region 20 that uniformly extends beyond the dimensions of the gate electrode 18.

摘要翻译： 本发明涉及一种薄膜晶体管（及相关的多层结构），其包括：以绝缘基板11上方的特定间隔设置并通过印刷和电镀形成的源极和漏极14和15; 为源极和漏极14和15设置的a-Si膜16; 层叠在a-Si膜16上的栅极绝缘膜17; 以及层叠在栅极绝缘膜17上并通过印刷和电镀形成的栅电极18。 a-Si膜16和栅极绝缘膜17具有均匀地延伸超过栅电极18的尺寸的偏移区域20。

公开(公告)号：US5912506A

公开(公告)日：1999-06-15

申请号：US937349

申请日：1997-09-20

申请人： Evan G. Colgan ,  Peter M. Fryer ,  James McKell Edwin Harper ,  Kenneth P. Rodbell

发明人： Evan G. Colgan ,  Peter M. Fryer ,  James McKell Edwin Harper ,  Kenneth P. Rodbell

IPC分类号： G02F1/1362 ,  H01L23/498 ,  H01L23/538 ,  H01L23/48

CPC分类号： H01L23/538 ,  H01L23/49866 ,  G02F2001/13629 ,  H01L2924/0002

摘要： A multi-layer metal sandwich structure with taper and reduced etch bias formed on a substrate includes a first metal layer formed on the substrate and a second metal layer formed on the first metal layer. The width of the first metal layer is greater than the width of the second metal layer at the interface of the first metal layer and the second metal layer. The second metal layer has tapered side walls. The taper angle between each side wall and the intersection of the first and second metal layers is between 5.degree. and 90.degree.. The multi-layer metal sandwich may also include a third metal layer formed on the second metal layer.

摘要翻译： 在衬底上形成具有锥形和减少的蚀刻偏压的多层金属夹层结构包括形成在衬底上的第一金属层和形成在第一金属层上的第二金属层。 第一金属层的宽度大于第一金属层和第二金属层的界面处的第二金属层的宽度。 第二金属层具有锥形侧壁。 每个侧壁与第一和第二金属层的交点之间的锥角在5°和90°之间。 多层金属夹层物还可以包括形成在第二金属层上的第三金属层。

公开(公告)号：US5221449A

公开(公告)日：1993-06-22

申请号：US910924

申请日：1992-07-09

申请人： Evan G. Colgan ,  Peter M. Fryer

发明人： Evan G. Colgan ,  Peter M. Fryer

IPC分类号： C23C14/14 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L21/768

CPC分类号： H01L21/76876 ,  C23C14/14 ,  H01L21/28079 ,  H01L21/28568 ,  H01L21/76841 ,  H01L29/6675

摘要： The present invention relates generally to a structure and a method of making Alpha-Ta films, and more particularly, to a structure and a method of making Alpha-Ta in thin films. A seed layer of Ta reactively sputtered in a nitrogen containing environment is grown on the substrate, and using this seed layer of Ta(N) layers of Alpha-Ta are then formed.

摘要翻译： 本发明一般涉及制造α-Ta膜的结构和方法，更具体地说，涉及在薄膜中制造α-Ta的结构和方法。 在含氮环境中反应溅射的Ta晶种层生长在衬底上，然后形成Ta（N）层的α-Ta种子层。

公开(公告)号：US06632536B2

公开(公告)日：2003-10-14

申请号：US09752019

申请日：2000-12-28

申请人： Stephen L. Buchwalter ,  Gareth Geoffrey Hougham ,  Kang-Wook Lee ,  John J. Ritsko ,  Mary Elizabeth Rothwell ,  Peter M. Fryer

发明人： Stephen L. Buchwalter ,  Gareth Geoffrey Hougham ,  Kang-Wook Lee ,  John J. Ritsko ,  Mary Elizabeth Rothwell ,  Peter M. Fryer

IPC分类号： B32B904

CPC分类号： B82Y30/00 ,  G02F1/13439 ,  Y10T428/31663

摘要： New etch barriers of indium-tin-oxide in the manufacturing process of thin film transistor-liquid crystal display are self-assembled monolayers, such as n-alkylsilanes. A typical process of applying a self-assembled monolayer is to ink a hydrolyzed n-octadecyltrimethoxysilane solution on to a stamp and then to transfer the solution onto ITO. The surface of the stamp may be polar enough to be wet with polar self-assembled monolayer solutions of an akylsilane. A non-polar stamp surface may be treated with oxygen plasma to obtain a wettable polar surface.

摘要翻译： 在薄膜晶体管 - 液晶显示器的制造过程中，铟锡氧化物的新的蚀刻屏障是自组装单层，例如正烷基硅烷。 施加自组装单层的典型方法是将水解的正十八烷基三甲氧基硅烷溶液油墨印刷到印模上，然后将溶液转移到ITO上。 印模的表面可以足够极性以使其与烷基硅烷的极性自组装单层溶液一起润湿。 可以用氧等离子体处理非极性印模表面，以获得可润湿的极性表面

公开(公告)号：US6165917A

公开(公告)日：2000-12-26

申请号：US878342

申请日：1997-06-18

申请人： John Batey ,  Peter M. Fryer ,  Jun Hyung Souk

发明人： John Batey ,  Peter M. Fryer ,  Jun Hyung Souk

IPC分类号： G02F1/1362 ,  H01L21/26 ,  H01L21/28 ,  H01L21/314 ,  H01L21/318 ,  H01L21/336 ,  H01L21/469 ,  H01L29/00 ,  H01L29/49 ,  H01L21/31

CPC分类号： H01L29/66765 ,  G02F2001/136295 ,  H01L21/28008 ,  H01L21/3185 ,  H01L27/124 ,  H01L29/4908 ,  H01L29/6675

摘要： A method for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display and a method of constructing the same, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper, aluminum, or other refractory metal gate and the gate insulator. Further, the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The layer is made in a plasma-enhanced chemical vapor deposition process wherein the gas mixture comprises one part silane to 135 parts nitrogen to 100 parts helium and 100 parts hydrogen. A structure, and a process for forming the structure, for providing stable and low-resistance electrical contact between copper, aluminum, or another refractory metal gate lines and a metallization layer of aluminum and/or molybdenum, includes using a conductive material, such as an indium tin oxide bridge. Prior to depositing the metallization layer, the copper, aluminum, or other refractory metal which extends over a portion of the conductive material, and a portion of the conductive material not covered by the copper, aluminum, or other refractory metal are passivated with a layer of the ammonia-free silicon nitride. The metallization layer is then connected to the conductive material through a via hole extending to that portion of the conductive material which is not covered by the copper, aluminum, or another refractory metal.

摘要翻译： 一种使用无氨氮化硅钝化铜，铝或其它难熔金属膜的方法，以及通过该方法制造的结构。 一种用于液晶显示器的薄膜晶体管及其构造方法，其中晶体管具有栅极，源极和漏极以及栅极和有源硅层之间的栅极绝缘体。 改进之处在于沉积在铜，铝或其它难熔金属栅极与栅绝缘体之间的无氨氮化硅层。 此外，栅极是铜，铝或另一种难熔金属，并直接沉积在基板上。 无氨氮化硅层也沉积在与栅极相邻的衬底的部分上以及从其延伸的栅极线上。 该层由等离子体增强化学气相沉积工艺制成，其中气体混合物包含一部分硅烷至135份氮至100份氦和100份氢。 铜，铝或另一难熔金属栅极线以及铝和/或钼的金属化层之间提供稳定且低电阻的电接触的结构和形成该结构的方法包括使用导电材料，例如 氧化铟锡桥。 在沉积金属化层之前，在导电材料的一部分上延伸的铜，铝或其它难熔金属以及未被铜，铝或其它难熔金属覆盖的导电材料的一部分被钝化， 的无氨氮化硅。 金属化层然后通过延伸到未被铜，铝或其他难熔金属覆盖的导电材料的那部分的通孔连接到导电材料。

公开(公告)号：US06545295B2

公开(公告)日：2003-04-08

申请号：US10137923

申请日：2002-05-02

申请人： John Batey ,  Peter M. Fryer ,  Jun Hyung Souk

发明人： John Batey ,  Peter M. Fryer ,  Jun Hyung Souk

IPC分类号： H01L2900

CPC分类号： H01L29/66765 ,  G02F2001/136295 ,  H01L21/28008 ,  H01L21/3185 ,  H01L27/124 ,  H01L29/4908 ,  H01L29/6675

摘要： A thin film transistor and a liquid crystal display panel are provided. These devices include a layer of ammonia-free silicon nitride formed between the gate and the gate insulator of the device.

摘要翻译： 提供薄膜晶体管和液晶显示面板。 这些装置包括在器件的栅极和栅极绝缘体之间形成的无氨氮化硅层。

公开(公告)号：US06420282B1

公开(公告)日：2002-07-16

申请号：US09658181

申请日：2000-09-08

申请人： John Batey ,  Peter M. Fryer ,  Jun Hyung Souk

发明人： John Batey ,  Peter M. Fryer ,  Jun Hyung Souk

IPC分类号： H01L2126

CPC分类号： H01L29/66765 ,  G02F2001/136295 ,  H01L21/28008 ,  H01L21/3185 ,  H01L27/124 ,  H01L29/4908 ,  H01L29/6675

摘要： A method for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display and a method of constructing the same, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper,aluminum, or other refractory metal gate and the gate insulator. Further,. the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The layer is made in a plasma-enhanced chemical vapor deposition process wherein the gas mixture comprises one part silane to 135 parts nitrogen to 100 parts helium and 100 parts hydrogen. A structure, and a process for forming the structure, for providing stable and low-resistance electrical contact between copper,aluminum, or another refractory metal gate lines and a metallization layer of aluminum and/or molybdenum, includes using a conductive material, such as an indium tin oxide bridge. Prior to depositing the metallization layer, the copper,aluminum, or other refractory metal which extends over a portion of the conductive material, and a portion of the conductive material not covered by the copper,aluminum, or other refractory metal are passivated with a layer of the ammonia-free silicon nitride. The metallization layer is then connected to the conductive material through a via hole extending to that portion of the conductive material which is not covered by the copper, aluminum, or another refractory metal.

摘要翻译： 一种使用无氨氮化硅钝化铜，铝或其它难熔金属膜的方法，以及通过该方法制造的结构。 一种用于液晶显示器的薄膜晶体管及其构造方法，其中晶体管具有栅极，源极和漏极以及栅极与有源硅层之间的栅极绝缘体。 改进之处在于沉积在铜，铝或其它难熔金属栅极与栅绝缘体之间的无氨氮化硅层。 进一步，。 门是铜，铝或另一难熔金属，并直接沉积在基底上。 无氨氮化硅层也沉积在与栅极相邻的衬底的部分上以及从其延伸的栅极线上。 该层由等离子体增强化学气相沉积工艺制成，其中气体混合物包含一部分硅烷至135份氮至100份氦和100份氢。 铜，铝或另一难熔金属栅极线以及铝和/或钼的金属化层之间提供稳定且低电阻的电接触的结构和形成该结构的方法包括使用导电材料，例如 氧化铟锡桥。 在沉积金属化层之前，在导电材料的一部分上延伸的铜，铝或其它难熔金属以及未被铜，铝或其它难熔金属覆盖的导电材料的一部分被钝化， 的无氨氮化硅。 金属化层然后通过延伸到未被铜，铝或其他难熔金属覆盖的导电材料的那部分的通孔连接到导电材料。