Thyristor with insulated gate
    2.
    发明授权
    Thyristor with insulated gate 失效
    带绝缘门的晶闸管

    公开(公告)号:US5315134A

    公开(公告)日:1994-05-24

    申请号:US896422

    申请日:1992-06-10

    CPC分类号: H01L29/7455

    摘要: A thyristor with an insulated gate includes a p-type emitter layer, an n-type base layer, a p-type base layer, and an n-type emitter layer. A drain electrode contacting the p-type base layer is formed adjacent to one side of the n-type emitter layer. An n-type drain layer, which is short-circuited with the p-type base layer by the drain electrode, is formed. An n-type source layer is formed a predetermined distance away from the n-type drain layer. A turn-off insulated gate is formed between the n-type source layer and the n-type drain layer. A source electrode is connected to a cathode electrode. Thereby, turn-off capability of the thyristor can be improved.

    摘要翻译: 具有绝缘栅的晶闸管包括p型发射极层,n型基极层,p型基极层和n型发射极层。 与p型基极层接触的漏电极与n型发射极层的一侧相邻地形成。 形成了由漏电极与p型基极层短路的n型漏极层。 n型源极层与n型漏极层形成规定的距离。 在n型源极层和n型漏极层之间形成有截止绝缘栅极。 源电极连接到阴极电极。 由此,能够提高晶闸管的关断能力。

    Method of operating thyristor with insulated gates
    3.
    发明授权
    Method of operating thyristor with insulated gates 失效
    用绝缘栅极操作晶闸管的方法

    公开(公告)号:US5428228A

    公开(公告)日:1995-06-27

    申请号:US164756

    申请日:1993-12-10

    摘要: A thyristor with insulated gates includes turn-off and turn-on MOSFETs. The turn-on MOSFET has a turn-on gate employing a p-type base as a channel and extending over an n-type base and an n-type emitter. The turn-off MOSFET has n-type drain and source layers formed in a p-type base layer, and a turn-off gate extending over the drain and source layers. The n-type drain layer is short-circuited with the p-type base layer via a drain electrode. The drain electrode is formed near an n-type emitter layer. When the thyristor is to be turned off, the first voltage is applied to the turn-on gate, and the second voltage is applied to the turn-off gate while the first voltage is applied to the turn-on gate. After the application of the second voltage continues for a predetermined period of time, the application of the first voltage to the turn-on gate is stopped. With this operation, the thyristor can be turned off even with a large current.

    摘要翻译: 具有绝缘栅极的晶闸管包括关断和导通MOSFET。 导通MOSFET具有采用p型基极作为沟道并在n型基极和n型发射极上延伸的导通栅极。 关断MOSFET具有形成在p型基极层中的n型漏极和源极层,以及在漏极和源极层上延伸的截止栅极。 n型漏极层经由漏电极与p型基极层短路。 在n型发射极层附近形成漏电极。 当晶闸管关断时,第一电压被施加到导通栅极,并且第二电压被施加到关断栅极,同时第一电压被施加到导通栅极。 在第二电压的施加持续预定时间段之后,停止向导通门施加第一电压。 通过这种操作,即使使用大电流,晶闸管也可以关闭。

    Method of manufacturing vertical power device
    4.
    发明授权
    Method of manufacturing vertical power device 失效
    垂直功率器件的制造方法

    公开(公告)号:US5985708A

    公开(公告)日:1999-11-16

    申请号:US816596

    申请日:1997-03-13

    摘要: A semiconductor apparatus comprising a vertical type semiconductor device having a first conducting type semiconductor substrate, a drain layer formed on the surface of the semiconductor substrate, a drain electrode formed on the surface of the drain layer, a second conducting type base layer selectively formed on the surface of the semiconductor substrate opposite to the drain layer, a first conducting type source layer selectively formed on the surface of the second conducting type base layer, a source electrode formed on the first conducting type source layer and the second conducting type base layer, and a gate electrode formed in contact with the first conducting type source layer, the second conducting type base layer and the semiconductor substrate through a gate insulating film and a lateral semiconductor device having an insulating layer formed in a region of the surface of the semiconductor substrate different from the second conducting type base layer, and a polycrystalline semiconductor layer formed on the insulating layer and having a first conducting type region and a second conducting type region, wherein the first conducting type source layer of the vertical semiconductor device and the first conducting type region of the polycrystalline semiconductor layer are simultaneously formed.

    摘要翻译: 一种半导体装置,包括具有第一导电型半导体衬底的垂直型半导体器件,形成在半导体衬底的表面上的漏极层,形成在漏极层的表面上的漏电极,第二导电型基极层, 所述半导体衬底的与所述漏极层相对的表面,选择性地形成在所述第二导电型基极层的表面上的第一导电型源极层,形成在所述第一导电型源极层和所述第二导电型基极层上的源电极, 以及通过栅极绝缘膜与第一导电型源极层,第二导电型基极层和半导体基板接触形成的栅电极,以及在半导体基板的表面的区域中形成有绝缘层的侧面半导体装置 不同于第二导电型基底层,和多晶 半导体层形成在绝缘层上并具有第一导电类型区域和第二导电类型区域,其中垂直半导体器件的第一导电型源极层和多晶半导体层的第一导电类型区域同时形成。