公开(公告)号：US06750477B2

公开(公告)日：2004-06-15

申请号：US10121623

申请日：2002-04-15

申请人： Tsutomu Yatsuo ,  Toshiyuki Ohno ,  Hidekatsu Onose ,  Saburo Oikawa

发明人： Tsutomu Yatsuo ,  Toshiyuki Ohno ,  Hidekatsu Onose ,  Saburo Oikawa

IPC分类号： H01L310312

CPC分类号： H01L29/7722 ,  H01L29/1608

摘要： In a static induction transistor, in addition to a first gate layer (4), a plurality of second gate layers (41) having a shallower depth and a narrower gap therebetween than those of the first gate layer (4) are provided in an area surrounded by the first gate layer (4), thereby an SiC static induction transistor with an excellent off characteristic is realized, while ensuring a required processing accuracy during production thereof.

摘要翻译： 在静电感应晶体管中，除了第一栅极层（4）之外，还具有与第一栅极层（4）相比具有较浅深度和间隔更窄的多个第二栅极层（41） 由第一栅极层（4）包围，从而实现具有优异的截止特性的SiC静态感应晶体管，同时确保其制造期间所需的加工精度。

公开(公告)号：US06566726B1

公开(公告)日：2003-05-20

申请号：US09516501

申请日：2000-03-01

申请人： Hidekatsu Onose ,  Tsutomu Yatsuo ,  Toshiyuki Ohno ,  Saburou Oikawa

发明人： Hidekatsu Onose ,  Tsutomu Yatsuo ,  Toshiyuki Ohno ,  Saburou Oikawa

IPC分类号： H01L2940

CPC分类号： H01L29/0615 ,  H02M7/003

摘要： To reduce the field intensity on the termination surface, almost not affecting the on-characteristic, a drift layer is made of two layers, an n-layer and n− layer, and a termination region is formed on the surface of the above n− layer. An impurity concentration ratio between the n− layer and the n-layer is less than 1:2, and the thickness of the n− layer is less than that of a source n+ layer. Reliability can be secured even in a high temperature operation.

摘要翻译： 为了降低终端表面上的场强，几乎不影响导通特性，漂移层由n层和n层两层构成，并且在上述n-层的表面上形成端接区， 层。 n层和n层之间的杂质浓度比小于1：2，n层的厚度小于源n +层的厚度。 即使在高温操作中也可以确保可靠性。

公开(公告)号：US20050006649A1

公开(公告)日：2005-01-13

申请号：US10824442

申请日：2004-04-15

申请人： Takayuki Iwasaki ,  Tsutomu Yatsuo ,  Hidekatsu Onose ,  Toshiyuki Oono

发明人： Takayuki Iwasaki ,  Tsutomu Yatsuo ,  Hidekatsu Onose ,  Toshiyuki Oono

IPC分类号： H01L29/772 ,  H02M7/00 ,  H01L31/0312

CPC分类号： H02M7/003 ,  H01L29/7722

摘要： A static induction transistor includes a semiconductor substrate with an energy band gap greater than that of silicon, and the semiconductor substrate has a first gate region to which a gate electrode is connected; and a second gate region positioned within a first semiconductor region which becomes a drain region, and the first gate region is in contact with a second semiconductor region which becomes a source region. According to this construction, the OFF characteristics of the static induction transistor are improved.

摘要翻译： 静电感应晶体管包括具有比硅的能带隙大的能带隙的半导体衬底，并且半导体衬底具有连接有栅电极的第一栅极区域; 以及位于成为漏极区域的第一半导体区域内的第二栅极区域，并且第一栅极区域与成为源极区域的第二半导体区域接触。 根据该结构，能够提高静电感应晶体管的OFF特性。

公开(公告)号：US06353236B1

公开(公告)日：2002-03-05

申请号：US09396733

申请日：1999-09-15

申请人： Tsutomu Yatsuo ,  Takayuki Iwasaki ,  Hidekatsu Onose ,  Shin Kimura

发明人： Tsutomu Yatsuo ,  Takayuki Iwasaki ,  Hidekatsu Onose ,  Shin Kimura

IPC分类号： H01L310312

CPC分类号： H01C7/10 ,  H01C7/12 ,  H01L29/8605 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49431

摘要： A wide bandgap semiconductor single crystal is applied as a semiconductor substrate material of a semiconductor surge absorber, and a surge absorption operation starting voltage is set by a punchthrough of a pn junction, to obtain a semiconductor surge absorber with a repetitive operation and a high surge endurance.

摘要翻译： 应用宽带隙半导体单晶作为半导体浪涌吸收体的半导体衬底材料，通过pn结穿透来设置浪涌吸收操作启动电压，以获得具有重复操作和高浪涌的半导体浪涌吸收器 耐力。

公开(公告)号：US4626888A

公开(公告)日：1986-12-02

申请号：US550586

申请日：1983-11-10

申请人： Takahiro Nagano ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Akira Horie

发明人： Takahiro Nagano ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Akira Horie

IPC分类号： H01L29/423 ,  H01L29/74 ,  H01L29/744 ,  H01L23/48

CPC分类号： H01L29/42308 ,  H01L29/74 ,  H01L29/744

摘要： In accordance with the present invention, a plurality of strip-shaped emitter layers on the cathode side are radially arranged on one main surface of the semiconductor substrate while forming a plurality of rings. A gate electrode is in ohmic contact with a part of a base layer which surrounds and is adjacent to each of said emitter layers on the cathode side. Between rings formed by said emitter layers on the cathode side, a ring-shaped gate collecting electrode is provided to be connected to said gate electrode. The gate collecting electrode is provided at a position to balance the potential differences produced by gate currents respectively corresponding to inside and outside of said gate collecting electrode.

摘要翻译： 根据本发明，阴极侧的多个条状发射极层径向地布置在半导体衬底的一个主表面上，同时形成多个环。 栅电极与基极层的一部分欧姆接触，该基极层围绕并邻近阴极侧的每个发射极层。 在由阴极侧上的发射极层形成的环之间，设置有环形栅极集电极，以连接到所述栅电极。 栅极集电极设置在平衡由分别对应于所述栅极集电极的内部和外部的栅极电流产生的电位差的位置。

公开(公告)号：US4651189A

公开(公告)日：1987-03-17

申请号：US680837

申请日：1984-12-12

申请人： Tsutomu Yatsuo ,  Takahiro Nagano ,  Saburo Oikawa ,  Yukimasa Sato ,  Shin Kimura ,  Hiroshi Fukui

发明人： Tsutomu Yatsuo ,  Takahiro Nagano ,  Saburo Oikawa ,  Yukimasa Sato ,  Shin Kimura ,  Hiroshi Fukui

IPC分类号： H01L29/08 ,  H01L29/10 ,  H01L29/167 ,  H01L29/32 ,  H01L29/423 ,  H01L29/744 ,  H01L29/74

CPC分类号： H01L29/744 ,  H01L29/0804 ,  H01L29/0834 ,  H01L29/0839 ,  H01L29/1004 ,  H01L29/102 ,  H01L29/167 ,  H01L29/32 ,  H01L29/42304 ,  H01L29/42308

摘要： A gate turn-off thyristor and a transistor are disclosed, each of which comprises: a semiconductor substrate including at least three semiconductor layers between a pair of principal surfaces, adjacent ones of the semiconductor layers being different in conductivity type from each other, a first one of the semiconductor layers being formed of at least one strip-shaped region with a constant width, a second one of the semiconductor layers being exposed to a first principal surface of the semiconductor substrate together with the strip-shaped region; a first main electrode kept in ohmic contact with the strip-shaped region at the first principal surface; a first control electrode kept in ohmic contact with the second semiconductor layer on one side of the strip-shaped region in the direction of the width thereof and connected directly to a control terminal; a second control electrode kept in ohmic contact with the second semiconductor layer on the other side of the strip-shaped region in the direction of the width thereof and connected to the control terminal through the first control electrode and the resistance of the second semiconductor layer between the first control electrode and the second control electrode; a second main electrode kept in ohmic contact with a second principal surface of the semiconductor substrate; and means provided in the semiconductor substrate for accelerating the spatial biasing of a conductive region to the other side of the strip-shaped region in the direction of the width thereof when a current flowing across the semiconductor substrate is cut off, thereby enlarging the area of safety operation.

摘要翻译： 公开了一种栅极截止晶闸管和晶体管，每个晶体管包括：半导体衬底，其在一对主表面之间包括至少三个半导体层，相邻的半导体层之间的导电类型彼此不同，第一 一个半导体层由至少一个具有恒定宽度的条形区域形成，第二个半导体层与条形区域一起暴露于半导体衬底的第一主表面; 第一主电极与第一主表面处的带状区域欧姆接触; 第一控制电极在带状区域的宽度方向上与第二半导体层保持欧姆接触，并直接连接到控制端子; 第二控制电极在带状区域的另一侧沿其宽度方向与第二半导体层欧姆接触，并且通过第一控制电极连接到控制端子，并且第二控制电极与第二半导体层之间的电阻 所述第一控制电极和所述第二控制电极; 与所述半导体衬底的第二主表面保持欧姆接触的第二主电极; 以及设置在半导体衬底中的装置，用于当切断流过半导体衬底的电流时，在导电区域的宽度方向上将导电区域的空间偏置加速到带状区域的另一侧，从而扩大 安全运行。

公开(公告)号：US4646122A

公开(公告)日：1987-02-24

申请号：US585606

申请日：1984-03-02

申请人： Shin Kimura ,  Hiroshi Fukui ,  Hisao Amano ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Takahiro Nagano

发明人： Shin Kimura ,  Hiroshi Fukui ,  Hisao Amano ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Takahiro Nagano

IPC分类号： H01L29/423 ,  H01L29/74

CPC分类号： H01L29/42304 ,  H01L29/42308

摘要： A semiconductor device such as a transistor or gate turn-off thyristor provided with a control electrode for improving the current cut-off performance, is disclosed in which an emitter layer of a semiconductor substrate is formed of a plurality of strip-shaped regions, a base layer adjacent to the strip-shaped regions is exposed to one principal surface of the semiconductor substrate together with the strip-shaped regions, one main electrode is provided on each strip-shaped region, first and second control electrodes are provided on the base layer, on one and the other sides of each strip-shaped region viewed in the direction of the width thereof, respectively, the other main electrode is provided on the second principal surface of the semiconductor substrate, and a gate terminal is not connected to the first control electrode but connected to the second control electrode, in order to draw out carriers unequally by the first and second control electrodes at a turn-off period. At the initial stage of turn-off action, carriers are drawn out mainly by the second control terminal, and a conductive region contracts so as to be limited to the first control electrode side. At the final stage of turn-off action, carriers are drawn out considerably by the first control electrode, to complete the turn-off action.

摘要翻译： 公开了一种半导体器件，例如晶体管或栅极截止晶闸管，其设置有用于提高电流截止性能的控制电极，其中半导体衬底的发射极层由多个条形区域形成， 与带状区域相邻的基底层与条状区域一起暴露于半导体衬底的一个主表面，在每个条形区域上设置一个主电极，在基底层上设置第一和第二控制电极 在从宽度方向观察的每个条形区域的一侧和另一侧上分别设置在该半导体衬底的第二主表面上，另一个主电极没有连接到第一 控制电极，但是连接到第二控制电极，以便在关断周期期间由第一和第二控制电极不相等地引出载流子。 在关断动作的初始阶段，主要由第二控制端子引出载体，并且导电区域收缩以限于第一控制电极侧。 在关断动作的最后阶段，载体被第一控制电极显着地拉出，以完成关断动作。

公开(公告)号：US4500903A

公开(公告)日：1985-02-19

申请号：US384520

申请日：1982-06-03

申请人： Tsutomu Yatsuo ,  Takahiro Nagano ,  Saburo Oikawa ,  Akira Horie

发明人： Tsutomu Yatsuo ,  Takahiro Nagano ,  Saburo Oikawa ,  Akira Horie

IPC分类号： H01L29/08 ,  H01L29/74 ,  H01L29/744

CPC分类号： H01L29/0839 ,  H01L29/74 ,  H01L29/744

摘要： A gate turn-off thyristor in which a cathode-emitter layer is divided into a plurality of strip-like regions which are radially arrayed on a major surface of a semiconductor substrate in a coaxial multi-ring pattern including a plurality of coaxially arrayed rings. The cathode-emitter strips belonging to a given one of the rings have some radial length. The cathode-emitter strips belonging to the inner ring of a coaxial multi-ring pattern have a smaller radial length than that of the cathode-emitter strips constituting the outer ring. A cathode electrode is contacted to the cathode-emitter strip in low resistance ohmic contact. A gate electrode is ohmic contacted with a low resistance to a cathode-base layer located adjacent to the cathode-emitter strip so as to enclose it. An anode electrode is ohmic contacted with a low resistance to the anode-emitter layer. With the structure of GTO, turn-off operation of unit GTO's each including a cathode-emitter strip is equalized.

摘要翻译： 一种栅极截止晶闸管，其中阴极 - 发射极层被分成多个条形区域，其以包括多个同轴排列的环的同轴多环图案在半导体衬底的主表面上径向排列。 属于给定一个环的阴极 - 发射极条具有一些径向长度。 属于同轴多环形图案的内环的阴极发射极条的径向长度小于构成外环的阴极 - 发射极条的长度。 阴极电极以低电阻欧姆接触与阴极 - 发射极条接触。 栅电极与位于阴极 - 发射极条附近的阴极 - 基底层的低电阻欧姆接触，以便包围它。 阳极电极与对阳极 - 发射极层的低电阻欧姆接触。 利用GTO的结构，使包括阴极 - 发射极条的单元GTO的关断操作相等。

公开(公告)号：US5021855A

公开(公告)日：1991-06-04

申请号：US326455

申请日：1989-03-20

申请人： Saburo Oikawa ,  Tsutomu Yatsuo ,  Yukimasa Satou

发明人： Saburo Oikawa ,  Tsutomu Yatsuo ,  Yukimasa Satou

IPC分类号： H01L23/482 ,  H01L29/10 ,  H01L29/423 ,  H01L29/74 ,  H01L29/744

CPC分类号： H01L29/102 ,  H01L23/4824 ,  H01L29/42308 ,  H01L29/744 ,  H01L2924/0002

摘要： A gate turn-off thyristor includes a cathode emitter of n-type, a cathode base of p-type, an anode base of n-type and an anode emitter of p-type. A gate electrode is electrically connected to the p cathode base to enclose and define an elemental gate turn-off thyristor region. A plurality of n cathode emitter regions are arranged in proximity to each other in the elemental gate turn-off thyristor region. A highly-doped buried gate region is provided in the p cathode base with the substantially identical configuration for each n cathode emitter regions.

摘要翻译： 栅极截止晶闸管包括n型阴极发射极，p型阴极基极，n型阳极基极和p型阳极发射极。 栅电极与p阴极基极电连接以包围并限定元件栅极截止晶闸管区域。 多个n个阴极发射极区域在元件栅极截止晶闸管区域中彼此靠近地布置。 在p阴极基底中提供了高掺杂的掩埋栅极区域，对于每个n个阴极发射极区域具有基本相同的构造。

公开(公告)号：US4825270A

公开(公告)日：1989-04-25

申请号：US009479

申请日：1987-02-02

申请人： Yukimasa Satou ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Isamu Sanpei

发明人： Yukimasa Satou ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Isamu Sanpei

IPC分类号： H01L29/10 ,  H01L29/74 ,  H01L29/744

CPC分类号： H01L29/744 ,  H01L29/102 ,  H01L29/7428

摘要： The present invention relates to a buried gate type gate turn-off thyristor. A low-resistance layer which is buried in a cathode base layer has a multiplicity of small bores below a cathode emitter layer. The distance between each pair of adjacent small bores and the thickness of the low-resistance layer are each set so as to be smaller than the carrier diffusion length in an anode base layer. In an on-state, carries flow through the low-resistance layer, thereby allowing the low-resistance layer to become conductive, and thus lowering the on-state voltage. A reduction in the dimension of the small bores lowers the resistance of the low-resistance layer and hence lowers the gate drawing out resistance, so that the interrupting capacity is improved. When gate turn-off thyristor is arranged so as to have an amplifying gate structure, the distance between each pair of adjacent small bores in the amplifying auxiliary thyristor section is set so as to be greater than the carrier diffusion length in the anode base layer. In consequence, the on-state voltage in the auxiliary thyristor section is increased, so that the current selectively flows through the main thyristor section, and the auxiliary thyristor section automatically turns off. Accordingly, when the thyristor is to be turned off, it suffices to turn off the main thyristor section alone.

摘要翻译： 本发明涉及一种埋栅式栅极截止晶闸管。 埋在阴极基底层中的低电阻层在阴极发射极层下方具有多个小孔。 每对相邻的小孔之间的距离和低电阻层的厚度各自设定为小于阳极基底层中的载流子扩散长度。 在导通状态下，通过低电阻层流动，从而使低电阻层变得导电，从而降低导通电压。 小孔的尺寸的减小降低了低电阻层的电阻，从而降低了栅极拉出电阻，从而提高了中断能力。 当栅极截止晶闸管被布置成具有放大栅极结构时，放大辅助晶闸管部分中每对相邻的小孔之间的距离被设定为大于阳极基极层中的载流子扩散长度。 因此，辅助晶闸管部分中的导通电压增加，使得电流选择性地流过主晶闸管部分，并且辅助晶闸管部分自动关闭。 因此，当晶闸管关断时，只需断开主晶闸管部分即可。