Method for improving uniformity and reducing etch rate variation of etching polysilicon
    1.
    发明授权
    Method for improving uniformity and reducing etch rate variation of etching polysilicon 有权
    改善蚀刻多晶硅的均匀性和降低蚀刻速率变化的方法

    公开(公告)号:US06514378B1

    公开(公告)日:2003-02-04

    申请号:US09540549

    申请日:2000-03-31

    IPC分类号: H05H100

    CPC分类号: H01J37/32642 H01L21/32137

    摘要: An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine-containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.

    摘要翻译: 一种用于在用含氟气体清洁和/或等离子体蚀刻室的调节之后以最小等离子体蚀刻速率变化连续处理一系列半导体衬底的装置和方法。 该方法包括以下步骤:(a)将半导体衬底放置在等离子体蚀刻室中的衬底支撑件上,(b)在室中保持真空,(c)通过向腔室中提供蚀刻气体来蚀刻衬底的暴露表面 并且激励蚀刻气体以在腔室中形成等离子体,(d)从腔室移除衬底; 并且(e)通过重复步骤(ad)连续地蚀刻腔室中的附加衬底,蚀刻步骤通过使围绕衬底的碳化硅边缘环上的H和Br的复合速率以足以抵消速率 其中Br在基底上被消耗。 该方法可以使用纯HBr或HBr与其他气体的组合进行。

    VACUUM PLASMA PROCESSOR HAVING A CHAMBER WITH ELECTRODES AND A COIL FOR PLASMA EXCITATION AND METHOD OF OPERATING SAME
    2.
    发明申请
    VACUUM PLASMA PROCESSOR HAVING A CHAMBER WITH ELECTRODES AND A COIL FOR PLASMA EXCITATION AND METHOD OF OPERATING SAME 有权
    具有电极和用于等离子体激发的线圈的室的真空等离子体处理器及其操作方法

    公开(公告)号:US20070044915A1

    公开(公告)日:2007-03-01

    申请号:US11467449

    申请日:2006-08-25

    IPC分类号: C23F1/00 C23C16/00

    CPC分类号: H01J37/321 C23F4/00 G03F7/427

    摘要: A vacuum plasma processor includes a roof structure including a dielectric window carrying (1) a semiconductor plate having a high electric conductivity so it functions as an electrode, (2) a hollow coil and (3) at least one electric shield. The shield, coil and semiconductor plate are positioned to prevent substantial coil generated electric field components from being incident on the semiconductor plate. During a first interval the coil produces an RF electromagnetic field that results in a plasma that strips photoresist from a semiconductor wafer. During a second interval the semiconductor plate and another electrode produce an RF electromagnetic field that results in a plasma that etches electric layers, underlayers and photoresist layers from the wafer.

    摘要翻译: 真空等离子体处理器包括屋顶结构,该屋顶结构包括介电窗口,所述介电窗口承载(1)具有高导电性的半导体板,因此其用作电极,(2)空心线圈和(3)至少一个电屏蔽。 屏蔽线圈和半导体板被定位成防止实质的线圈产生的电场分量入射在半导体板上。 在第一间隔期间,线圈产生RF电磁场,其产生从半导体晶片剥离光致抗蚀剂的等离子体。 在第二间隔期间,半导体板和另一个电极产生RF电磁场,其产生等离子体,其从晶片蚀刻电层,底层和光致抗蚀剂层。

    Elevated stationary uniformity ring design
    3.
    发明授权
    Elevated stationary uniformity ring design 有权
    高稳定均匀环设计

    公开(公告)号:US06257168B1

    公开(公告)日:2001-07-10

    申请号:US09346564

    申请日:1999-06-30

    IPC分类号: C23C1600

    摘要: A plasma processing reactor for processing a semiconductor substrate is disclosed. The apparatus includes a chamber. Additionally, the chamber includes a bottom electrode that is configured for holding the substrate. The apparatus further includes a stationary uniformity ring that is configured to surround the periphery of the substrate. Furthermore, the stationary uniformity ring is coupled to a portion of the chamber and disposed above the bottom electrode in a spaced apart relationship to form a vertical space above the bottom electrode. Further, the vertical space is configured to provide room for ingress and egress of the substrate. Also, the stationary uniformity ring has a thickness that substantially reduces diffusion of a first species from outside the stationary uniformity ring toward an edge of the substrate.

    摘要翻译: 公开了一种用于处理半导体衬底的等离子体处理反应器。 该装置包括一个室。 此外,腔室包括被配置为保持衬底的底部电极。 该装置还包括固定均匀环,其被配置为围绕基底的周边。 此外,静止均匀环耦合到室的一部分并以间隔开的关系设置在底部电极上方,以在底部电极上方形成垂直空间。 此外,垂直空间被配置为提供衬底的进入和流出的空间。 此外,固定均匀性环具有基本上减少第一种类从固定均匀环外部朝向衬底边缘的扩散的厚度。

    Processing chamber with optical window cleaned using process gas
    4.
    发明授权
    Processing chamber with optical window cleaned using process gas 有权
    使用工艺气体清洁光学窗口的处理室

    公开(公告)号:US6052176A

    公开(公告)日:2000-04-18

    申请号:US282519

    申请日:1999-03-31

    CPC分类号: G01N21/15

    摘要: An apparatus is provided including a semiconductor processing chamber enclosed by a plurality of walls. Also included is a source of process gas that is required for processing a wafer within the processing chamber. Mounted on one of the walls of the processing chamber is a window. An inlet is positioned adjacent to the window and remains in communication with the processing chamber. The inlet is further coupled to the source of process gas to channel the process gas into the processing chamber for both preventing the deposition of byproducts on the window and further processing the wafer within the processing chamber. In another embodiment, a source of light, an analysis mechanism, and an optical transmission medium are provided. Such optical transmission medium is coupled between the source of light and the analysis mechanism and is further aligned with the window for directing light into the processing chamber and analyzing the wafer within the processing chamber. The window is configured to reflect the light received from the optical transmission medium at an angle so as to not interfere with light reflected from the wafer within the processing chamber.

    摘要翻译: 提供了包括由多个壁包围的半导体处理室的装置。 还包括处理处理室内的晶片所需的工艺气体源。 安装在处理室的一个壁上的是一个窗口。 入口邻近窗口定位并保持与处理室连通。 入口还进一步耦合到处理气体源,以将工艺气体引导到处理室中,以防止在窗口上沉积副产物,并进一步处理处理室内的晶片。 在另一个实施例中,提供光源,分析机构和光传输介质。 这种光传输介质耦合在光源和分析机构之间,并且进一步与窗口对准以将光引导到处理室中并分析处理室内的晶片。 窗口被配置为以一定角度反射从光传输介质接收的光,以便不干扰处理室内从晶片反射的光。

    Vacuum plasma processor having a chamber with electrodes and a coil for plasma excitation and method of operating same
    5.
    发明授权
    Vacuum plasma processor having a chamber with electrodes and a coil for plasma excitation and method of operating same 有权
    真空等离子体处理器具有具有电极的室和用于等离子体激发的线圈及其操作方法

    公开(公告)号:US07105102B2

    公开(公告)日:2006-09-12

    申请号:US10769878

    申请日:2004-02-03

    IPC分类号: H01L21/00

    CPC分类号: H01J37/321 C23F4/00 G03F7/427

    摘要: A vacuum plasma processor includes a roof structure including a dielectric window carrying (1) a semiconductor plate having a high electric conductivity so it functions as an electrode, (2) a hollow coil and (3) at least one electric shield. The shield, coil and semiconductor plate are positioned to prevent substantial coil generated electric field components from being incident on the semiconductor plate. During a first interval the coil produces an RF electromagnetic field that results in a plasma that strips photoresist from a semiconductor wafer. During a second interval the semiconductor plate and another electrode produce an RF electromagnetic field that results in a plasma that etches electric layers, underlayers and photoresist layers from the wafer.

    摘要翻译: 真空等离子体处理器包括屋顶结构,该屋顶结构包括介电窗口,所述介电窗口承载(1)具有高导电性的半导体板,因此其用作电极,(2)空心线圈和(3)至少一个电屏蔽。 屏蔽线圈和半导体板被定位成防止实质的线圈产生的电场分量入射在半导体板上。 在第一间隔期间,线圈产生RF电磁场,其产生从半导体晶片剥离光致抗蚀剂的等离子体。 在第二间隔期间,半导体板和另一个电极产生RF电磁场,其产生等离子体,其从晶片蚀刻电层,底层和光致抗蚀剂层。

    Methods for detecting the endpoint of a photoresist stripping process
    7.
    发明授权
    Methods for detecting the endpoint of a photoresist stripping process 失效
    检测光刻胶剥离工艺终点的方法

    公开(公告)号:US07077971B2

    公开(公告)日:2006-07-18

    申请号:US10163286

    申请日:2002-06-04

    摘要: Methods for detecting the endpoint of a photoresist stripping process provide O for reaction with the photoresist for a wafer to be stripped of photoresist. NO is also supplied for reaction with O not reacted with the photoresist. After substantially all the photoresist is stripped from the wafer, the rate of a reaction of O and NO to form NO2 increases, which increases the intensity of emitted light. An operation of detecting this increase in light intensity signals the endpoint of the photoresist stripping process.

    摘要翻译: 用于检测光致抗蚀剂剥离工艺的端点的方法提供O以与用于待剥离光致抗蚀剂的晶片的光致抗蚀剂反应。 NO也用于与未与光致抗蚀剂反应的O反应。 在从晶片剥离基本上所有的光致抗蚀剂之后,O和NO反应形成NO 2 2的反应速率增加,这增加了发射光的强度。 检测这种光强度增加的操作指示光致抗蚀剂剥离工艺的终点。

    Vacuum plasma processor having a chamber with electrodes and a coil for plasma excitation and method of operating same
    10.
    发明授权
    Vacuum plasma processor having a chamber with electrodes and a coil for plasma excitation and method of operating same 有权
    真空等离子体处理器具有具有电极的室和用于等离子体激发的线圈及其操作方法

    公开(公告)号:US08114246B2

    公开(公告)日:2012-02-14

    申请号:US11467449

    申请日:2006-08-25

    IPC分类号: H01L21/306 C23C16/00

    CPC分类号: H01J37/321 C23F4/00 G03F7/427

    摘要: A vacuum plasma processor includes a roof structure including a dielectric window carrying (1) a semiconductor plate having a high electric conductivity so it functions as an electrode, (2) a hollow coil and (3) at least one electric shield. The shield, coil and semiconductor plate are positioned to prevent substantial coil generated electric field components from being incident on the semiconductor plate. During a first interval the coil produces an RF electromagnetic field that results in a plasma that strips photoresist from a semiconductor wafer. During a second interval the semiconductor plate and another electrode produce an RF electromagnetic field that results in a plasma that etches electric layers, underlayers and photoresist layers from the wafer.

    摘要翻译: 真空等离子体处理器包括屋顶结构,该屋顶结构包括介电窗口,所述介电窗口承载(1)具有高导电性的半导体板,因此其用作电极,(2)空心线圈和(3)至少一个电屏蔽。 屏蔽线圈和半导体板被定位成防止实质的线圈产生的电场分量入射在半导体板上。 在第一间隔期间,线圈产生RF电磁场,其产生从半导体晶片剥离光致抗蚀剂的等离子体。 在第二间隔期间,半导体板和另一个电极产生RF电磁场,其产生等离子体,其从晶片蚀刻电层,底层和光致抗蚀剂层。