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    Method and apparatus for real time metal film thickness measurement
    4.
    发明授权
    Method and apparatus for real time metal film thickness measurement 有权
    用于实时金属膜厚度测量的方法和装置

    公开(公告)号：US07309618B2

    公开(公告)日：2007-12-18

    申请号：US10463525

    申请日：2003-06-18

    Applicant: Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas J. Bright

    Inventor： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas J. Bright

    IPC: H01L21/00

    CPC classification number: B24B37/013 ,  B24B1/005 ,  B24B49/105 ,  B24B57/02 ,  H01L21/67253

    Abstract: A semiconductor processing system is provided. The semiconductor processing system includes a first sensor configured to isolate and measure a film thickness signal portion for a wafer having a film disposed over a substrate. A second sensor is configured to detect a film thickness dependent signal in situ during processing, i.e. under real process conditions and in real time. A controller configured to receive a signal from the first sensor and a signal from the second sensor. The controller is capable of determining a calibration coefficient from data represented by the signal from the first sensor. The controller is capable of applying the calibration coefficient to the data associated with the second sensor, wherein the calibration coefficient substantially eliminates inaccuracies introduced to the film thickness dependent signal from the substrate. A method for calibrating an eddy current sensor is also provided.

    Abstract translation: 提供半导体处理系统。 半导体处理系统包括：第一传感器，被配置为隔离和测量具有设置在基板上的膜的晶片的膜厚度信号部分。 第二传感器被配置为在处理期间，即在实际工艺条件下和实时地在原位检测膜厚依赖信号。 控制器，被配置为从第一传感器接收信号和来自第二传感器的信号。 控制器能够根据来自第一传感器的信号表示的数据确定校准系数。 控制器能够将校准系数应用于与第二传感器相关联的数据，其中校准系数基本上消除了从衬底引入与膜厚度相关的信号的不准确性。 还提供了用于校准涡流传感器的方法。

    Vacuum plasma processor having a chamber with electrodes and a coil for plasma excitation and method of operating same
    5.
    发明授权
    Vacuum plasma processor having a chamber with electrodes and a coil for plasma excitation and method of operating same 有权
    真空等离子体处理器具有具有电极的室和用于等离子体激发的线圈及其操作方法

    公开(公告)号：US07105102B2

    公开(公告)日：2006-09-12

    申请号：US10769878

    申请日：2004-02-03

    Applicant: Tuqiang Ni ,  Wenli Collison ,  David Hemker ,  Lumin Li

    Inventor： Tuqiang Ni ,  Wenli Collison ,  David Hemker ,  Lumin Li

    IPC: H01L21/00

    CPC classification number: H01J37/321 ,  C23F4/00 ,  G03F7/427

    Abstract: A vacuum plasma processor includes a roof structure including a dielectric window carrying (1) a semiconductor plate having a high electric conductivity so it functions as an electrode, (2) a hollow coil and (3) at least one electric shield. The shield, coil and semiconductor plate are positioned to prevent substantial coil generated electric field components from being incident on the semiconductor plate. During a first interval the coil produces an RF electromagnetic field that results in a plasma that strips photoresist from a semiconductor wafer. During a second interval the semiconductor plate and another electrode produce an RF electromagnetic field that results in a plasma that etches electric layers, underlayers and photoresist layers from the wafer.

    Abstract translation: 真空等离子体处理器包括屋顶结构，该屋顶结构包括介电窗口，所述介电窗口承载（1）具有高导电性的半导体板，因此其用作电极，（2）空心线圈和（3）至少一个电屏蔽。 屏蔽线圈和半导体板被定位成防止实质的线圈产生的电场分量入射在半导体板上。 在第一间隔期间，线圈产生RF电磁场，其产生从半导体晶片剥离光致抗蚀剂的等离子体。 在第二间隔期间，半导体板和另一个电极产生RF电磁场，其产生等离子体，其从晶片蚀刻电层，底层和光致抗蚀剂层。

    Method and apparatus for wafer mechanical stress monitoring and wafer thermal stress monitoring
    6.
    发明申请
    Method and apparatus for wafer mechanical stress monitoring and wafer thermal stress monitoring 审中-公开
    用于晶片机械应力监测和晶片热应力监测的方法和装置

    公开(公告)号：US20050066739A1

    公开(公告)日：2005-03-31

    申请号：US10671978

    申请日：2003-09-26

    Applicant: Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

    Inventor： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

    IPC: B24B37/04 ,  B24B49/14 ,  B24B49/16 ,  G01L1/00

    CPC classification number: B24B37/015 ,  B24B49/16

    Abstract: A chemical mechanical planarization (CMP) system is provided. The CMP system includes a wafer carrier configured to support a wafer during a planarization process, the wafer carrier including a sensor configured to detect a signal indicating a stress being experienced by the wafer during planarization. A computing device in communication with the sensor is included. The computing device is configured to translate the signal to generate a stress map for analysis. A stress relief device responsive to a signal received from the computing device is included. The stress relief device is configured to relieve the stress being experienced by the wafer.

    Abstract translation: 提供化学机械平面化（CMP）系统。 CMP系统包括被配置为在平坦化处理期间支撑晶片的晶片载体，晶片载体包括被配置成在平坦化期间检测指示由晶片经历的应力的信号的传感器。 包括与传感器通信的计算设备。 计算设备被配置为平移信号以产生用于分析的应力图。 包括响应于从计算设备接收的信号的应力消除装置。 应力释放装置被构造成减轻晶片经历的应力。

    Complementary sensors metrological process and method and apparatus for implementing the same
    7.
    发明申请
    Complementary sensors metrological process and method and apparatus for implementing the same 失效
    互补传感器计量过程及其实现方法和装置

    公开(公告)号：US20050007107A1

    公开(公告)日：2005-01-13

    申请号：US10914017

    申请日：2004-08-05

    Applicant: Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

    Inventor： Yehiel Gotkis ,  Rodney Kistler ,  Aleksander Owczarz ,  David Hemker ,  Nicolas Bright

    IPC: H01L21/66 ,  G01B7/06

    CPC classification number: H01L22/26

    Abstract: A method for detecting a thickness of a layer of a wafer to be processed is provided. The method includes defining a plurality of sensors configured to create a set of complementary sensors proximate the wafer. Further included in the method is distributing the plurality of sensors along a particular radius of the wafer such that each sensor of the plurality of sensors is out of phase with an adjacent sensor by a same angle. The method also includes measuring signals generated by the plurality of sensors. Further included is averaging the signals generated by the plurality of sensors so as to generate a combination signal. The averaging is configured to remove noise from the combination signal such that the combination signal is capable of being correlated to identify the thickness of the layer.

    Abstract translation: 提供了一种用于检测待处理晶片层的厚度的方法。 该方法包括限定配置成在晶片附近产生一组互补传感器的多个传感器。 该方法中还包括沿着晶片的特定半径分布多个传感器，使得多个传感器中的每个传感器与相邻的传感器相异相同角度。 该方法还包括测量由多个传感器产生的信号。 还包括对由多个传感器产生的信号进行平均以产生组合信号。 平均化被配置为从组合信号去除噪声，使得组合信号能够被相关联以识别层的厚度。

    System, method and apparatus for improved local dual-damascene planarization
    8.
    发明授权
    System, method and apparatus for improved local dual-damascene planarization 失效
    用于改进局部双镶嵌平面化的系统，方法和装置

    公开(公告)号：US06821899B2

    公开(公告)日：2004-11-23

    申请号：US10390520

    申请日：2003-03-14

    Applicant: Shrikant P. Lohokare ,  Andrew D. Bailey, III ,  David Hemker ,  Joel M. Cook

    Inventor： Shrikant P. Lohokare ,  Andrew D. Bailey, III ,  David Hemker ,  Joel M. Cook

    IPC: H01L21311

    CPC classification number: H01L21/32135 ,  H01L21/32115 ,  H01L21/32136 ,  H01L21/7684

    Abstract: A system and method for planarizing a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple of features in the pattern. The conductive interconnect material having an overburden portion. The overburden portion includes a localized non-uniformity. An additional layer is formed on the overburden portion. The additional layer and the overburden portion are planarized. The planarizing process substantially entirely removes the additional layer.

    Abstract translation: 用于平坦化图案化半导体衬底的系统和方法包括接收图案化的半导体衬底。 图案化半导体衬底具有填充图案中的多个特征的导电互连材料。 导电互连材料具有覆盖层部分。 覆盖层部分包括局部不均匀性。 在覆盖层部分上形成附加层。 附加层和覆盖层部分被平坦化。 平坦化工艺基本上完全除去附加层。

    Materials and gas chemistries for processing systems
    9.
    发明申请
    Materials and gas chemistries for processing systems 审中-公开
    材料和气体化学处理系统

    公开(公告)号：US20060011583A1

    公开(公告)日：2006-01-19

    申请号：US11230689

    申请日：2005-09-19

    Applicant: Andrew Bailey ,  Alan Schoepp ,  David Hemker ,  Mark Wilcoxson

    Inventor： Andrew Bailey ,  Alan Schoepp ,  David Hemker ,  Mark Wilcoxson

    IPC: G01L21/30 ,  B44C1/22 ,  G01R31/00 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00

    CPC classification number: H01J37/32467 ,  B05D1/62 ,  H01J37/32495

    Abstract: A plasma processing system for processing a substrate, is disclosed. The plasma processing system includes a single chamber, substantially azimuthally symmetric plasma processing chamber within which a plasma is both ignited and sustained for the processing. The plasma processing chamber has no separate plasma generation chamber. The plasma processing chamber has an upper end and a lower end. The plasma processing chamber includes a material that does not substantially react with the reactive gas chemistries that are delivered into the plasma processing chamber. In addition, the reactant gases that are flown into the plasma processing chamber are disclosed.

    Abstract translation: 公开了一种用于处理衬底的等离子体处理系统。 等离子体处理系统包括单室，基本方位对称的等离子体处理室，其中等离子体都被点燃并持续进行处理。 等离子体处理室没有单独的等离子体产生室。 等离子体处理室具有上端和下端。 等离子体处理室包括与输送到等离子体处理室中的反应性气体化学物质基本上不反应的材料。 此外，公开了流入等离子体处理室的反应气体。

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