公开(公告)号：US20170004995A1

公开(公告)日：2017-01-05

申请号：US15125726

申请日：2016-02-24

Applicant: ULVAC, INC.

Inventor： Keiichiro Asakawa ,  Junichi Hamaguchi ,  Kazuhiro Sonoda ,  Yukinobu Numata ,  Yutaka Kokaze

IPC: H01L21/768 ,  C23C14/18 ,  C23C14/34 ,  H01J37/32 ,  H01J37/34

CPC classification number: H01L21/76867 ,  C23C14/046 ,  C23C14/165 ,  C23C14/185 ,  C23C14/3407 ,  C23C14/5826 ,  H01J37/32036 ,  H01J37/32366 ,  H01J37/32403 ,  H01J37/32477 ,  H01J37/32513 ,  H01J37/32623 ,  H01J37/3408 ,  H01J37/3426 ,  H01J37/3476 ,  H01J2237/334 ,  H01L21/2855 ,  H01L21/76843 ,  H01L21/76865

Abstract: Provided is a film forming apparatus in which a thin film can be formed with a good coverage on the inner surface of a hole with high aspect ratio by preventing the negative electric charges from getting concentrated on the substrate edge portion at the time of etching processing. The film forming apparatus is provided with: a vacuum chamber in which a target is disposed; a stage for holding a substrate inside the vacuum chamber; a first electric power for applying predetermined electric power to the target; and a second electric power for applying AC power to the stage. The film forming apparatus performs: film forming processing in which the target is sputtered by applying electric power to the target by the first electric power; and etching processing in which a thin film formed on the substrate is etched by applying AC power to the stage by the second electric power.

Abstract translation: 提供一种成膜装置，其中通过防止在蚀刻处理时负电荷集中在基板边缘部分上，可以在具有高纵横比的孔的内表面上形成具有良好覆盖的薄膜。 成膜装置设有：设置有靶的真空室; 在真空室内保持基板的台阶; 用于向所述目标施加预定电力的第一电力; 以及用于向舞台施加AC电力的第二电力。 成膜装置执行：通过利用第一电​​力向靶子施加电力来溅射目标物的成膜处理; 以及蚀刻处理，其中通过利用第二电力向平台施加AC电力来蚀刻形成在基板上的薄膜。

公开(公告)号：US09337092B2

公开(公告)日：2016-05-10

申请号：US14347779

申请日：2012-09-20

Applicant: ULVAC, INC.

Inventor： Junichi Hamaguchi ,  Shuji Kodaira ,  Yuta Sakamoto ,  Akifumi Sano ,  Koukichi Kamada ,  Yoshiyuki Kadokura ,  Joji Hiroishi ,  Yukinobu Numata ,  Koji Suzuki

IPC: H01L21/4763 ,  H01L21/768 ,  H01L23/532 ,  H01L21/285 ,  C23C14/02 ,  C23C14/04 ,  C23C14/16 ,  C23C14/14 ,  C23C14/34

CPC classification number: H01L21/76882 ,  C23C14/024 ,  C23C14/046 ,  C23C14/14 ,  C23C14/16 ,  C23C14/34 ,  H01L21/2855 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76871 ,  H01L21/76879 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes a groove portion formation process of forming a groove portion in a base body, a bather layer formation process of forming a barrier layer covering at least the inner wall surface of the groove portion, a seed layer formation process of forming a seed layer covering the barrier layer, and a seed layer melting process of causing the seed layer to be melted using the reflow method. The seed layer is made of Cu.

Abstract translation: 半导体器件的制造方法包括：在基体中形成槽部的槽部形成工序，形成至少覆盖槽部的内壁面的阻挡层的沐浴层形成工序，种子层形成工序 形成覆盖阻挡层的种子层，以及使用回流法使种子层熔融的晶种层熔融法。 种子层由Cu制成。

公开(公告)号：US08883632B2

公开(公告)日：2014-11-11

申请号：US13737875

申请日：2013-01-09

Applicant: ULVAC, Inc.

Inventor： Youhei Endo ,  Shuji Kodaira ,  Yuta Sakamoto ,  Junichi Hamaguchi ,  Yohei Uchida ,  Yasushi Higuchi ,  Shinya Nakamura ,  Kazuyoshi Hashimoto ,  Yoshihiro Ikeda ,  Hiroaki Iwasawa

IPC: H01L21/768

CPC classification number: H01L21/76882 ,  H01L21/76883

Abstract: A manufacturing method of a device including: a first process in which a barrier film is formed on a substrate with a concave portion provided on one surface thereof so as to cover an inner wall surface of the concave portion; a second process in which a conductive film is formed so as to cover the barrier film; and a third process in which the conductive film is melted by a reflow method, wherein the method includes a process α between the second process and the third process, in which the substrate with the barrier film and the conductive film laminated thereon in this order is exposed to an atmosphere under a pressure A for a time period B, and wherein in the process α, control is carried out such that a product of the pressure A and the time period B is not greater than 6×10−4 [Pa·s].

Abstract translation: 一种器件的制造方法，包括：第一工序，其中在基板上形成阻挡膜，所述基板的一个表面上设有凹部以覆盖所述凹部的内壁面; 形成导电膜以覆盖阻挡膜的第二工序; 以及其中导电膜通过回流方法熔化的第三工艺，其中该方法包括第二工艺和第三工艺之间的工艺α，其中具有阻挡膜的衬底和其上的导电膜依次层压在其上 在压力A下暴露于气氛一段时间B，并且其中在过程α中，进行控制，使得压力A和时间段B的乘积不大于6×10-4 [Pa· s]。

公开(公告)号：US20150221552A1

公开(公告)日：2015-08-06

申请号：US14347779

申请日：2012-09-20

Applicant: ULVAC, Inc.

Inventor： Junichi Hamaguchi ,  Shuji Kodaira ,  Yuta Sakamoto ,  Akifumi Sano ,  Koukichi Kamada ,  Yoshiyuki Kadokura ,  Joji Hiroishi ,  Yukinobu Numata ,  Koji Suzuki

IPC: H01L21/768 ,  C23C14/34 ,  C23C14/14 ,  H01L23/532 ,  C23C14/04

CPC classification number: H01L21/76882 ,  C23C14/024 ,  C23C14/046 ,  C23C14/14 ,  C23C14/16 ,  C23C14/34 ,  H01L21/2855 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76871 ,  H01L21/76879 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes a groove portion formation process of forming a groove portion in a base body, a bather layer formation process of forming a barrier layer covering at least the inner wall surface of the groove portion, a seed layer formation process of forming a seed layer covering the barrier layer, and a seed layer melting process of causing the seed layer to be melted using the reflow method. The seed layer is made of Cu.

Abstract translation: 半导体器件的制造方法包括：在基体中形成槽部的槽部形成工序，形成至少覆盖槽部的内壁面的阻挡层的沐浴层形成工序，种子层形成工序 形成覆盖阻挡层的种子层，以及使用回流法使种子层熔融的种子层熔融法。 种子层由Cu制成。