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公开(公告)号:US11770986B2
公开(公告)日:2023-09-26
申请号:US17302059
申请日:2021-04-22
发明人: John Rozen , Marinus Hopstaken , Yohei Ogawa , Masanobu Hatanaka , Takashi Ando , Kazuhiro Honda
CPC分类号: H10N70/841 , H10B63/82 , H10N70/021 , H10N70/883 , H10N70/8845
摘要: A resistive switching memory stack, comprised of a bottom electrode, an oxide layer located on the bottom electrode; and a top electrode located on the oxide layer. The top electrode is comprised of a first layer, an intermediate layer located directly on the first layer, and a top layer located on top of the intermediate layer. Wherein the intermediate layer is comprised of a doped carbide active layer.
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公开(公告)号:US10529815B2
公开(公告)日:2020-01-07
申请号:US15799231
申请日:2017-10-31
发明人: Takashi Ando , Ruqiang Bao , Masanobu Hatanaka , Vijay Narayanan , Yohei Ogawa , John Rozen
IPC分类号: H01L29/43 , H01L29/49 , H01L27/092 , H01L21/285 , H01L21/28 , H01L21/8238 , H01L29/66 , B82Y10/00 , H01L29/40 , H01L29/423 , H01L29/78 , H01L29/775 , H01L29/06
摘要: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 Å. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.
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公开(公告)号:US11195929B2
公开(公告)日:2021-12-07
申请号:US16668473
申请日:2019-10-30
发明人: Takashi Ando , Ruqiang Bao , Masanobu Hatanaka , Vijay Narayanan , Yohei Ogawa , John Rozen
IPC分类号: H01L29/49 , H01L29/43 , H01L27/092 , H01L21/285 , H01L21/28 , H01L21/8238 , H01L29/423 , H01L29/66 , B82Y10/00 , H01L29/40 , H01L29/78 , H01L29/06 , H01L29/775
摘要: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 Å. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.
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公开(公告)号:US11189482B2
公开(公告)日:2021-11-30
申请号:US16347904
申请日:2018-05-11
发明人: Masanobu Hatanaka , Yohei Ogawa , Keon-chang Lee , Nobuyuki Kato , Takakazu Yamada , John Rozen
IPC分类号: C23C16/32 , H01L21/02 , C23C16/34 , C23C16/455
摘要: A thin film formation method includes setting a film formation subject to 200° C. or higher. A first step includes changing a first state, in which a film formation material and a carrier gas are supplied so that the film formation material collects on the film formation subject, to a second state, in which the film formation material is omitted. A second step includes changing a third state, in which a hydrogen gas and a carrier gas are supplied to reduce the film formation material, to a fourth state, in which the hydrogen gas is omitted. The film formation material is any one of Al(CxH2x+1)3, Al(CxH2x+1)2H, and Al(CxH2x+1)2Cl. The first step and the second step are alternately repeated to form an aluminum carbide film on the film formation subject such that a content rate of aluminum atoms is 20 atomic percent or greater.
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公开(公告)号:US09984940B1
公开(公告)日:2018-05-29
申请号:US15418916
申请日:2017-01-30
发明人: Jack O. Chu , Stephen M. Gates , Masanobu Hatanaka , Vijay Narayanan , Deborah A. Neumayer , Yohei Ogawa , John Rozen
CPC分类号: H01L21/845 , H01L21/02178 , H01L21/0228 , H01L21/02304 , H01L21/28008 , H01L21/28158 , H01L21/28255 , H01L21/28264 , H01L23/298 , H01L23/3171 , H01L23/3192 , H01L27/1211 , H01L29/785
摘要: A scaled dielectric stack interlayer, compatible with subsequent high temperature processing with good electrical transport & reliability properties is provided. A method for forming a conformal aSi:H passivation layer on a semiconductor device is described. A patterned semiconductor wafer is placed in in a process chamber with a first layer formed thereon and a second layer formed thereon, the first layer and the second layer being two different materials Next, a SixH(2x+2) based deposition up to a temperature of 400 degrees Celsius is used on the first layer and the second layer thereby forming a conformal aSi:H passivating layer is formed at a higher rate of deposition on the first layer selectively and a lower rate of deposit on the second layer.
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公开(公告)号:US20220344586A1
公开(公告)日:2022-10-27
申请号:US17302059
申请日:2021-04-22
发明人: John Rozen , Marinus Hopstaken , Yohei Ogawa , Masanobu Hatanaka , Takashi Ando , Kazuhiro Honda
摘要: A resistive switching memory stack, comprised of a bottom electrode, an oxide layer located on the bottom electrode; and a top electrode located on the oxide layer. The top electrode is comprised of a first layer, an intermediate layer located directly on the first layer, and a top layer located on top of the intermediate layer. Wherein the intermediate layer is comprised of a doped carbide active layer.
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公开(公告)号:US20200066859A1
公开(公告)日:2020-02-27
申请号:US16668473
申请日:2019-10-30
发明人: Takashi Ando , Ruqiang Bao , Masanobu Hatanaka , Vijay Narayanan , Yohei Ogawa , John Rozen
IPC分类号: H01L29/43 , H01L29/49 , H01L27/092 , H01L21/285 , H01L21/28 , H01L21/8238 , H01L29/423 , H01L29/66 , B82Y10/00 , H01L29/40
摘要: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 Å. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.
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公开(公告)号:US20190131418A1
公开(公告)日:2019-05-02
申请号:US15799231
申请日:2017-10-31
发明人: Takashi Ando , Ruqiang Bao , Masanobu Hatanaka , Vijay Narayanan , Yohei Ogawa , John Rozen
IPC分类号: H01L29/43 , H01L29/49 , H01L21/28 , H01L21/285 , H01L27/092
摘要: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 Å. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.
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