GRAPHENE TRANSISTOR WITH A SUBLITHOGRAPHIC CHANNEL WIDTH
    5.
    发明申请
    GRAPHENE TRANSISTOR WITH A SUBLITHOGRAPHIC CHANNEL WIDTH 有权
    具有亚光谱通道宽度的石墨晶体管

    公开(公告)号:US20150236147A1

    公开(公告)日:2015-08-20

    申请号:US14181832

    申请日:2014-02-17

    摘要: Silicon-carbon alloy structures can be formed as inverted U-shaped structures around semiconductor fins by a selective epitaxy process. A planarization dielectric layer is formed to fill gaps among the silicon-carbon alloy structures. After planarization, remaining vertical portions of the silicon-carbon alloy structures constitute silicon-carbon alloy fins, which can have sublithographic widths. The semiconductor fins may be replaced with replacement dielectric material fins. In one embodiment, employing a patterned mask layer, sidewalls of the silicon-carbon alloy fins can be removed around end portions of each silicon-carbon alloy fin. An anneal is performed to covert surface portions of the silicon-carbon alloy fins into graphene layers. In one embodiment, each graphene layer can include only a horizontal portion in a channel region, and include a horizontal portion and sidewall portions in source and drain regions. If a patterned mask layer is not employed, each graphene layer can include only a horizontal portion.

    摘要翻译: 硅碳合金结构可以通过选择性外延工艺形成为围绕半导体翅片的倒U形结构。 形成平坦化介电层以填充硅 - 碳合金结构之间的间隙。 在平坦化之后,硅 - 碳合金结构的剩余垂直部分构成可以具有亚光刻宽度的硅碳合金翅片。 半导体翅片可以用替换的介质材料翅片代替。 在一个实施例中,采用图案化掩模层,可以在每个硅 - 碳合金散热片的端部周围除去硅 - 碳合金散热片的侧壁。 执行退火以将硅碳合金翅片的表面部分隐藏成石墨烯层。 在一个实施例中,每个石墨烯层可以仅包括沟道区域中的水平部分,并且在源极和漏极区域中包括水平部分和侧壁部分。 如果不使用图案化掩模层,则每个石墨烯层可以仅包括水平部分。

    Integrated circuit tamper detection and response
    8.
    发明授权
    Integrated circuit tamper detection and response 有权
    集成电路篡改检测和响应

    公开(公告)号:US08861728B2

    公开(公告)日:2014-10-14

    申请号:US13654078

    申请日:2012-10-17

    摘要: The present disclosure relates to integrated circuits having tamper detection and response devices and methods for manufacturing such integrated circuits. One integrated circuit having a tamper detection and response device includes at least one photovoltaic cell and at least one memory cell coupled to the at least one photovoltaic cell. When the at least one photovoltaic cell is exposed to radiation, the at least one photovoltaic cell generates a current that causes an alteration to a memory state of the at least one memory cell. Another integrated circuit having a tamper detection and response device includes at least one photovoltaic cell and a reactive material coupled to the at least one photovoltaic cell, wherein a current from the at least one photovoltaic cell triggers an exothermic reaction in the reactive material.

    摘要翻译: 本公开涉及具有篡改检测和响应装置的集成电路以及用于制造这种集成电路的方法。 具有篡改检测和响应装置的一个集成电路包括至少一个光伏电池和耦合到该至少一个光伏电池的至少一个存储单元。 当所述至少一个光伏电池暴露于辐射时,所述至少一个光伏电池产生导致所述至少一个存储器单元的存储器状态改变的电流。 具有篡改检测和响应装置的另一集成电路包括至少一个光伏电池和耦合到所述至少一个光伏电池的反应材料,其中来自所述至少一个光伏电池的电流触发所述反应性材料中的放热反应。