公开(公告)号：US20180074788A1

公开(公告)日：2018-03-15

申请号：US15563473

申请日：2015-12-29

Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Kyung Rok Kim ,  Sun Hae Shin ,  E San Jang ,  Jae Won Jeong

IPC: G06F7/48 ,  H03K19/094 ,  H03K19/003 ,  H03K19/00

CPC classification number: G06F7/48 ,  G06F7/49 ,  H03K19/0016 ,  H03K19/00315 ,  H03K19/00361 ,  H03K19/09429 ,  H03K19/0948 ,  H03K19/20

Abstract: A ternary logic circuit according to the present invention includes a pull-up device (100) and a pull-down device (200) connected in series between power voltage sources (VDD and GND), and an input voltage (VIN) source and output voltage (VOUT) source. When both the pull-up device (100) and the pull-down device (200) are turned off by an input voltage (VIN), both the pull-up device (100) and the pull-down device (200) operate as simple resistors which are affected only by an output voltage (VOUT) and form a ternary digit (“1” state) through voltage division. When only one of the pull-up device (100) or the pull-down device (200) is turned on to allow a current to flow therethrough, VDD (“2” state) or GND (“0” state) is output as the output voltage (VOUT). Accordingly, a bit density can be remarkably increased.

公开(公告)号：US11784249B2

公开(公告)日：2023-10-10

申请号：US17636666

申请日：2021-09-07

Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Kyung Rok Kim ,  E San Jang ,  Min Woo Ryu ,  Sang Hyo Ahn

IPC: H01L29/78 ,  H01L23/66 ,  H01L29/06 ,  H01L29/08

CPC classification number: H01L29/7831 ,  H01L23/66 ,  H01L29/0607 ,  H01L29/0847

Abstract: An antenna device according to an example embodiment includes a silicon substrate of first type doping, at least two first doped regions formed by second type doping different from the first type doping, a second doped region formed by the second type doping outside a channel region surrounding the at least two first doped regions, and at least two gates disposed on a dielectric layer. In the antenna device, a resonant frequency is adjusted according to an external voltage individually applied to the at least two gates, and polarization information of a terahertz (THz) light source is obtained based on a pattern and an amount of an electric field measured at the at least two gates.

公开(公告)号：US20220271160A1

公开(公告)日：2022-08-25

申请号：US17636666

申请日：2021-09-07

Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Kyung Rok Kim ,  E San Jang ,  Min Woo Ryu ,  Sang Hyo Ahn

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L23/66

Abstract: An antenna device according to an example embodiment includes a silicon substrate of first type doping, at least two first doped regions formed by second type doping different from the first type doping, a second doped region formed by the second type doping outside a channel region surrounding the at least two first doped regions, and at least two gates disposed on a dielectric layer. In the antenna device, a resonant frequency is adjusted according to an external voltage individually applied to the at least two gates, and polarization information of a terahertz (THz) light source is obtained based on a pattern and an amount of an electric field measured at the at least two gates.

公开(公告)号：US20220416074A1

公开(公告)日：2022-12-29

申请号：US17675628

申请日：2022-02-18

Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Kyung Rok Kim ,  Min Woo Ryu ,  E San Jang ,  Ramesh Patel ,  Sang Hyo Ahn

IPC: H01L29/78 ,  H01Q1/22 ,  H01Q7/00 ,  H01L29/423 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L29/66

Abstract: A field-effect transistor for terahertz wave detection using a gate as an antenna includes a silicon substrate including a source and a drain formed outside a channel region surrounding the source, and a gate formed to be spaced apart from the silicon substrate and correspond to the channel region, on a dielectric layer formed on a surface of the silicon substrate, in which the drain has a width determined based on a first performance parameter associated with a terahertz wave reception rate of the field-effect transistor and the channel region has a width determined based on a second performance parameter associated with detection of a terahertz wave to be received by the field-effect transistor.

公开(公告)号：US10133550B2

公开(公告)日：2018-11-20

申请号：US15563473

申请日：2015-12-29

Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Kyung Rok Kim ,  Sun Hae Shin ,  E San Jang ,  Jae Won Jeong

IPC: H03K3/29 ,  G06F7/48 ,  H03K19/0948 ,  H03K19/20 ,  H03K19/00 ,  H03K19/003 ,  H03K19/094 ,  G06F7/49

Abstract: A ternary logic circuit according to the present invention includes a pull-up device (100) and a pull-down device (200) connected in series between power voltage sources (VDD and GND), and an input voltage (VIN) source and output voltage (VOUT) source. When both the pull-up device (100) and the pull-down device (200) are turned off by an input voltage (VIN), both the pull-up device (100) and the pull-down device (200) operate as simple resistors which are affected only by an output voltage (VOUT) and form a ternary digit (“1” state) through voltage division. When only one of the pull-up device (100) or the pull-down device (200) is turned on to allow a current to flow therethrough, VDD (“2” state) or GND (“0” state) is output as the output voltage (VOUT). Accordingly, a bit density can be remarkably increased.