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    METAL GATE STRUCTURE
    1.
    发明申请
    METAL GATE STRUCTURE 有权
    金属门结构

    公开(公告)号：US20160027892A1

    公开(公告)日：2016-01-28

    申请号：US14852624

    申请日：2015-09-13

    Applicant: United Microelectronics Corp.

    Inventor： Ching-Ling Lin ,  Chih-Sen Huang ,  Shih-Fang Tzou ,  Chien-Ting Lin ,  Yi-Wei Chen ,  Shi-Xiong Lin ,  Chun-Lung Chen ,  Kun-Yuan Liao ,  Feng-Yi Chang ,  Hsiao-Pang Chou ,  Chia-Lin Lu

    IPC: H01L29/49 ,  H01L29/423 ,  H01L27/088

    CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L21/823456 ,  H01L21/82385 ,  H01L27/088 ,  H01L29/4232 ,  H01L29/517 ,  H01L29/66545

    Abstract: The metal gate structure includes at least a substrate, a dielectric layer, first and second trenches, first metal layer and second metal layers, and two cap layers. In particular, the dielectric layer is disposed on the substrate, and the first and second trenches are disposed in the dielectric layer. The width of the first trench is less than the width of the second trench. The first and second metal layers are respectively disposed in the first trench and the second trench, and the height of the first metal layer is less than or equal to the height of the second metal layer. The cap layers are respectively disposed in a top surface of the first metal layer and a top surface of the second metal layer.

    Abstract translation: 金属栅极结构至少包括衬底，电介质层，第一和第二沟槽，第一金属层和第二金属层以及两个盖层。 特别地，介电层设置在基板上，并且第一和第二沟槽设置在电介质层中。 第一沟槽的宽度小于第二沟槽的宽度。 第一和第二金属层分别设置在第一沟槽和第二沟槽中，第一金属层的高度小于或等于第二金属层的高度。 盖层分别设置在第一金属层的顶表面和第二金属层的顶表面中。

    Metal gate structure and method of making the same
    3.
    发明授权
    Metal gate structure and method of making the same 有权
    金属门结构及其制作方法

    公开(公告)号：US09324620B2

    公开(公告)日：2016-04-26

    申请号：US14462574

    申请日：2014-08-19

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Shi-Xiong Lin ,  Chun-Lung Chen ,  Kun-Yuan Liao ,  Feng-Yi Chang ,  Yu-Cheng Tung

    IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/423

    CPC classification number: H01L21/823456 ,  H01L21/28088 ,  H01L27/088 ,  H01L29/42372 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

    Abstract: A metal gate structure includes a substrate including a dense region and an iso region. A first metal gate structure is disposed within the dense region, and a second metal gate structure is disposed within the iso region. The first metal gate structure includes a first trench disposed within the dense region, and a first metal layer disposed within the first trench. The second metal gate structure includes a second trench disposed within the iso region, and a second metal layer disposed within the second trench. The height of the second metal layer is greater than the height of the first metal layer.

    Abstract translation: 金属栅极结构包括具有致密区域和iso区域的基板。 第一金属栅极结构设置在致密区域内，第二金属栅极结构设置在iso区域内。 第一金属栅极结构包括设置在密集区域内的第一沟槽和设置在第一沟槽内的第一金属层。 第二金属栅极结构包括设置在iso区内的第二沟槽和设置在第二沟槽内的第二金属层。 第二金属层的高度大于第一金属层的高度。

    Metal gate structure
    4.
    发明授权
    Metal gate structure 有权
    金属门结构

    公开(公告)号：US09263540B1

    公开(公告)日：2016-02-16

    申请号：US14852624

    申请日：2015-09-13

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Ching-Ling Lin ,  Chih-Sen Huang ,  Shih-Fang Tzou ,  Chien-Ting Lin ,  Yi-Wei Chen ,  Shi-Xiong Lin ,  Chun-Lung Chen ,  Kun-Yuan Liao ,  Feng-Yi Chang ,  Hsiao-Pang Chou ,  Chia-Lin Lu

    IPC: H01L27/088 ,  H01L29/49 ,  H01L29/423

    CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L21/823456 ,  H01L21/82385 ,  H01L27/088 ,  H01L29/4232 ,  H01L29/517 ,  H01L29/66545

    Abstract: The metal gate structure includes at least a substrate, a dielectric layer, first and second trenches, first metal layer and second metal layers, and two cap layers. In particular, the dielectric layer is disposed on the substrate, and the first and second trenches are disposed in the dielectric layer. The width of the first trench is less than the width of the second trench. The first and second metal layers are respectively disposed in the first trench and the second trench, and the height of the first metal layer is less than or equal to the height of the second metal layer. The cap layers are respectively disposed in a top surface of the first metal layer and a top surface of the second metal layer.

    Abstract translation: 金属栅极结构至少包括衬底，电介质层，第一和第二沟槽，第一金属层和第二金属层以及两个盖层。 特别地，介电层设置在基板上，并且第一和第二沟槽设置在电介质层中。 第一沟槽的宽度小于第二沟槽的宽度。 第一和第二金属层分别设置在第一沟槽和第二沟槽中，第一金属层的高度小于或等于第二金属层的高度。 盖层分别设置在第一金属层的顶表面和第二金属层的顶表面中。

    METAL GATE STRUCTURE AND METHOD OF MAKING THE SAME
    5.
    发明申请
    METAL GATE STRUCTURE AND METHOD OF MAKING THE SAME 有权
    金属门结构及其制造方法

    公开(公告)号：US20160005658A1

    公开(公告)日：2016-01-07

    申请号：US14462574

    申请日：2014-08-19

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Shi-Xiong Lin ,  Chun-Lung Chen ,  Kun-Yuan Liao ,  Feng-Yi Chang ,  Yu-Cheng Tung

    IPC: H01L21/8234 ,  H01L29/423 ,  H01L27/088

    CPC classification number: H01L21/823456 ,  H01L21/28088 ,  H01L27/088 ,  H01L29/42372 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

    Abstract: A metal gate structure includes a substrate including a dense region and an iso region. A first metal gate structure is disposed within the dense region, and a second metal gate structure is disposed within the iso region. The first metal gate structure includes a first trench disposed within the dense region, and a first metal layer disposed within the first trench. The second metal gate structure includes a second trench disposed within the iso region, and a second metal layer disposed within the second trench. The height of the second metal layer is greater than the height of the first metal layer.

    Abstract translation: 金属栅极结构包括具有致密区域和iso区域的基板。 第一金属栅极结构设置在致密区域内，第二金属栅极结构设置在iso区域内。 第一金属栅极结构包括设置在致密区域内的第一沟槽和设置在第一沟槽内的第一金属层。 第二金属栅极结构包括设置在iso区内的第二沟槽和设置在第二沟槽内的第二金属层。 第二金属层的高度大于第一金属层的高度。

    Method of forming a semiconductor device having a metal gate
    6.
    发明授权
    Method of forming a semiconductor device having a metal gate 有权
    形成具有金属栅极的半导体器件的方法

    公开(公告)号：US09230864B1

    公开(公告)日：2016-01-05

    申请号：US14515534

    申请日：2014-10-16

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chia-Lin Lu ,  Chun-Lung Chen ,  Kun-Yuan Liao ,  Feng-Yi Chang ,  Shi-Xiong Lin

    IPC: H01L21/8238 ,  H01L21/8234 ,  H01L21/28 ,  H01L29/78

    CPC classification number: H01L21/82345 ,  H01L21/28088 ,  H01L21/823842 ,  H01L27/092 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/7831 ,  H01L29/7833

    Abstract: A method of forming a semiconductor device having a metal gate includes the following steps. First of all, a first gate trench is formed in a dielectric layer. Next, a first work function layer is formed, covering the first gate trench. Then, a protection layer is formed in the first gate trench, also on the first work function layer. Then, a patterned sacrificial mask layer is formed in the first gate trench to expose a portion of the protection layer. After that, the exposed protection layer is removed, to form a U-shaped protection layer in the first gate trench. As following, a portion of the first work function layer under the exposed protection layer is removed, to form a U-shaped first work function layer in the first gate trench. Finally, the patterned sacrificial mask layer and the U-shaped protection layer are completely removed.

    Abstract translation: 一种形成具有金属栅极的半导体器件的方法包括以下步骤。 首先，在电介质层中形成第一栅极沟槽。 接下来，形成覆盖第一栅沟槽的第一功函数层。 然后，也在第一功函数层上的第一栅极沟槽中形成保护层。 然后，在第一栅极沟槽中形成图案化的牺牲掩模层以暴露保护层的一部分。 之后，去除暴露的保护层，以在第一栅极沟槽中形成U形保护层。 如下，去除暴露的保护层下面的第一功函数层的一部分，以在第一栅极沟槽中形成U形的第一功函数层。 最后，图案化的牺牲掩模层和U形保护层被完全去除。

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