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    FIN FIELD-EFFECT TRANSISTOR
    1.
    发明申请
    FIN FIELD-EFFECT TRANSISTOR 有权
    FIN场效应晶体管

    公开(公告)号：US20160260820A1

    公开(公告)日：2016-09-08

    申请号：US15156351

    申请日：2016-05-17

    Applicant: UNITED MICROELECTRONICS CORPORATION

    Inventor： JHEN-CYUAN LI ,  SHUI-YEN LU ,  MAN-LING LU ,  YU-CHENG TUNG ,  CHUNG-FU CHANG

    IPC: H01L29/66 ,  H01L29/78 ,  H01L21/311 ,  H01L21/306 ,  H01L21/3065 ,  H01L27/088 ,  H01L29/165

    CPC classification number: H01L29/66795 ,  H01L21/30604 ,  H01L21/30608 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/823425 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/165 ,  H01L29/7848

    Abstract: An etching method adapted to forming grooves in Si-substrate and FinFET transistor manufactured thereof are provided. The etching method includes providing a silicon substrate, at least two gate structures formed on the silicon substrate and at least two gate spacer structures disposed on the silicon substrate; performing a first etching process on the silicon substrate to form a first groove, which has a base and two inclined sidewalls, ascending to respective bottoms of the gate structures, and are interconnected with the base, respectively; and performing a second etching process on the silicon substrate at the base of the first groove, so as to form a second groove in a trench shape, wherein the two inclined sidewalls of the first groove are interconnected with the second groove respectively, and the first etching process is substantially different from the second etching process.

    Abstract translation: 提供一种适于在Si衬底中形成凹槽的蚀刻方法和由其制造的FinFET晶体管。 蚀刻方法包括提供硅衬底，形成在硅衬底上的至少两个栅极结构和设置在硅衬底上的至少两个栅极间隔结构; 在硅衬底上执行第一蚀刻工艺以形成第一凹槽，其具有基部和两个倾斜侧壁，分别上升到栅极结构的各个底部，并分别与基底互连; 以及在所述第一凹槽的所述基底处对所述硅衬底进行第二蚀刻处理，以形成沟槽形状的第二凹槽，其中所述第一凹槽的两个倾斜侧壁分别与所述第二凹槽互连，并且所述第一凹槽 蚀刻工艺与第二蚀刻工艺基本不同。

    FINFET STRUCTURE
    2.
    发明申请
    FINFET STRUCTURE 有权
    FINFET结构

    公开(公告)号：US20160148998A1

    公开(公告)日：2016-05-26

    申请号：US14549523

    申请日：2014-11-20

    Applicant: UNITED MICROELECTRONICS CORPORATION

    Inventor： YEN-LIANG WU ,  CHUNG-FU CHANG ,  WEN-JIUN SHEN ,  MAN-LING LU ,  CHIA-JONG LIU ,  YI-WEI CHEN

    IPC: H01L29/06 ,  H01L27/092 ,  H01L29/78

    CPC classification number: H01L29/0649 ,  H01L21/823807 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/7856

    Abstract: A FINFET structure is provided. The FINFET structure includes a substrate, a PMOS element, a NMOS element, a STI structure, and a bump structure. The substrate includes a first area and a second area adjacent to the first area. The PMOS element is disposed in the first area of the substrate, and includes at least one first fin structure. The NMOS element is disposed in the second area of the substrate and includes at least one second fin structure. The STI structure is disposed between the first fin structure and the second fin structure. The bump structure is disposed on the STI structure and has a carbon-containing dielectric material.

    Abstract translation: 提供FINFET结构。 FINFET结构包括衬底，PMOS元件，NMOS元件，STI结构和凸块结构。 基板包括与第一区域相邻的第一区域和第二区域。 PMOS元件设置在衬底的第一区域中，并且包括至少一个第一鳍结构。 NMOS元件设置在衬底的第二区域中并且包括至少一个第二鳍结构。 STI结构设置在第一翅片结构和第二翅片结构之间。 凸块结构设置在STI结构上并具有含碳介电材料。

    FIN FIELD EFFECT TRANSISTOR DEVICE AND FABRICATION METHOD THEREOF
    3.
    发明申请
    FIN FIELD EFFECT TRANSISTOR DEVICE AND FABRICATION METHOD THEREOF 有权
    FIN场效应晶体管器件及其制造方法

    公开(公告)号：US20160163837A1

    公开(公告)日：2016-06-09

    申请号：US15046467

    申请日：2016-02-18

    Applicant: UNITED MICROELECTRONICS CORPORATION

    Inventor： YEN-LIANG WU ,  CHUNG-FU CHANG ,  YU-HSIANG HUNG ,  SSU-I FU ,  WEN-JIUN SHEN ,  MAN-LING LU ,  CHIA-JONG LIU ,  YI-WEI CHEN

    IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06

    CPC classification number: H01L29/66795 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/6656 ,  H01L29/785

    Abstract: A field effect transistor (FinFET) device includes a substrate, a fin structure, a shallow trench isolation and a gate structure. The fin structure is formed on a surface of the substrate and includes a base fin structure and an epitaxial fin structure formed on the base fin structure. The shallow trench isolation structure is formed on the surface of the substrate and includes a peripheral zone and a concave zone. The peripheral zone physically contacts with the fin structure. The gate structure is disposed on the epitaxial fin structure perpendicularly. A method of fabricating the aforementioned field effect transistor is also provided.

    Abstract translation: 场效应晶体管（FinFET）器件包括衬底，鳍结构，浅沟槽隔离和栅极结构。 翅片结构形成在基板的表面上，并且包括底鳍结构和形成在基底鳍结构上的外延翅片结构。 浅沟槽隔离结构形成在基板的表面上并且包括周边区域和凹陷区域。 周边区域与翅片结构物理接触。 栅极结构垂直地设置在外延鳍结构上。 还提供了制造上述场效应晶体管的方法。

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