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16 条记录 (耗时 0.034 秒)

    System for the flexible configuration of functional modules
    2.
    发明申请
    System for the flexible configuration of functional modules 审中-公开
    功能模块灵活配置的系统

    公开(公告)号：US20110025376A1

    公开(公告)日：2011-02-03

    申请号：US12311856

    申请日：2007-09-10

    申请人： Udo Grittke ,  Axel Humpert ,  Dietmar Fruhauf ,  Romuald Girardey ,  Jurgen Becker ,  Katarina Paulsson ,  Michael Hubner

    发明人： Udo Grittke ,  Axel Humpert ,  Dietmar Fruhauf ,  Romuald Girardey ,  Jurgen Becker ,  Katarina Paulsson ,  Michael Hubner

    IPC分类号： H03K19/177

    CPC分类号： H03K19/17752 ,  G01D3/022 ,  G01D18/00 ,  H03K19/17732 ,  H03K19/17756

    摘要： A system for the flexible configuration of function modules. The system includes the following components a plurality of logic cells in a fixedly wired FPGA/standard ASIC structure, wherein the logic cells are so configurable by means of configuration registers, that they execute basic logic functions; a switch matrix having a plurality of memory cells, via which different logical connections of the logic cells in defined complex connections are configurable by means of the configuration registers; and a control unit, which partially dynamically so configures the logic cells and the switch matrix via an internal bus and via the configuration registers by means of a configuration bit stream, that the fixedly wired FPGA/ASIC structure behaves functionally as a partially dynamically reconfigurable logic chip.

    摘要翻译： 用于功能模块灵活配置的系统。 该系统包括固定有线FPGA /标准ASIC结构中的多个逻辑单元的以下组件，其中逻辑单元通过配置寄存器可配置，它们执行基本逻辑功能; 具有多个存储器单元的开关矩阵，通过该配置寄存器可以配置定义的复合连接中的逻辑单元的不同逻辑连接; 以及控制单元，其部分动态地通过内部总线配置逻辑单元和开关矩阵，并且通过配置位流通过配置寄存器，固定有线FPGA / ASIC结构在功能上表现为部分动态可重配置逻辑 芯片。

    Abutment with a Hydroxylated Surface
    4.
    发明申请
    Abutment with a Hydroxylated Surface 有权
    羟基化表面的基台

    公开(公告)号：US20070202462A1

    公开(公告)日：2007-08-30

    申请号：US11680042

    申请日：2007-02-28

    申请人： Frank Schwarz ,  Jurgen Becker ,  Marco Wieland ,  Michel Dard

    发明人： Frank Schwarz ,  Jurgen Becker ,  Marco Wieland ,  Michel Dard

    IPC分类号： A61C13/225

    CPC分类号： A61C8/0012 ,  A61C8/0013 ,  A61C8/0015 ,  A61C8/005 ,  A61C8/006 ,  A61C8/0066 ,  A61C8/0069

    摘要： Abutment of a dental implant system, having at the top a support region intended for receiving a prosthetic build-up construction and at the bottom an implant contact region intended for insertion into a receiving hole of an implant, and wherein the abutment has between the support region and the implant contact region a soft tissue contact surface. Said soft tissue contact surface is at least partially hydroxylated or silanated.

    摘要翻译： 牙科植入物系统的基座，其顶部具有用于接纳假体积聚构造的支撑区域，并且在底部具有用于插入到植入物的接收孔中的植入物接触区域，并且其中所述支座具有在支撑件 区域和植入物接触区域是软组织接触表面。 所述软组织接触表面至少部分羟基化或硅烷化。

    Apparatus for manufacturing semiconductor wafers
    5.
    发明授权
    Apparatus for manufacturing semiconductor wafers 失效
    半导体晶片制造装置

    公开(公告)号：US5221356A

    公开(公告)日：1993-06-22

    申请号：US957954

    申请日：1992-10-08

    申请人： Glen C. Hillier ,  Jurgen Becker

    发明人： Glen C. Hillier ,  Jurgen Becker

    IPC分类号： C23C16/458 ,  C30B25/12 ,  H01L21/00

    CPC分类号： H01L21/67017 ,  C23C16/4584 ,  C30B25/12 ,  Y10S269/903

    摘要： Apparatus for semiconductor wafer manufacture in which a susceptor has an annular rotor for supporting a wafer substrate with a substrate surface facing downwards. The rotor has an annular flange overlying a body of the susceptor and the structure is such that a flow of rotor driving gas may be directed up from the body and against the flange while crystalline layers are being formed on the undersurface of the substrate.

    摘要翻译： 用于半导体晶片制造的装置，其中基座具有用于支撑晶片衬底的环形转子，衬底表面面向下。 转子具有覆盖基座的主体的环形凸缘，并且结构使得转子驱动气体的流动可以从主体向上引导并且在基底的下表面上形成结晶层的同时抵靠凸缘。

    Reconfigurable processor architecture
    6.
    发明授权
    Reconfigurable processor architecture 有权
    可重构的处理器架构

    公开(公告)号：US09213677B2

    公开(公告)日：2015-12-15

    申请号：US13582485

    申请日：2011-02-28

    申请人： Ralf Konig ,  Timo Stripf ,  Jurgen Becker

    发明人： Ralf Konig ,  Timo Stripf ,  Jurgen Becker

    IPC分类号： G06F15/00 ,  G06F15/76 ,  G06F15/78 ,  G06F15/80

    CPC分类号： G06F15/7867 ,  G06F15/8007

    摘要： A reconfigurable data processor architecture. The processor architecture includes: a first plurality of data processing elements, each having a respective synchronization unit, a data link structure adapted for dynamically interconnecting a number of the data processing elements, at least one configuration register, and at least one control unit in operative connection with the configuration register for controlling a contents thereof, wherein, based on the contents, the first plurality of data processing elements is adapted for temporarily constituting at runtime at least one group of one or more of said data processing elements from said first plurality of data processing elements dynamically via the data link structure. The synchronization units are adapted for synchronizing data processing by individual data processing elements within the group. The first plurality of data processing elements may be reconfigurably grouped and thus adapted to various data processing tasks at runtime. This increases data processing efficiency.

    摘要翻译： 可重构数据处理器架构。 处理器架构包括：第一多个数据处理元件，每个数据处理元件各自具有相应的同步单元，数据链路结构，适于动态地互连多个数据处理元件，至少一个配置寄存器和至少一个操作的控制单元 与用于控制其内容的配置寄存器的连接，其中，基于内容，第一多个数据处理元件适于在运行时临时构成来自所述第一多个数据处理元件的至少一组一个或多个所述数据处理元件 数据处理元素通过数据链接结构动态地进行。 同步单元适于使组内的各个数据处理元件的数据处理同步。 第一多个数据处理元件可以被可重构地分组，并因此适用于运行时的各种数据处理任务。 这提高了数据处理效率。

    Current-conducting system for a lamp
    8.
    发明申请
    Current-conducting system for a lamp 审中-公开
    导电导电系统

    公开(公告)号：US20070046168A1

    公开(公告)日：2007-03-01

    申请号：US11507466

    申请日：2006-08-22

    申请人： Jurgen Becker ,  Ursus Kruger ,  Uwe Pyritz ,  Heike Schiewe

    发明人： Jurgen Becker ,  Ursus Kruger ,  Uwe Pyritz ,  Heike Schiewe

    IPC分类号： H01J5/00

    CPC分类号： H01J9/28 ,  H01J9/326 ,  H01J61/36 ,  H01J61/368 ,  H01K1/38 ,  H01K1/40

    摘要： Disclosed is a current-conducting system for a lamp with molybdenum foils, gas-tighly embedded in at least one end section of the lamp, at which at two opposite narrow ends in each case an outer current supply conductor and an electrode or an outer current supply conductor and an inner current supply conductor are arranged. According to the invention, the molybdenum foils, current supply conductors and/or electrodes are provided with a coating, at least in sections, that is formed in such a way that the adhesion properties to the glass are improved in the area of the coating, with the coating being applied to the current-conducting system by vacuum-arc ion implantation (Arc-PVD).

    摘要翻译： 公开了一种用于具有钼箔的灯的导电系统，其气体高度地嵌入在灯的至少一个端部中，在两个相对的窄端处，每个壳体中具有外部电流供应导体和电极或外部电流 供电导体和内部电流供应导体。 根据本发明，钼箔，电流供应导体和/或电极设置有至少以分段形式形成的涂层，使得在涂层的面积上改善对玻璃的粘附性能， 通过真空电弧离子注入（Arc-PVD）将涂层施加到导电系统。

    Data processing method and device
    10.
    发明申请
    Data processing method and device 有权
    数据处理方法和装置

    公开(公告)号：US20070050603A1

    公开(公告)日：2007-03-01

    申请号：US10523764

    申请日：2003-07-24

    申请人： Martin Vorbach ,  Jurgen Becker ,  Markus Weinhardt ,  Volker Baumgarte ,  Frank May

    发明人： Martin Vorbach ,  Jurgen Becker ,  Markus Weinhardt ,  Volker Baumgarte ,  Frank May

    IPC分类号： G06F9/44 ,  G06F12/00

    CPC分类号： G06F9/30181 ,  G06F9/3455 ,  G06F9/3802 ,  G06F9/383 ,  G06F9/3851 ,  G06F9/3877 ,  G06F9/3897 ,  G06F15/7867

    摘要： In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurable coarse-granular elements, the first result data may be subsequently read out from the memory, and the first result data may be subsequently processed using the plurality of configurable coarse-granular elements. In a first configuration, the first memory area may be configured as a write memory, and the second memory area may be configured as a read memory. Subsequent to writing to and reading from the memory in accordance with the first configuration, the first memory area may be configured as a read memory, and the second memory area may be configured as a write memory.

    摘要翻译： 在数据处理方法中，可以使用多个可配置的粗粒度元素来获得第一结果数据，第一结果数据可以被写入到包括空间上分离的第一和第二存储器区域并且经由总线连接到 可以随后从存储器中读出多个可配置的粗粒度元素，第一结果数据可以随后使用多个可配置的粗粒度元素进行处理。 在第一配置中，第一存储器区域可以被配置为写入存储器，并且第二存储器区域可以被配置为读取存储器。 在根据第一配置写入和读取存储器之后，第一存储器区域可以被配置为读取存储器，并且第二存储器区域可以被配置为写入存储器。