公开(公告)号：US20040020688A1

公开(公告)日：2004-02-05

申请号：US10210091

申请日：2002-08-02

Applicant: United Test Center Inc.

Inventor： Chung-Che Tsai ,  Wei-Heng Shan

IPC: H05K001/09 ,  H05K001/11

CPC classification number: H05K3/3452 ,  H01L23/49816 ,  H01L2924/0002 ,  H05K3/244 ,  H05K2201/09745 ,  H05K2201/09827 ,  H05K2201/099 ,  H05K2203/0594 ,  H01L2924/00

Abstract: The present invention is to provide a printed circuit board, which comprises a substrate, a conductive pattern disposed on a surface of said substrate and a solder mask coated on the surface of said substrate and covered over the conductive pattern. The conductive pattern has a bonding pad. The solder mask has an opening corresponding in location to the bonding pad such that a portion of the bonding pad is exposed outside. A space is left between said solder mask and said bonding pad and is communicated with the opening. Whereby, a solder ball can be received in the opening and the space and electrically connected to the bonding pad, such that the solder ball is held on the printed circuit board securely.

Abstract translation: 本发明提供一种印刷电路板，其包括基板，设置在所述基板的表面上的导电图案和涂覆在所述基板的表面上且覆盖在导电图案上的焊接掩模。 导电图案具有接合焊盘。 焊接掩模具有与焊盘的位置对应的开口，使得焊盘的一部分暴露在外部。 所述焊接掩模和所述接合焊盘之间留有空间，并与开口连通。 由此，可以在开口和空间中容纳焊球并电连接到焊盘，使得焊球牢固地保持在印刷电路板上。

公开(公告)号：US20040042140A1

公开(公告)日：2004-03-04

申请号：US10232682

申请日：2002-09-03

Applicant: United Test Center Inc.

Inventor： Chung-Che Tsai ,  Wei-Heng Shan

IPC: H02H005/04

CPC classification number: H01L23/4334 ,  H01L23/29 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49894 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599

Abstract: The present invention is to provide a double-sided thermally enhanced IC chip package which includes a chip being received in an opening of a substrate and electrically connected to a conductive circuit pattern on a top surface of the substrate through bonding wires. A thermally and electrically conductive planar member is attached to an inactive side of the chip through a thermally and electrically conductive adhesive layer. A portion of an active side of the chip to which the bonding wires are connected is encapsulated by a dielectric encapsulant, and the other portion of the active side of the chip is covered by a thermally and electrically conductive encapsulant. Thus, heat generated by the chip can be efficiently dissipated through the planar member and the thermally and electrically conductive encapsulant. The present invention also discloses a stacked chip package with double-sided heat dissipation capability.

Abstract translation: 本发明提供一种双面热增强IC芯片封装，其包括芯片，该芯片被接收在基板的开口中并且通过接合线电连接到基板的顶表面上的导电电路图案。 导电和导电的平面构件通过导热和导电的粘合剂层附着到芯片的非活动侧。 键合线连接的芯片的有效侧的一部分被介电密封剂封装，并且芯片的有源侧的另一部分由导电和导电的密封剂覆盖。 因此，可以通过平面构件和导热密封剂有效地散发由芯片产生的热量。 本发明还公开了具有双面散热能力的堆叠式芯片封装。

公开(公告)号：US20040041249A1

公开(公告)日：2004-03-04

申请号：US10232729

申请日：2002-09-03

Applicant: United Test Center Inc.

Inventor： Chung-che Tsai ,  Wei-Heng Shan

IPC: H01L023/02

CPC classification number: H01L25/0657 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/00014

Abstract: A stacked chip package has a substrate with a through hole. A first chip is received in the through hole. A second chip is disposed on the first chip. Two chips are electrically connected to an upper surface of the substrate. An adhesive layer and a planar member, which are thermally and electrically conductive, are disposed on a lower surface of the substrate to support the chips and dissipate the heat generated by the chips. An encapsulant covers the upper surface of the substrate. The package has superior heat-dissipating ability, high yield in assembly and small size.

Abstract translation: 堆叠式芯片封装具有带有通孔的基板。 第一芯片被接收在通孔中。 第二芯片设置在第一芯片上。 两个芯片电连接到基板的上表面。 粘合剂层和平面构件是导热导电的，设置在基板的下表面上以支撑芯片并消散由芯片产生的热量。 密封剂覆盖基材的上表面。 该封装具有优异的散热能力，组装成品率高，体积小。