公开(公告)号：US20240268033A1

公开(公告)日：2024-08-08

申请号：US18436098

申请日：2024-02-08

Applicant: Robert Bosch GmbH

Inventor： Florian Eichkorn

IPC: H05K1/18

CPC classification number: H05K1/189 ,  H05K2201/05 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/09745 ,  H05K2201/10181 ,  H05K2201/10803

Abstract: A flexible printed circuit board, in particular for connecting electrical and/or electronic components, includes a fuse conductor track (10). The fuse conductor track has a conductor width (B1) formed on the flexible printed circuit board (1). The fuse conductor track (10) has a taper (12) in a fuse area (11) of the fuse conductor track (10), at which the fuse conductor track (10) has a fuse width (B2) which is smaller than the conductor width (B1) of the fuse conductor track (10) outside the fuse area (11).

公开(公告)号：US09985189B2

公开(公告)日：2018-05-29

申请号：US15158139

申请日：2016-05-18

Applicant: NICHIA CORPORATION

Inventor： Ryosuke Wakaki

IPC: H01L33/00 ,  H01L33/62 ,  H05K1/11 ,  H02K3/34 ,  H05K3/34

CPC classification number: H01L33/62 ,  H05K1/111 ,  H05K3/3442 ,  H05K2201/09736 ,  H05K2201/09745 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A semiconductor device includes a mounting substrate with a land having a first surface and a second surface higher than the first surface, a side-emission type light emitting device including an external connecting terminal disposed on the first surface, and a bonding member disposed at least on the second surface to bond the external connecting terminal and the land.

公开(公告)号：US20180040544A1

公开(公告)日：2018-02-08

申请号：US15660718

申请日：2017-07-26

Applicant: Invensas Corporation

Inventor： Rajesh Emeka Katkar ,  Min Tao ,  Javier A. Delacruz ,  Hoki Kim ,  Akash Agrawal

IPC: H01L23/498 ,  H05K3/34 ,  H05K1/18 ,  H05K1/11 ,  H01L25/10 ,  H01L21/48

CPC classification number: H01L23/49805 ,  H01L21/4803 ,  H01L21/4846 ,  H01L21/4853 ,  H01L23/13 ,  H01L23/49833 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/48105 ,  H01L2224/48225 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2924/15159 ,  H01L2924/15162 ,  H01L2924/15172 ,  H01L2924/15331 ,  H01L2924/15333 ,  H05K1/117 ,  H05K1/141 ,  H05K1/144 ,  H05K1/181 ,  H05K3/3405 ,  H05K3/366 ,  H05K2201/049 ,  H05K2201/09472 ,  H05K2201/09745 ,  H05K2201/09845 ,  H05K2201/10159 ,  H05K2201/10522

Abstract: Multi-surface edge pads for vertical mount packages and methods of making package stacks are provided. Example substrates for vertical surface mount to a motherboard have multi-surface edge pads. The vertical mount substrates may be those of a laminate-based FlipNAND. The multi-surface edge pads have cutouts or recesses that expose more surfaces and more surface area of the substrate for bonding with the motherboard. The cutouts in the edge pads allow more solder to be used between the attachment surface of the substrate and the motherboard. The placement and geometry of the resulting solder joint is stronger and has less internal stress than conventional solder joints for vertical mounting. In an example process, blind holes can be drilled into a thickness of a substrate, and the blind holes plated with metal. The substrate can be cut in half though the plated holes to provide two substrates with plated multi-surface edge pads including the cutouts for mounting to the motherboard.

公开(公告)号：US20170339790A1

公开(公告)日：2017-11-23

申请号：US15674273

申请日：2017-08-10

Applicant: Conti Temic microelectronic GmbH

Inventor： Frieder Wittmann ,  Karin Beart ,  Stefan Müller ,  Thomas Schmidt ,  Bernhard Schuch

IPC: H05K1/18 ,  H05K3/34 ,  H05K1/11 ,  H05K3/32

CPC classification number: H05K1/181 ,  H05K1/0204 ,  H05K1/11 ,  H05K3/0061 ,  H05K3/321 ,  H05K3/341 ,  H05K7/205 ,  H05K2201/066 ,  H05K2201/09745 ,  H05K2201/10227 ,  H05K2201/10545 ,  H05K2201/1056 ,  H05K2203/049

Abstract: The disclosure relates to an electronic component that includes a printed circuit board with two opposite flat sides and a plurality of electronic components, and a base plate. A number of the electronic components are each fixed on and electrically conductively connected to a rear flat side of the printed circuit board and a further number of the electronic components are each fixed on and electrically conductively connected to a front flat side of the printed circuit board. The base plate has at least one first cutout for receiving electronic components that are arranged on the rear flat side of the printed circuit board. The disclosure also relates to a method for producing an electronic component of this kind.

公开(公告)号：US20170150605A1

公开(公告)日：2017-05-25

申请号：US15116042

申请日：2015-05-13

Applicant: Sony Corporation

Inventor： Takashi NAGAI ,  Hiroyuki KUMAGAI

IPC: H05K1/18 ,  H01M10/42 ,  H01M10/0525 ,  H05K1/11 ,  H05K3/34

CPC classification number: H05K1/181 ,  H01M10/0525 ,  H01M10/425 ,  H05K1/111 ,  H05K3/28 ,  H05K3/34 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/09472 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09745 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2203/0588 ,  Y02P70/611

Abstract: An electronic apparatus is provided including a substrate, a conductive land formed on a surface of the substrate, an electronic component including an electrode, at least one insulating protrusion formed on the land in an overlapping region between the land and the electrode in plan view, and a solder that bonds the electronic component to the land, the solder being formed between the electrode and the land in the overlapping region in a normal direction to the surface of the substrate.

公开(公告)号：US09635761B2

公开(公告)日：2017-04-25

申请号：US14306768

申请日：2014-06-17

Applicant: Massachusetts Institute of Technology

Inventor： Glenn A. Brigham ,  Richard J. Stanley ,  Bradley Thomas Perry ,  Patrick J. Bell

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/46

CPC classification number: H05K3/42 ,  H05K1/0222 ,  H05K1/115 ,  H05K1/116 ,  H05K3/0094 ,  H05K3/4685 ,  H05K2201/0959 ,  H05K2201/09745 ,  H05K2201/10242 ,  H05K2203/03 ,  H05K2203/0703 ,  H05K2203/30 ,  Y10T29/49123

Abstract: A printed circuit board, and a method of fabricating the printed circuit board is disclosed. The printed circuit board includes at least one coaxial via. A hollow via is disposed in the printed circuit board. A metal sleeve is formed around the circumference of said hollow via. An inner conductive path is disposed in the hollow via. Additionally, an insulating material is disposed in the hollow via, between the conducting path and the metal sleeve. The conductive path is used to connect signal traces disposed on two different layers of the printed circuit board. In some embodiments, these signal traces carry signals having a frequency above 1 GHz, although the disclosure is not limited to this embodiment.

公开(公告)号：US09634412B2

公开(公告)日：2017-04-25

申请号：US13183920

申请日：2011-07-15

Applicant: Cyprian Uzoh ,  Craig Mitchell

Inventor： Cyprian Uzoh ,  Craig Mitchell

IPC: H05K1/09 ,  H01R13/03 ,  H05K3/40 ,  H05K3/28

CPC classification number: H01R13/03 ,  H05K1/09 ,  H05K3/282 ,  H05K3/4007 ,  H05K2201/0338 ,  H05K2201/09745 ,  Y10T29/49155

Abstract: Electrical contacts comprising a surface with a plurality of cavities therein and their methods of manufacture and use.

公开(公告)号：US20160128207A1

公开(公告)日：2016-05-05

申请号：US14992919

申请日：2016-01-11

Applicant: Intel Corporation

Inventor： MD Altaf Hossain ,  Scott A. Gilbert

IPC: H05K3/34 ,  B23K31/02 ,  H01L21/48

CPC classification number: H05K3/3436 ,  B23K31/02 ,  H01L21/4853 ,  H01L23/49816 ,  H01L2224/16 ,  H01L2924/0002 ,  H05K1/111 ,  H05K3/3478 ,  H05K2201/09745 ,  H05K2203/041 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49149 ,  H01L2924/00

Abstract: A BGA structure having larger solder balls in high stress regions of the array is disclosed. The larger solder balls have higher solder joint reliability (SJR) and as such may be designated critical to function (CTF), whereby the larger solder balls in high stress regions carry input/output signals between a circuit board and a package mounted thereon. The larger solder balls are accommodated by recessing each ball in the package substrate, the circuit board, or both the package substrate and the circuit board. Additionally, a ball attach method for mounting a plurality of solder balls having different average diameters is disclosed.

Abstract translation: 公开了一种在阵列的高应力区域具有较大焊球的BGA结构。 较大的焊球具有较高的焊点可靠性（SJR），因此可被指定为关键功能（CTF），因此高应力区域中较大的焊球在电路板和安装在其上的封装之间承载输入/输出信号。 通过将封装基板，电路板或封装基板和电路板两者中的每个球凹入来容纳较大的焊球。 另外，公开了一种用于安装具有不同平均直径的多个焊球的球附着方法。

公开(公告)号：US09332642B2

公开(公告)日：2016-05-03

申请号：US14481188

申请日：2014-09-09

Applicant: Panasonic Corporation

Inventor： Shingo Yoshioka ,  Hiroaki Fujiwara ,  Hiromitsu Takashita ,  Tsuyoshi Takeda

IPC: H05K1/09 ,  H05K1/11 ,  H05K3/10 ,  H05K3/18 ,  H05K3/40 ,  H05K1/02 ,  H05K1/03 ,  H05K3/00

CPC classification number: H05K1/119 ,  H01L2224/81385 ,  H05K1/0284 ,  H05K1/0373 ,  H05K1/111 ,  H05K3/0014 ,  H05K3/0032 ,  H05K3/0044 ,  H05K3/0076 ,  H05K3/0079 ,  H05K3/0085 ,  H05K3/107 ,  H05K3/185 ,  H05K3/4007 ,  H05K2201/0209 ,  H05K2201/0224 ,  H05K2201/0233 ,  H05K2201/0239 ,  H05K2201/0376 ,  H05K2201/0769 ,  H05K2201/09227 ,  H05K2201/09472 ,  H05K2201/09736 ,  H05K2201/09745 ,  H05K2201/098 ,  H05K2201/09972 ,  H05K2203/0108 ,  H05K2203/013 ,  H05K2203/0143 ,  H05K2203/0228 ,  H05K2203/0264 ,  H05K2203/0285 ,  H05K2203/0565 ,  H05K2203/0706 ,  H05K2203/0776 ,  H05K2203/1163 ,  Y02P70/611

Abstract: One aspect of the present invention relates to a circuit board including an insulating base substrate; and a circuit layer that is formed of a conductor and that is provided on the surface of the insulating base substrate, wherein the insulating base substrate has a smooth surface having a surface roughness Ra of 0.5 μm or less, and the conductor is at least partially embedded in a wiring groove formed in the surface of the insulating base substrate.

Abstract translation: 本发明的一个方面涉及一种包括绝缘基底的电路板; 以及电路层，其由导体形成，并且设置在所述绝缘基底基板的表面上，其中所述绝缘基底具有表面粗糙度Ra为0.5μm以下的平滑表面，并且所述导体至少部分地 嵌入形成在绝缘性基板的表面的布线槽。

公开(公告)号：US20160116129A1

公开(公告)日：2016-04-28

申请号：US14989704

申请日：2016-01-06

Applicant: LG INNOTEK CO., LTD.

Inventor： Nam Seok OH ,  Yun Min CHO ,  Jong Woo LEE

IPC: F21S8/10 ,  H01L27/15

CPC classification number: F21S41/147 ,  F21S41/125 ,  F21S41/141 ,  F21S41/255 ,  F21S41/285 ,  F21S41/321 ,  F21S41/36 ,  F21S41/365 ,  F21S41/43 ,  F21S45/47 ,  F21V3/08 ,  F21V7/22 ,  F21V9/30 ,  F21V13/02 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/58 ,  H01L2224/48091 ,  H05K1/05 ,  H05K1/183 ,  H05K3/284 ,  H05K2201/09745 ,  H05K2201/10106 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Disclosed is a light emitting module including a light emitting device package having a circuit board having a cavity, an insulation substrate arranged in the cavity, with a conductive pattern formed thereon, and at least one light emitting device disposed on the insulation substrate, with being electrically connected with the conductive pattern; and a glass cover located on the light emitting device package, with lateral surfaces, a top surface and an open bottom surface, wherein the light emitting device package and the circuit board are electrically connected with each other.