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    Protection of secure electronic modules against attacks
    4.
    发明授权
    Protection of secure electronic modules against attacks 失效
    保护安全的电子模块免受攻击

    公开(公告)号：US07953987B2

    公开(公告)日：2011-05-31

    申请号：US11682349

    申请日：2007-03-06

    申请人： Carl U. Buscaglia ,  Vincenzo Condorelli ,  Kevin C. Gotze ,  Nihad Hadzic ,  Donald W. Plass ,  Tamas Visegrady

    发明人： Carl U. Buscaglia ,  Vincenzo Condorelli ,  Kevin C. Gotze ,  Nihad Hadzic ,  Donald W. Plass ,  Tamas Visegrady

    IPC分类号： G06F12/14

    CPC分类号： G06F21/86 ,  G06F2221/2143

    摘要： A method and apparatus is disclosed for preventing the unintended retention of secret data caused by preferred state/burn-in in secure electronic modules. Sequentially storing the data and its inverse on alternating clock cycles, and by actively overwriting it to destroy it, prevents SRAM devices from developing a preferred state. By encrypting a relatively large amount of secret data with a master encryption key, and storing said master key in this non-preferred state storage, the electronic module conveniently extends this protection scheme to a large amount of data, without the overhead of investing or actively erasing the larger storage area.

    摘要翻译： 公开了一种用于防止由安全电子模块中的优选状态/老化引起的秘密数据的意外保留的方法和装置。 在交替的时钟周期内顺序存储数据及其反相，并通过主动覆盖数据来破坏数据，从而防止SRAM器件发展成优先状态。 通过使用主加密密钥加密相对大量的秘密数据，并将所述主密钥存储在该非优选状态存储器中，电子模块便于将该保护方案扩展到大量的数据，而无需投入或主动地开销 擦除较大的存储区域。

    Protection of Secure Electronic Modules Against Attacks
    5.
    发明申请
    Protection of Secure Electronic Modules Against Attacks 失效
    保护安全电子模块免受攻击

    公开(公告)号：US20080222430A1

    公开(公告)日：2008-09-11

    申请号：US11682349

    申请日：2007-03-06

    申请人： Carl U. Buscaglia ,  Vincenzo Condorelli ,  Kevin C. Gotze ,  Nihad Hadzic ,  Donald W. Plass ,  Tamas Visegrady

    发明人： Carl U. Buscaglia ,  Vincenzo Condorelli ,  Kevin C. Gotze ,  Nihad Hadzic ,  Donald W. Plass ,  Tamas Visegrady

    IPC分类号： G06F12/14

    CPC分类号： G06F21/86 ,  G06F2221/2143

    摘要： A method and apparatus is disclosed for preventing the unintended retention of secret data caused by preferred state/burn in secure electronic modules. Sequentially storing the data, and its inverse on alternating clock cycles, and by actively overwriting it to destroy it, prevents SRAM devices from developing a preferred state. By encrypting a relatively large amount of secret data with a master encryption key, and storing said master key in this non-preferred state storage, the electronic module conveniently extends this protection scheme to a large amount of data, without the overhead of investing or actively erasing the larger storage area.

    摘要翻译： 公开了一种用于防止在安全电子模块中由优选状态/烧伤引起的秘密数据的意外保留的方法和装置。 顺序存储数据及其在交替时钟周期上的反相，并通过主动覆盖数据来破坏数据，从而防止SRAM器件发展成优先状态。 通过使用主加密密钥加密相对大量的秘密数据，并将所述主密钥存储在该非优选状态存储器中，电子模块便于将该保护方案扩展到大量的数据，而无需投入或主动地开销 擦除较大的存储区域。

    Method of embedding tamper proof layers and discrete components into printed circuit board stack-up
    6.
    发明授权
    Method of embedding tamper proof layers and discrete components into printed circuit board stack-up 有权
    将防篡改层和分立元件嵌入到印刷电路板堆叠中的方法

    公开(公告)号：US07703201B2

    公开(公告)日：2010-04-27

    申请号：US11163609

    申请日：2005-10-25

    申请人： Stefano Sergio Oggioni ,  Vincenzo Condorelli ,  Nihad Hadzic ,  Kevin C. Gotze ,  Tamas Visegrady

    发明人： Stefano Sergio Oggioni ,  Vincenzo Condorelli ,  Nihad Hadzic ,  Kevin C. Gotze ,  Tamas Visegrady

    IPC分类号： H01K3/00

    CPC分类号： H05K3/1258 ,  H05K1/0275 ,  H05K1/095 ,  H05K1/167 ,  H05K3/108 ,  H05K3/28 ,  H05K2201/10151 ,  H05K2203/0568 ,  Y10T29/49155

    摘要： A method for embedding tamper proof layers and discrete components into a printed circuit board stack-up is disclosed. According to this method, a plating mask is applied on a base substrate to cover partially one of its faces. Conductive ink is then spread on this face so as to fill the gap formed by the plating mask. To obtain a uniform distribution of the conductive ink and then gel it, the conductive ink is preferably heated. A dielectric layer is applied on the conductive ink layer and the polymerization process is ended to obtain a strong adhesion between these two layers. In a preferred embodiment, conductive tracks are simultaneously designed on the other face of the base substrate to reduce thermo-mechanical strains and deformations.

    摘要翻译： 公开了一种将防篡改层和分立元件嵌入到印刷电路板叠层中的方法。 根据该方法，将电镀掩模施加在基底基板上以部分地覆盖其一个面。 然后在该表面上扩散导电油墨，以填充由电镀掩模形成的间隙。 为了获得导电油墨的均匀分布，然后使其凝胶化，优选加热导电油墨。 在导电油墨层上施加电介质层，结束聚合过程，以获得这两层之间的强粘合性。 在优选实施例中，导电轨道同时设计在基底基板的另一面上，以减少热机械应变和变形。

    FUSE ATTESTATION TO SECURE THE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING
    7.
    发明申请
    FUSE ATTESTATION TO SECURE THE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING 有权
    保险丝安全确保集成电路制造过程中秘密钥匙的提供

    公开(公告)号：US20140185795A1

    公开(公告)日：2014-07-03

    申请号：US13728375

    申请日：2012-12-27

    申请人： Kevin C. Gotze ,  Jiangtao Li ,  Gregory M. Iovino

    发明人： Kevin C. Gotze ,  Jiangtao Li ,  Gregory M. Iovino

    IPC分类号： H04L9/08

    CPC分类号： G06F21/73 ,  G06F21/44 ,  G09C1/00 ,  H04L9/0861 ,  H04L9/0866 ,  H04L9/3278

    摘要： Embodiments of an invention for fuse attestation to secure the provisioning of secret keys during integrated circuit manufacturing are disclosed. In one embodiment, an apparatus includes a storage location, a physically unclonable function (PUF) circuit, a PUF key generator, an encryption unit, and a plurality of fuses. The storage location is to store a configuration fuse value. The PUF circuit is to provide a PUF value. The PUF key generator is to generate a PUF key based on the PUF value. The encryption unit is to encrypt the configuration fuse value using the PUF key. The PUF key and the configuration fuse value are to be provided to a key server. The key server is to determine that the configuration fuse value indicates that the apparatus is a production component, and, in response, provide a fuse key to be stored in the plurality of fuses.

    摘要翻译： 公开了用于在集成电路制造期间确保秘密密钥供应的熔丝证明的发明的实施例。 在一个实施例中，一种装置包括存储位置，物理上不可克隆功能（PUF）电路，PUF密钥发生器，加密单元和多个保险丝。 存储位置是存储配置熔丝值。 PUF电路提供PUF值。 PUF密钥生成器基于PUF值生成PUF密钥。 加密单元使用PUF密钥加密配置熔丝值。 PUF键和配置保险丝值将提供给密钥服务器。 密钥服务器是确定配置熔丝值表示该设备是生产部件，并且作为响应，提供要存储在多个保险丝中的熔丝钥匙。

    DETECTION OF RETURN ORIENTED PROGRAMMING ATTACKS
    8.
    发明申请
    DETECTION OF RETURN ORIENTED PROGRAMMING ATTACKS 有权
    返回面向编程攻击的检测

    公开(公告)号：US20140123281A1

    公开(公告)日：2014-05-01

    申请号：US13664532

    申请日：2012-10-31

    申请人： Stephen A. Fischer ,  Kevin C. Gotze ,  Yuriy Bulygin ,  Kirk D. Brannock

    发明人： Stephen A. Fischer ,  Kevin C. Gotze ,  Yuriy Bulygin ,  Kirk D. Brannock

    IPC分类号： G06F21/00

    CPC分类号： G06F21/552 ,  G06F9/30145 ,  G06F21/566 ,  G06F2221/034

    摘要： In one embodiment, a processor includes at least one execution unit and Return Oriented Programming (ROP) detection logic. The ROP detection logic may determine a ROP metric based on a plurality of control transfer events. The ROP detection logic may also determine whether the ROP metric exceeds a threshold. The ROP detection logic may also, in response to a determination that the ROP metric exceeds the threshold, provide a ROP attack notification.

    摘要翻译： 在一个实施例中，处理器包括至少一个执行单元和返回定向编程（ROP）检测逻辑。 ROP检测逻辑可以基于多个控制传送事件来确定ROP度量。 ROP检测逻辑还可以确定ROP度量是否超过阈值。 ROP检测逻辑还可以响应于ROP度量超过阈值的确定，提供ROP攻击通知。

    Analog Testing of Ring Oscillators Using Built-In Self Test Apparatus
    9.
    发明申请
    Analog Testing of Ring Oscillators Using Built-In Self Test Apparatus 失效
    使用内置自检装置的环形振荡器的模拟测试

    公开(公告)号：US20090210760A1

    公开(公告)日：2009-08-20

    申请号：US12032649

    申请日：2008-02-16

    申请人： Joseph E. Eckelman ,  Kevin C. Gotze ,  James A. Kyle ,  Jennifer Yuk Sim Yan

    发明人： Joseph E. Eckelman ,  Kevin C. Gotze ,  James A. Kyle ,  Jennifer Yuk Sim Yan

    IPC分类号： G01R31/3181

    CPC分类号： G01R31/318502 ,  G01R31/2824 ,  G01R31/2884 ,  G01R31/31727

    摘要： System-accessible frequency measuring circuits and procedures permit on-chip testing of the oscillators and provide test results observable off chip via LSSD scan paths. This allows a rapid ensemble of ring oscillators in a standard ASIC test flow without the need for on chip analog test equipment (the test apparatus has effectively been created on device and can be digitally configured, operated and read). Frequency measuring logic that can 1) functionally operate to measure the frequency of the ring oscillators; 2) participate in traditional logical tests such as LSSD and LBIST to verify that the circuit is manufactured correctly and is likely to operate and 3) operate in a special ring-oscillator test mode, that allows the logic to operate on a tester very similarly to the way it does functionally. In this mode, the frequency measuring logic can be scanned to a specific state, started by pulsing a digital I/O, and the measured analog value can be scanned out sometime later after the test has completed. Test interrogations are distributed on-chip through an LSSD shift register chain to individually evaluate each of a plurality of the oscillators.

    摘要翻译： 系统可访问的频率测量电路和程序允许对振荡器进行片上测试，并通过LSSD扫描路径提供可观察到的芯片外的测试结果。 这允许在标准ASIC测试流程中快速地组合环形振荡器，而不需要片上模拟测试设备（测试设备已经在设备上有效地创建并且可以被数字地配置，操作和读取）。 频率测量逻辑，可以1）功能操作来测量环形振荡器的频率; 2）参与传统的逻辑测试，如LSSD和LBIST，以验证电路是否正确制造，并且可能运行，以及3）以特殊的环形振荡器测试模式工作，这允许逻辑在测试仪上工作，非常类似于 它在功能上的方式。 在这种模式下，频率测量逻辑可以被扫描到一个特定的状态，通过脉冲数字I / O开始，测量的模拟值可以在测试完成后的某个时间被扫描出来。 测试询问通过LSSD移位寄存器链在芯片上分布，以分别评估多个振荡器中的每一个。

    SECURE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING
    10.
    发明申请
    SECURE PROVISIONING OF SECRET KEYS DURING INTEGRATED CIRCUIT MANUFACTURING 有权
    在集成电路制造过程中安全提供秘密钥匙

    公开(公告)号：US20140093074A1

    公开(公告)日：2014-04-03

    申请号：US13631512

    申请日：2012-09-28

    申请人： Kevin C. Gotze ,  Gregory M. Iovino ,  Jiangtao Li

    发明人： Kevin C. Gotze ,  Gregory M. Iovino ,  Jiangtao Li

    IPC分类号： H04L9/00

    CPC分类号： H04L9/0866 ,  H04L9/3278

    摘要： A method, of an aspect, includes challenging a set of Physically Unclonable Function (PUF) cells, of an integrated circuit device, and receiving a set of PUF bits from the PUF cells in response. A PUF key is generated based on the set of PUF bits. An encryption of the PUF key with an embedded key is output from the integrated circuit device. The integrated circuit device receives an encryption of a fuse key with the PUF key. Fuses of the integrated circuit device are programmed with at least one of the fuse key and the received encryption of the fuse key with the PUF key. Other methods, apparatus, and systems are also disclosed.

    摘要翻译： 一方面的方法包括挑战集成电路设备的一组物理不可克隆功能（PUF）单元，以及响应于从PUF单元接收一组PUF位。 基于PUF位的集合生成PUF密钥。 从集成电路设备输出使用嵌入式密钥对PUF密钥的加密。 集成电路装置利用PUF键接收熔丝钥匙的加密。 集成电路装置的保险丝用熔丝钥匙和熔丝钥匙的接收加密中的至少一个与PUF密钥进行编程。 还公开了其它方法，装置和系统。