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公开(公告)号：US06744093B2
公开(公告)日：2004-06-01
申请号：US09930958
申请日：2001-08-17
IPC分类号： H01L31119
CPC分类号： H01L27/11502 , H01G4/008 , H01G4/33 , H01L27/10852 , H01L27/11507 , H01L28/55 , H01L28/65 , H01L28/75 , H01L28/91
摘要： A ferroelectric or high dielectric constant capacitor having a multilayer lower electrode comprising at least two layers—a platinum layer and a platinum-rhodium layer—for use in a random access memory (RAM) cell. The platinum layer of the lower electrode adjoins the capacitor dielectric, which is a ferroelectric or high dielectric constant dielectric such as BST, PZT, SBT or tantalum pentoxide. The platinum-rhodium layer serves as an oxidation barrier and may also act as an adhesion layer for preventing separation of the lower electrode from the substrate, thereby improving capacitor performance. The multilayer electrode may have titanium and/or titanium nitride layers under the platinum-rhodium layer for certain applications. The capacitor has an upper electrode which may be a conventional electrode or which may have a multilayer structure similar to that of the lower electrode. Processes for manufacturing the multilayer lower electrode and the capacitor are also disclosed.
摘要翻译： 一种铁电或高介电常数电容器，其具有包括至少两层的多层下电极 - 铂层和铂 - 铑层，用于随机存取存储器（RAM）单元。 下电极的铂层与电容器电介质接触，电容器电介质是铁电或高介电常数电介质，如BST，PZT，SBT或五氧化二钽。 铂 - 铑层用作氧化屏障，并且还可以用作防止下电极与衬底分离的粘合层，从而提高电容器性能。 对于某些应用，多层电极可以在铂 - 铑层下方具有钛和/或氮化钛层。 电容器具有可以是常规电极的上电极，或者可以具有与下电极类似的多层结构。 还公开了用于制造多层下电极和电容器的工艺。
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2.发明授权Multilayer electrode for ferroelectric and high dielectric constant capacitors 失效用于铁电和高介电常数电容器的多层电极公开(公告)号：US06297527B1
公开(公告)日：2001-10-02
申请号：US09310408
申请日：1999-05-12
IPC分类号： H01L31119
CPC分类号： H01L27/11502 , H01G4/008 , H01G4/33 , H01L27/10852 , H01L27/11507 , H01L28/55 , H01L28/65 , H01L28/75 , H01L28/91
摘要： A ferroelectric or high dielectric constant capacitor having a multilayer lower electrode comprising at least two layers—a platinum layer and a platinum-rhodium layer—for use in a random access memory (RAM) cell. The platinum layer of the lower electrode adjoins the capacitor dielectric, which is a ferroelectric or high dielectric constant dielectric such as BST, PZT, SBT or tantalum pentoxide. The platinum-rhodium layer serves as an oxidation barrier and may also act as an adhesion layer for preventing separation of the lower electrode from the substrate, thereby improving capacitor performance. The multilayer electrode may have titanium and/or titanium nitride layers under the platinum-rhodium layer for certain applications. The capacitor has an upper electrode which may be a conventional electrode or which may have a multilayer structure similar to that of the lower electrode. Processes for manufacturing the multilayer lower electrode and the capacitor are also disclosed.
摘要翻译： 一种铁电或高介电常数电容器，其具有包括至少两层的多层下电极 - 铂层和铂 - 铑层，用于随机存取存储器（RAM）单元。 下电极的铂层与电容器电介质接触，电容器电介质是铁电或高介电常数电介质，如BST，PZT，SBT或五氧化二钽。 铂 - 铑层用作氧化屏障，并且还可以用作防止下电极与衬底分离的粘合层，从而提高电容器性能。 对于某些应用，多层电极可以在铂 - 铑层下方具有钛和/或氮化钛层。 电容器具有可以是常规电极的上电极，或者可以具有与下电极类似的多层结构。 还公开了用于制造多层下电极和电容器的工艺。
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公开(公告)号：US06746916B2
公开(公告)日：2004-06-08
申请号：US10233590
申请日：2002-09-04
IPC分类号： H01L218242
CPC分类号： H01L27/11502 , H01G4/008 , H01G4/33 , H01L27/10852 , H01L27/11507 , H01L28/55 , H01L28/65 , H01L28/75 , H01L28/91
摘要： A ferroelectric or high dielectric constant capacitor having a multilayer lower electrode comprising at least two layers—a platinum layer and a platinum-rhodium layer—for use in a random access memory (RAM) cell is disclosed. The platinum layer of the lower electrode is formed such that it adjoins the capacitor dielectric, which is a ferroelectric or high dielectric constant dielectric such as BST, PZT, SBT or tantalum pentoxide. The platinum-rhodium layer serves as an oxidation barrier and may also act as an adhesion layer for preventing separation of the lower electrode from the substrate, thereby improving capacitor performance. The multilayer electrode may have titanium and/or titanium nitride layers under the platinum-rhodium layer for certain applications. The capacitor has an upper electrode which may be a conventional electrode or which may have a multilayer structure similar to that of the lower electrode.
摘要翻译： 公开了一种用于随机存取存储器（RAM）单元的具有包括至少两层的多层下电极 - 铂层和铂 - 铑层的铁电或高介电常数电容器。 下电极的铂层形成为与电容电介质接触，电容器电介质是铁电或高介电常数电介质，例如BST，PZT，SBT或五氧化二钽。 铂 - 铑层用作氧化屏障，并且还可以用作防止下电极与衬底分离的粘合层，从而提高电容器性能。 对于某些应用，多层电极可以在铂 - 铑层下方具有钛和/或氮化钛层。 电容器具有可以是常规电极的上电极，或者可以具有与下电极类似的多层结构。
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公开(公告)号：US06900497B2
公开(公告)日：2005-05-31
申请号：US10792762
申请日：2004-03-05
IPC分类号： H01G4/008 , H01G4/33 , H01L21/00 , H01L21/02 , H01L21/8242 , H01L21/8246 , H01L27/108 , H01L27/115 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/11502 , H01G4/008 , H01G4/33 , H01L27/10852 , H01L27/11507 , H01L28/55 , H01L28/65 , H01L28/75 , H01L28/91
摘要： A ferroelectric or high dielectric constant capacitor having a multilayer lower electrode comprising at least two layers—a platinum layer and a platinum-rhodium layer—for use in a random access memory (RAM) cell. The platinum layer of the lower electrode adjoins the capacitor dielectric, which is a ferroelectric or high dielectric constant dielectric such as BST, PZT, SBT or tantalum pentoxide. The platinum-rhodium layer serves as an oxidation barrier and may also act as an adhesion layer for preventing separation of the lower electrode from the substrate, thereby improving capacitor performance. The multilayer electrode may have titanium and/or titanium nitride layers under the platinum-rhodium layer for certain applications. The capacitor has an upper electrode which may be a conventional electrode or which may have a multilayer structure similar to that of the lower electrode. Processes for manufacturing the multilayer lower electrode and the capacitor are also disclosed.
摘要翻译： 一种铁电或高介电常数电容器，其具有包括至少两层的多层下电极 - 铂层和铂 - 铑层，用于随机存取存储器（RAM）单元。 下电极的铂层与电容器电介质接触，电容器电介质是铁电或高介电常数电介质，如BST，PZT，SBT或五氧化二钽。 铂 - 铑层用作氧化屏障，并且还可以用作防止下电极与衬底分离的粘合层，从而提高电容器性能。 对于某些应用，多层电极可以在铂 - 铑层下方具有钛和/或氮化钛层。 电容器具有可以是常规电极的上电极，或者可以具有与下电极类似的多层结构。 还公开了用于制造多层下电极和电容器的工艺。
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公开(公告)号：US06777739B2
公开(公告)日：2004-08-17
申请号：US09930960
申请日：2001-08-17
IPC分类号： H01L31119
CPC分类号： H01L27/11502 , H01G4/008 , H01G4/33 , H01L27/10852 , H01L27/11507 , H01L28/55 , H01L28/65 , H01L28/75 , H01L28/91
摘要： A ferroelectric or high dielectric constant capacitor having a multilayer lower electrode comprising at least two layers—a platinum layer and a platinum-rhodium layer—for use in a random access memory (RAM) cell. The platinum layer of the lower electrode adjoins the capacitor dielectric, which is a ferroelectric or high dielectric constant dielectric such as BST, PZT, SBT or tantalum pentoxide. The platinum-rhodium layer serves as an oxidation barrier and may also act as an adhesion layer for preventing separation of the lower electrode from the substrate, thereby improving capacitor performance. The multilayer electrode may have titanium and/or titanium nitride layers under the platinum-rhodium layer for certain applications. The capacitor has an upper electrode which may be a conventional electrode or which may have a multilayer structure similar to that of the lower electrode. Processes for manufacturing the multilayer lower electrode and the capacitor are also disclosed.
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公开(公告)号：US06890596B2
公开(公告)日：2005-05-10
申请号：US10222304
申请日：2002-08-15
申请人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
发明人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
IPC分类号： C23C16/44 , C23C16/455 , C23C16/04
CPC分类号： C23C16/45519 , C23C16/4401 , C23C16/455
摘要： A deposition method includes positioning a substrate within a deposition chamber defined at least in part by chamber walls. At least one of the chamber walls comprises a chamber surface having a plurality of purge gas inlets to the chamber therein. A process gas is provided over the substrate effective to deposit a layer onto the substrate. During such providing, a material adheres to the chamber surface. Reactive purge gas is emitted to the deposition chamber from the purge gas inlets effective to form a reactive gas curtain over the chamber surface and away from the substrate, with such reactive gas reacting with such adhering material. Further implementations are contemplated.
摘要翻译： 沉积方法包括将基板定位在至少部分地由室壁限定的沉积室内。 所述室壁中的至少一个包括腔室表面，其中具有多个吹扫气体入口。 在衬底上设置工艺气体，有效地将层沉积到衬底上。 在这种提供过程中，材料粘附到室表面。 反应性净化气体从吹扫气体入口排出到沉积室，有效地在室表面上形成反应性气体帘幕并远离衬底，这种反应性气体与这种粘附材料反应。 考虑进一步的实现。
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公开(公告)号：US07271053B2
公开(公告)日：2007-09-18
申请号：US11050088
申请日：2005-02-03
IPC分类号： H01L21/8242
摘要： A method of forming a capacitor includes forming a first conductive capacitor electrode layer over a substrate. The first electrode layer has an outer surface comprising a noble metal in at least one of elemental and alloy forms. A gaseous mixture comprising a metallorganic deposition precursor and an organic solvent is fed to the outer surface under conditions effective to deposit a capacitor dielectric layer onto the outer surface. A conductive capacitor electrode layer is formed over the capacitor dielectric layer. A method of forming an electronic device includes forming a conductive layer over a substrate. The conductive layer has an outer surface comprising a noble metal in at least one of elemental and alloy forms. A gaseous mixture comprising a metallorganic deposition precursor and an organic solvent is fed to the outer surface under conditions effective to deposit a dielectric layer onto the outer surface.
摘要翻译： 形成电容器的方法包括在衬底上形成第一导电电容器电极层。 第一电极层具有包含元素和合金形式中的至少一种的贵金属的外表面。 包含金属有机物沉积前体和有机溶剂的气体混合物在有效地将电容器介电层沉积到外表面上的条件下进料至外表面。 在电容器电介质层上形成导电电容电极层。 形成电子器件的方法包括在衬底上形成导电层。 导电层具有包含元素和合金形式中的至少一种的贵金属的外表面。 将包含金属有机物沉积前体和有机溶剂的气体混合物在有效地将介电层沉积到外表面上的条件下进料至外表面。
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公开(公告)号：US06753271B2
公开(公告)日：2004-06-22
申请号：US10222282
申请日：2002-08-15
申请人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
发明人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
IPC分类号： H01L2144
CPC分类号： H01L21/32051 , C23C16/4404 , C23C16/4405 , C23C16/45531 , C23C16/45534 , H01L21/02178 , H01L21/02186 , H01L21/0228 , H01L21/28562 , H01L21/3141 , H01L21/31616
摘要： The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.
摘要翻译： 本发明包括在基板上形成沉积的组合物层的原子层沉积方法。 该方法包括将半导体衬底定位在原子层沉积室内。 在基材上形成中间组合物单层，随后是与中间体组合物反应所需的沉积组合物，统称为将多种不同的组合物沉积前体流到沉积室内的基底。 材料粘附到室内部件表面，从而依次形成。 在这种顺序形成之后，反应性气体流入到与多种不同的沉积前体不同的组合物中，并有效地与这种粘附材料反应。 在反应气体流动之后，重复这种顺序形成。 考虑进一步的实现。
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公开(公告)号：US07498057B2
公开(公告)日：2009-03-03
申请号：US11075017
申请日：2005-03-08
申请人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
发明人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
IPC分类号： C23C16/04
CPC分类号： C23C16/45519 , C23C16/4401 , C23C16/455
摘要： A deposition method includes positioning a substrate within a deposition chamber defined at least in part by chamber walls. At least one of the chamber walls comprises a chamber surface having a plurality of purge gas inlets to the chamber therein. A process gas is provided over the substrate effective to deposit a layer onto the substrate. During such providing, a material adheres to the chamber surface. Reactive purge gas is emitted to the deposition chamber from the purge gas inlets effective to form a reactive gas curtain over the chamber surface and away from the substrate, with such reactive gas reacting with such adhering material. Further implementations are contemplated.
摘要翻译： 沉积方法包括将基板定位在至少部分地由室壁限定的沉积室内。 所述室壁中的至少一个包括腔室表面，其中具有多个吹扫气体入口。 在衬底上设置工艺气体，有效地将层沉积到衬底上。 在这种提供过程中，材料粘附到室表面。 反应性净化气体从吹扫气体入口排出到沉积室，有效地在室表面上形成反应性气体帘幕并远离衬底，这种反应性气体与这种粘附材料反应。 考虑进一步的实现。
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公开(公告)号：US20080241386A1
公开(公告)日：2008-10-02
申请号：US12115412
申请日：2008-05-05
申请人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
发明人： Demetrius Sarigiannis , Garo J. Derderian , Cem Basceri , Gurtej S. Sandhu , F. Daniel Gealy , Chris M. Carlson
IPC分类号： C23C16/08
CPC分类号： H01L21/32051 , C23C16/4404 , C23C16/4405 , C23C16/45531 , C23C16/45534 , H01L21/02178 , H01L21/02186 , H01L21/0228 , H01L21/28562 , H01L21/3141 , H01L21/31616
摘要： The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic layer deposition chamber. On the substrate, an intermediate composition monolayer is formed, followed by a desired deposited composition from reaction with the intermediate composition, collectively from flowing multiple different composition deposition precursors to the substrate within the deposition chamber. A material adheres to a chamber internal component surface from such sequentially forming. After such sequentially forming, a reactive gas flows to the chamber which is different in composition from the multiple different deposition precursors and which is effective to react with such adhering material. After the reactive gas flowing, such sequentially forming is repeated. Further implementations are contemplated.
摘要翻译： 本发明包括在基板上形成沉积的组合物层的原子层沉积方法。 该方法包括将半导体衬底定位在原子层沉积室内。 在基材上形成中间体组合物单层，随后是与中间体组合物反应所需的沉积组合物，共同地将多个不同的组合物沉积前体流入沉积室内的基底。 材料粘附到室内部件表面，从而依次形成。 在这种顺序形成之后，反应性气体流入到与多种不同的沉积前体不同的组合物中，并有效地与这种粘附材料反应。 在反应气体流动之后，重复这种顺序形成。 考虑进一步的实现。
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