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    Output gain stage for a power amplifier
    1.
    发明授权
    Output gain stage for a power amplifier 有权
    功率放大器的输出增益级

    公开(公告)号：US07768350B2

    公开(公告)日：2010-08-03

    申请号：US12317819

    申请日：2008-12-30

    Applicant: Vishnu Srinivasan ,  David E. Bockelman

    Inventor： Vishnu Srinivasan ,  David E. Bockelman

    IPC: H03F3/45

    CPC classification number: H03F3/45183 ,  H03F3/211 ,  H03F2200/537

    Abstract: In one embodiment, the present invention includes multiple gain stages to receive and amplify a differential input signal at different common mode voltages. The stages each may include a pair of linear NMOS gain transistors coupled to a primary coil of a given output transformer. One of the stages may include commonly coupled terminals coupled to a center tap of the primary coil of an output transformer of another stage, and a supply current provided to one of the stages is re-used for the other stage(s).

    Abstract translation: 在一个实施例中，本发明包括多个增益级，以在不同的共模电压下接收和放大差分输入信号。 这些级可以包括耦合到给定输出变压器的初级线圈的一对线性NMOS增益晶体管。 一个级可以包括耦合到另一级的输出变压器的初级线圈的中心抽头的共同耦合的端子，并且提供给一个级的电源电流被重新用于其它级。

    PARTITIONING OF RADIO-FREQUENCY APPARATUS
    4.
    发明申请
    PARTITIONING OF RADIO-FREQUENCY APPARATUS 有权
    无线电频率设备的分配

    公开(公告)号：US20070054629A1

    公开(公告)日：2007-03-08

    申请号：US10730404

    申请日：2003-12-08

    Applicant: James Maligeorgos ,  Augusto Marques ,  Lysander Lim ,  G. Tuttle ,  Aslamali Rafi ,  Tod Paulus ,  Gregory Uehara ,  Jeffrey Scott ,  Richard Behrens ,  Donald Kerth ,  G. Vishakhadatta ,  Vishnu Srinivasan ,  Caiyi Wang

    Inventor： James Maligeorgos ,  Augusto Marques ,  Lysander Lim ,  G. Tuttle ,  Aslamali Rafi ,  Tod Paulus ,  Gregory Uehara ,  Jeffrey Scott ,  Richard Behrens ,  Donald Kerth ,  G. Vishakhadatta ,  Vishnu Srinivasan ,  Caiyi Wang

    IPC: H04B1/38

    CPC classification number: H04B1/30 ,  H03J2200/10 ,  H04L27/0002

    Abstract: Components of a radio-frequency (RF) apparatus including transceiver circuitry and frequency modification circuitry of a crystal oscillator circuit that generates a reference signal with adjustable frequency may be partitioned in a variety of ways, for example, as one or more separate integrated circuits. The frequency modification circuitry may be implemented as part of a crystal oscillator circuit that includes digitally controlled crystal oscillator (“DCXO”) circuitry and a crystal. The frequency modification circuitry may include at least one variable capacitance device and may be employed to generate a reference signal with adjustable frequency. The adjustable reference signal may be provided to other components of the RF apparatus and/or the RF apparatus may be configured to provide the adjustable reference signal to baseband processor circuitry. Automatic frequency control (AFC) circuitry may be integrated with other components of RF circuitry and may generate frequency control signals for the frequency modification circuitry based on, for example, a signal received from a temperature sensor. Digital-to-analog converter (DAC) circuitry may be integrated with other components of RF circuitry to enable all-digital frequency control communications from baseband processor circuitry to RF circuitry.

    Abstract translation: 包括生成具有可变频率的参考信号的晶体振荡器电路的收发器电路和频率修改电路的射频（RF）设备的组件可以以各种方式被划分，例如作为一个或多个单独的集成电路。 频率修改电路可以被实现为包括数字控制的晶体振荡器（“DCXO”）电路和晶体的晶体振荡器电路的一部分。 频率修改电路可以包括至少一个可变电容器件，并且可以用于产生具有可调频率的参考信号。 可调参考信号可以被提供给RF装置的其他部件，和/或RF装置可以被配置为向基带处理器电路提供可调参考信号。 自动频率控制（AFC）电路可以与RF电路的其它组件集成，并且可以基于例如从温度传感器接收的信号来生成用于频率修改电路的频率控制信号。 数模转换器（DAC）电路可以与RF电路的其他部件集成，以实现从基带处理器电路到RF电路的全数字频率控制通信。

    NON-LINEAR CAPACITANCE COMPENSATION
    5.
    发明申请
    NON-LINEAR CAPACITANCE COMPENSATION 有权
    非线性电容补偿

    公开(公告)号：US20110074509A1

    公开(公告)日：2011-03-31

    申请号：US12889890

    申请日：2010-09-24

    Applicant: ANIL SAMAVEDAM ,  David E. Bockelman ,  Vishnu Srinivasan ,  Eric Kimball

    Inventor： ANIL SAMAVEDAM ,  David E. Bockelman ,  Vishnu Srinivasan ,  Eric Kimball

    IPC: H03F3/45 ,  H03F3/60

    CPC classification number: H03G3/00 ,  H03F1/086 ,  H03F1/14 ,  H03F3/19 ,  H03F3/245 ,  H03F3/3022 ,  H03F2200/451 ,  H03F2203/30144

    Abstract: Embodiments are directed to capacitance compensation via a compensation device coupled to a gain device to compensate for a capacitance change occurring due to an input signal change, along with a controller coupled to the compensation device to receive the input signal and to control an amount of compensation based on the input signal. In some embodiments, banks may be formed of multiple compensation devices, where each of the banks has a different size and is coupled to receive a different set of bias voltages.

    Abstract translation: 实施例涉及通过耦合到增益器件的补偿器件的电容补偿，以补偿由于输入信号变化而发生的电容变化，连同耦合到补偿器件的控制器接收输入信号并控制补偿量 基于输入信号。 在一些实施例中，存储体可以由多个补偿装置形成，其中每个存储体具有不同的尺寸并被耦合以接收不同的一组偏置电压。

    Generating A Process And Temperature Tracking Bias Voltage
    6.
    发明申请
    Generating A Process And Temperature Tracking Bias Voltage 有权
    生成工艺和温度跟踪偏置电压

    公开(公告)号：US20100085119A1

    公开(公告)日：2010-04-08

    申请号：US12578838

    申请日：2009-10-14

    Applicant: Anil Samavedam ,  David E. Bockelman ,  Vishnu Srinivasan

    Inventor： Anil Samavedam ,  David E. Bockelman ,  Vishnu Srinivasan

    IPC: H03G3/10

    CPC classification number: H03F1/3205 ,  H03F1/301 ,  H03F3/19 ,  H03F3/245 ,  H03F3/3022 ,  H03F2200/447 ,  H03F2200/451 ,  H03F2203/30144

    Abstract: In one embodiment, a method includes generating a current that is proportional to a mobility and an oxide capacitance of a tracking device and independent of a threshold voltage variation of the tracking device, generating a voltage from the current, and providing the voltage as at least part of a bias voltage for another device. In one embodiment, this other device may be a compensation circuit coupled to a main device to compensate for capacitance non-linearity of the main device.

    Abstract translation: 在一个实施例中，一种方法包括产生与跟踪装置的迁移率和氧化物电容成比例的电流，并且不依赖于跟踪装置的阈值电压变化，从电流产生电压，并将电压提供至少 另一个器件偏置电压的一部分。 在一个实施例中，该另一个器件可以是耦合到主器件的补偿电路，以补偿主器件的电容非线性。

    System and method for preventing performance degradation in communication circuitry
    8.
    发明申请
    System and method for preventing performance degradation in communication circuitry 审中-公开
    防止通信电路性能下降的系统和方法

    公开(公告)号：US20070060066A1

    公开(公告)日：2007-03-15

    申请号：US11226837

    申请日：2005-09-14

    Applicant: Vishnu Srinivasan

    Inventor： Vishnu Srinivasan

    IPC: H04Q7/32

    CPC classification number: H04B1/525 ,  H04B1/406

    Abstract: A system comprising first interface circuitry that includes a first input pad of first receiver circuitry, and control circuitry configured to operate the first interface circuitry in a first mode to prevent the first receiver circuitry from receiving a first signal using the first input pad and a second mode to allow the first receiver circuitry to receive a second signal using the first input pad is provided.

    Abstract translation: 一种包括第一接口电路的系统，包括第一接收器电路的第一输入焊盘，以及配置成以第一模式操作第一接口电路的控制电路，以防止第一接收器电路使用第一输入焊盘接收第一信号， 提供允许第一接收机电路使用第一输入焊盘接收第二信号的模式。

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