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公开(公告)号:US20230173720A1
公开(公告)日:2023-06-08
申请号:US17540371
申请日:2021-12-02
发明人: Xianlu Cui , Junrong Yan , CK Chin , Tao Shi
IPC分类号: B29C43/58 , H01L21/56 , B29C43/18 , G05B19/4097
CPC分类号: B29C43/58 , H01L21/561 , B29C43/18 , G05B19/4097 , H01L25/18
摘要: A molding compound dispensing system identifies a semiconductor device strip having a substrate with a plurality of segments allocated for die stacks. The system obtains topological data of the identified semiconductor device strip for each of the segments, including data indicative of any semiconductor components in each respective segment. The system determines an amount of molding compound to be applied to each of the segments based on the topological data for each respective segment, and causes a molding compound dispenser to dispense the determined amounts of molding compound at each of the segments.
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公开(公告)号:US20210366875A1
公开(公告)日:2021-11-25
申请号:US17137990
申请日:2020-12-30
发明人: Xiaofeng Di , Junrong Yan , CheeKeong Chin , Weili Wang , Xin Lu , Qi Deng , Chaur Yang Ng , Cong Zhang , Chenlin Yang , Chin-Tien Chiu
IPC分类号: H01L25/065 , H01L23/00
摘要: A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.
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公开(公告)号:US11901327B2
公开(公告)日:2024-02-13
申请号:US17186715
申请日:2021-02-26
发明人: Yang Lei , Xiaofeng Di , Yuyun Lou , Zhonghua Qian , Junrong Yan
IPC分类号: H01L23/00
CPC分类号: H01L24/48 , H01L24/04 , H01L24/78 , H01L24/85 , H01L2224/04042 , H01L2224/4805 , H01L2224/4807 , H01L2224/4845 , H01L2224/48451 , H01L2224/48453 , H01L2224/48463 , H01L2224/48482 , H01L2224/7895 , H01L2224/8503 , H01L2924/381
摘要: A semiconductor device includes an integrated circuit die having bond pads and a bond wires. The bond wires are connected to respective ones of the bond pads by a ball bond. An area of contact between the ball bond and the bond pad has a predetermined shape that is non-circular and includes at least one axis of symmetry. A ratio of the ball bond length to the ball bond width may be equal to a ratio of the bond pad length to the bond pad width.
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公开(公告)号:US20230411169A1
公开(公告)日:2023-12-21
申请号:US17841357
申请日:2022-06-15
发明人: Yi Wu , Junrong Yan , Zhonghua Qian , Keming Zhou , Kailei Zhang
IPC分类号: H01L21/463 , H01L21/687
CPC分类号: H01L21/463 , H01L21/68764
摘要: A method includes the step of thinning a semiconductor wafer by a horizontal stealth lasing process, and semiconductor wafers, dies and devices formed thereby. After formation of an integrated circuit layer on a semiconductor wafer, the wafer may be thinned by supporting an active surface of the wafer on a rotating chuck, and focusing a horizontally-oriented laser in multiple cycles at different radii within the rotating wafer. Upon completion of the multiple cycles, a portion of the wafer substrate may be removed, leaving the wafer thinned to its final thickness. Thereafter, a vertical stealth lasing process may be performed to cut individual semicondcutor dies from the thinned wafer.
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公开(公告)号:US20200335481A1
公开(公告)日:2020-10-22
申请号:US16821860
申请日:2020-03-17
发明人: Junrong Yan , Chee Keong Chin , Xin Lu
IPC分类号: H01L25/065 , H01L21/67 , H01L21/50
摘要: A process includes forming one or more apertures on a component backside, creating a vacuum in a mold chase, and engaging the component backside with a mold compound in the mold chase. The one or more apertures form an aperture structure. The aperture structure may include multiple apertures parallel or orthogonal to each other. The apertures have an aperture width, aperture depth, and aperture pitch. These characteristics may be altered to minimize the likelihood of trapped air remaining after creating the vacuum in the mold chase.
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公开(公告)号:US11756932B2
公开(公告)日:2023-09-12
申请号:US17107838
申请日:2020-11-30
发明人: Xianlu Cui , Junrong Yan , Cheekeong Chin , Zhonghua Qian
IPC分类号: H01L25/065 , H01L25/00 , H01L23/00
CPC分类号: H01L25/0657 , H01L23/562 , H01L25/50 , H01L2225/06506 , H01L2225/06517 , H01L2225/06548 , H01L2225/06562 , H01L2225/06572 , H01L2225/06582
摘要: A semiconductor device package includes a mechanical support structure that provides mechanical support to a stack of dies, where the dies are laterally offset from each other. The support structure has a sloped surface that is disposed at a non-perpendicular and non-parallel angle to other surfaces of the mechanical support structure. Electrical contacts are disposed on the sloped surface of the mechanical support structure for electrically interfacing with the stacked dies and on a different surface of the mechanical support structure for electrically interfacing with a substrate.
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公开(公告)号:US11749647B2
公开(公告)日:2023-09-05
申请号:US17137990
申请日:2020-12-30
发明人: Xiaofeng Di , Junrong Yan , CheeKeong Chin , Weili Wang , Xin Lu , Qi Deng , Chaur Yang Ng , Cong Zhang , Chenlin Yang , Chin-Tien Chiu
IPC分类号: H01L25/065 , H01L23/00
CPC分类号: H01L25/0657 , H01L24/48 , H01L2224/4845 , H01L2224/48227 , H01L2224/48455 , H01L2225/06506 , H01L2225/06562
摘要: A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.
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公开(公告)号:US20220375899A1
公开(公告)日:2022-11-24
申请号:US17328013
申请日:2021-05-24
发明人: Xianlu Cui , Junrong Yan , Wei Liu , Zhonghua Qian
IPC分类号: H01L25/065 , H01L23/00 , H01L23/498 , H01L23/538
摘要: A semiconductor device is vertically mounted on a medium such as a printed circuit board (PCB). The semiconductor device comprises a block of semiconductor dies, mounted in a vertical stack without offset. Once formed and encapsulated, side grooves may be formed in the device exposing electrical conductors of each die within the device. The electrical conductors exposed in the grooves mount to electrical contacts on the medium to electrically couple the semiconductor device to the medium.
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公开(公告)号:US11289395B2
公开(公告)日:2022-03-29
申请号:US16821860
申请日:2020-03-17
发明人: Junrong Yan , Chee Keong Chin , Xin Lu
IPC分类号: H01L23/31 , H01L25/065 , H01L21/50 , H01L21/67
摘要: A process includes forming one or more apertures on a component backside, creating a vacuum in a mold chase, and engaging the component backside with a mold compound in the mold chase. The one or more apertures form an aperture structure. The aperture structure may include multiple apertures parallel or orthogonal to each other. The apertures have an aperture width, aperture depth, and aperture pitch. These characteristics may be altered to minimize the likelihood of trapped air remaining after creating the vacuum in the mold chase.
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公开(公告)号:US20200381401A1
公开(公告)日:2020-12-03
申请号:US16814761
申请日:2020-03-10
发明人: Junrong Yan , Jianming Zhang , Min Zhao , Kailei Zhang , Chee Keong Chin , Kim Lee Bock
IPC分类号: H01L25/065 , H01L23/00
摘要: A semiconductor device is disclosed including a die stack including a number of dies aligned with each other with respect to an axis, and a top die that is offset along the axis the to prevent die cracking.
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