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    Redundant hardware system for autonomous vehicles
    3.
    发明授权
    Redundant hardware system for autonomous vehicles 有权

    公开(公告)号：US11208111B2

    公开(公告)日：2021-12-28

    申请号：US16215713

    申请日：2018-12-11

    申请人： Waymo LLC

    发明人： Emily Chi ,  Ryan Joseph Andrade ,  Andreas Wendel ,  Michael James ,  Christian Lauterbach ,  Etai Bruhis ,  Christopher Kennedy Ludwick ,  Alexander Zbrozek ,  Pieter Kapsenberg ,  Zhuyuan Liu ,  Daniel Rosenband

    IPC分类号： B60W10/04 ,  B60W10/20 ,  B60W50/02 ,  B60W50/029 ,  G05D1/00

    摘要： The technology relates to partially redundant equipment architectures for vehicles able to operate in an autonomous driving mode. Aspects of the technology employ fallback configurations, such as two or more fallback sensor configurations that provide some minimum amount of field of view (FOV) around the vehicle. For instance, different sensor arrangements are logically associated with different operating domains of the vehicle. Fallback configurations for computing resources and/or power resources are also provided. Each fallback configuration may have different reasons for being triggered, and may result in different types of fallback modes of operation. Triggering conditions may relate, e.g., to a type of failure, fault or other reduction in component capability, the current driving mode, environmental conditions in the vicinity of vehicle or along a planned route, or other factors. Fallback modes may involve altering a previously planned trajectory, altering vehicle speed, and/or altering a destination of the vehicle.

    System and method for low latency communication
    5.
    发明授权
    System and method for low latency communication 有权

    公开(公告)号：US10210099B1

    公开(公告)日：2019-02-19

    申请号：US15883143

    申请日：2018-01-30

    申请人： Waymo LLC

    发明人： Grace Nordin ,  Daniel Rosenband

    IPC分类号： G06F12/12 ,  G06F12/121 ,  G06F12/0891

    摘要： A system and method for low latency and higher bandwidth communication between a central processing unit (CPU) and an accelerator is disclosed. When the CPU updates a copy of data stored at a shared memory, the CPU also sends an “invalidate” command to a cache coherent interconnect (CCI). The CCI forwards the invalidate command to a dedicated cache register (DCR). The DCR marks its copy of the data as “out-of-date” and requests an up-to-date copy of the data from the CCI. The CCI then retrieves up-to-date data for the DCR. When the DCR receives the up-to-date data from the CCI, the DCR replaces the out-of-date data with the up-to-date data, and marks the up-to-date data with the status of “valid.” The DCR can then provide data to an accelerator with a status of “out-of-date” or “valid.”

    Redundant Hardware System For Autonomous Vehicles
    7.
    发明申请
    Redundant Hardware System For Autonomous Vehicles 审中-公开

    公开(公告)号：US20200180653A1

    公开(公告)日：2020-06-11

    申请号：US16215713

    申请日：2018-12-11

    申请人： Waymo LLC

    发明人： Emily Chi ,  Ryan Joseph Andrade ,  Andreas Wendel ,  Michael James ,  Christian Lauterbach ,  Etai Bruhis ,  Christopher Kennedy Ludwick ,  Alexander Zbrozek ,  Pieter Kapsenberg ,  Zhuyuan Liu ,  Daniel Rosenband

    IPC分类号： B60W50/029 ,  G05D1/00 ,  B60W10/04 ,  B60W10/20 ,  B60W50/02

    摘要： The technology relates to partially redundant equipment architectures for vehicles able to operate in an autonomous driving mode. Aspects of the technology employ fallback configurations, such as two or more fallback sensor configurations that provide some minimum amount of field of view (FOV) around the vehicle. For instance, different sensor arrangements are logically associated with different operating domains of the vehicle. Fallback configurations for computing resources and/or power resources are also provided. Each fallback configuration may have different reasons for being triggered, and may result in different types of fallback modes of operation. Triggering conditions may relate, e.g., to a type of failure, fault or other reduction in component capability, the current driving mode, environmental conditions in the vicinity of vehicle or along a planned route, or other factors. Fallback modes may involve altering a previously planned trajectory, altering vehicle speed, and/or altering a destination of the vehicle.

    Redundant Hardware System For Autonomous Vehicles
    8.
    发明申请
    Redundant Hardware System For Autonomous Vehicles 有权

    公开(公告)号：US20220080990A1

    公开(公告)日：2022-03-17

    申请号：US17531946

    申请日：2021-11-22

    申请人： Waymo LLC

    发明人： Emily Chi ,  Ryan Joseph Andrade ,  Andreas Wendel ,  Michael James ,  Christian Lauterbach ,  Etai Bruhis ,  Christopher Kennedy Ludwick ,  Alexander Zbrozek ,  Pieter Kapsenberg ,  Zhuyuan Liu ,  Daniel Rosenband

    IPC分类号： B60W50/029 ,  G05D1/00 ,  B60W10/04 ,  B60W10/20 ,  B60W50/02

    摘要： The technology relates to partially redundant equipment architectures for vehicles able to operate in an autonomous driving mode. Aspects of the technology employ fallback configurations, such as two or more fallback sensor configurations that provide some minimum amount of field of view (FOV) around the vehicle. For instance, different sensor arrangements are logically associated with different operating domains of the vehicle. Fallback configurations for computing resources and/or power resources are also provided. Each fallback configuration may have different reasons for being triggered, and may result in different types of fallback modes of operation. Triggering conditions may relate, e.g., to a type of failure, fault or other reduction in component capability, the current driving mode, environmental conditions in the vicinity of vehicle or along a planned route, or other factors. Fallback modes may involve altering a previously planned trajectory, altering vehicle speed, and/or altering a destination of the vehicle.

    System and method for low latency communication
    9.
    发明授权
    System and method for low latency communication 有权

    公开(公告)号：US09916259B1

    公开(公告)日：2018-03-13

    申请号：US15007944

    申请日：2016-01-27

    申请人： Waymo LLC

    发明人： Grace Nordin ,  Daniel Rosenband

    IPC分类号： G06F12/12 ,  G06F12/121 ,  G06F12/0891

    CPC分类号： G06F12/0815 ,  G06F9/00 ,  G06F12/084 ,  G06F2212/1024 ,  G06F2212/621 ,  G06F2212/69

    摘要： A system and method for low latency and higher bandwidth communication between a central processing unit (CPU) and an accelerator is disclosed. When the CPU updates a copy of data stored at a shared memory, the CPU also sends an “invalidate” command to a cache coherent interconnect (CCI). The CCI forwards the invalidate command to a dedicated cache register (DCR). The DCR marks its copy of the data as “out-of-date” and requests an up-to-date copy of the data from the CCI. The CCI then retrieves up-to-date data for the DCR. When the DCR receives the up-to-date data from the CCI, the DCR replaces the out-of-date data with the up-to-date data, and marks the up-to-date data with the status of “valid.” The DCR can then provide data to an accelerator with a status of “out-of-date” or “valid.”