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公开(公告)号：US06834360B2
公开(公告)日：2004-12-21
申请号：US09683091
申请日：2001-11-16
申请人： William D. Corti , Robert Kenny, Jr. , Joseph O. Marsh , Steven C. Parker , Frank X. Scanzano , Michael Won
发明人： William D. Corti , Robert Kenny, Jr. , Joseph O. Marsh , Steven C. Parker , Frank X. Scanzano , Michael Won
IPC分类号： G06F1100
CPC分类号： G06F11/3648 , G06F11/3636
摘要： An on-chip logic analysis (OCLA) system captures data processed by a signal processing logic core embedded in a single-chip-device (SOC) without interrupting operations of the signal processing logic core. The OCLA system includes a data capturing unit embedded in the SOC device to monitor the operations of the signal processing unit and determines whether the operations satisfy predetermined trigger conditions. Once the trigger condition is satisfied, the data capturing unit captures internal data from/to the signal processing unit and transfers to an external host system. The host system controls the operations of the data capturing unit. The host system provides the captured data to an user interface for testing and debugging the operations of the SOC signal processing device.
摘要翻译： 片上逻辑分析（OCLA）系统捕获由嵌入在单芯片器件（SOC）中的信号处理逻辑核处理的数据，而不中断信号处理逻辑核的操作。 OCLA系统包括嵌入在SOC装置中的数据捕获单元，用于监视信号处理单元的操作，并确定操作是否满足预定的触发条件。 一旦满足触发条件，数据捕获单元从信号处理单元捕获内部数据并将其传送到外部主机系统。 主机系统控制数据采集单元的操作。 主机系统将捕获的数据提供给用户界面，用于测试和调试SOC信号处理设备的操作。
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2.发明申请DYNAMIC MEMORY ALLOCATION BETWEEN INBOUND AND OUTBOUND BUFFERS IN A PROTOCOL HANDLER 有权协议处理器中的内部和外部缓冲区之间的动态内存分配公开(公告)号：US20080301336A1
公开(公告)日：2008-12-04
申请号：US12183533
申请日：2008-07-31
CPC分类号： H04L49/9047 , H04L49/3018 , H04L49/3027 , H04L49/90
摘要： An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.
摘要翻译： 提出了一种用于在网络协议处理器的入站和出站路径之间动态分配存储器以便优化入站和出站缓冲器之间的给定量的存储器的比率的装置和方法。 为计算机网络的入站和出站处理器提供专用但可共享的缓冲存储器。 管理缓冲存储器，以便动态地改变用于接收和存储输入数据分组或传输输出数据分组的内存部分。 使用本发明减少了与常规固定存储器网络系统相关联的数据速率传输和其他存储器访问瓶颈的限制。
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公开(公告)号：US06503428B1
公开(公告)日：2003-01-07
申请号：US09536100
申请日：2000-03-24
申请人： Steven C. Parker
发明人： Steven C. Parker
IPC分类号： B29C3910
CPC分类号： B29C67/243 , B29C39/021 , B29C39/10 , B29C70/64 , B29C70/82 , B29C2791/008 , B29L2031/732
摘要： A process for manufacturing floor and wall coverings that produces a product a user may adhere to any wall or floor surface. The process begins by blending selected volumes of epoxy and aggregate into a vessel. A selected portion of the blended mixture is poured into a mold of selected geometry. A first piece of interlocking screening material is positioned over the first selected portion of the blended mixture. A second selected portion of the blended mixture is poured over the first interlocking screening material. A second piece of interlocking screening material is positioned over the second selected portion of the blended mixture. A selected portion of an adhering material is embedded into the top surface of the second interlocking screening material and the second selected portion of the blended molded mixture. The mold is cured and the product is released from the mold.
摘要翻译： 制造地板和墙壁覆盖物的方法，其产生用户可以粘附到任何墙壁或地板表面上的产品。 该过程首先将选定体积的环氧树脂和聚集体混合到容器中。 将混合混合物的选定部分倒入选定几何形状的模具中。 第一片联锁筛选材料位于混合混合物的第一选定部分上。 将混合的混合物的第二选定部分倒在第一互锁筛选材料上。 第二片联锁筛选材料位于混合混合物的第二选定部分上方。 粘合材料的选定部分被嵌入到第二互锁屏蔽材料的顶表面和混合的模制混合物的第二选定部分中。 模具固化，产品从模具中释放出来。
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4.发明授权Dynamic memory allocation between inbound and outbound buffers in a protocol handler 有权在协议处理程序中的入站和出站缓冲区之间的动态内存分配公开(公告)号：US07739427B2
公开(公告)日：2010-06-15
申请号：US12183533
申请日：2008-07-31
CPC分类号： H04L49/9047 , H04L49/3018 , H04L49/3027 , H04L49/90
摘要： An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.
摘要翻译： 提出了一种用于在网络协议处理器的入站和出站路径之间动态分配存储器以便优化入站和出站缓冲器之间的给定量的存储器的比率的装置和方法。 为计算机网络的入站和出站处理器提供专用但可共享的缓冲存储器。 管理缓冲存储器，以便动态地改变用于接收和存储输入数据分组或传输输出数据分组的内存部分。 使用本发明减少了与常规固定存储器网络系统相关联的数据速率传输和其他存储器访问瓶颈的限制。
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5.发明授权Dynamic memory allocation between inbound and outbound buffers in a protocol handler 有权在协议处理程序中的入站和出站缓冲区之间的动态内存分配公开(公告)号：US07457895B2
公开(公告)日：2008-11-25
申请号：US11680371
申请日：2007-02-28
CPC分类号： H04L49/9047 , H04L49/3018 , H04L49/3027 , H04L49/90
摘要： An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.
摘要翻译： 提出了一种用于在网络协议处理器的入站和出站路径之间动态分配存储器以便优化入站和出站缓冲器之间的给定量的存储器的比率的装置和方法。 为计算机网络的入站和出站处理器提供专用但可共享的缓冲存储器。 管理缓冲存储器，以便动态地改变用于接收和存储输入数据分组或传输输出数据分组的内存部分。 使用本发明减少了与常规固定存储器网络系统相关联的数据速率传输和其他存储器访问瓶颈的限制。
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公开(公告)号：US5672277A
公开(公告)日：1997-09-30
申请号：US107859
申请日：1994-10-17
IPC分类号： B01D17/02 , B01D29/11 , C10M175/00 , B01D15/00
CPC分类号： C10M175/005 , B01D17/0202
摘要： A bag type device (2) for extracting water from oil includes a bag (3) with an outer layer of felt (20) lined by at least one layer (22) of water absorbing laminate. The interior of the bag is composed of a plurality of slit sheets of water absorbing laminate forming a plurality of finger-like strips (35) depending from adjacent the top of the bag. The strips are preferably longer than the length of the bag. The bag and the water-absorbing layers within the bag are supported by a wire ring (30) stitched into a hem around the open upper end of the bag. As oil is passed through the bag, the finger-like strips provide an increased surface area for absorption of water from the oil. The strips can expand inwardly and toward the oil flow to prevent back-pressure build up within the bag.
摘要翻译： PCT No.PCT / US92 / 03428 Sec。 371日期：1994年10月17日 102（e）日期1994年10月17日PCT提交1992年4月24日PCT公布。 出版物WO93 / 22025 日期：1993年11月11日用于从油中提取水的袋式装置（2）包括具有由吸水层压板的至少一层（22）排列的毛毡外层（20）的袋（3）。 该袋的内部由多个狭缝片的吸水层压板组成，形成从邻近袋的顶部排列的多个指状条带（35）。 条优选长于袋的长度。 袋中的袋和吸水层由围绕袋的开口上端缝合成折边的线环（30）支撑。 当油通过袋时，指状条提供用于从油吸收水的增加的表面积。 条带可以向内扩展并朝向油流扩展，以防止袋内的背压积聚。
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7.发明授权Dynamic memory allocation between inbound and outbound buffers in a protocol handler 失效在协议处理程序中的入站和出站缓冲区之间的动态内存分配公开(公告)号：US07249206B2
公开(公告)日：2007-07-24
申请号：US10710414
申请日：2004-07-08
CPC分类号： H04L49/9047 , H04L49/3018 , H04L49/3027 , H04L49/90
摘要： An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.
摘要翻译： 提出了一种用于在网络协议处理器的入站和出站路径之间动态分配存储器以便优化入站和出站缓冲器之间的给定量的存储器的比率的装置和方法。 为计算机网络的入站和出站处理器提供专用但可共享的缓冲存储器。 管理缓冲存储器，以便动态地改变用于接收和存储输入数据分组或传输输出数据分组的内存部分。 使用本发明减少了与常规固定存储器网络系统相关联的数据速率传输和其他存储器访问瓶颈的限制。
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公开(公告)号：US07118673B2
公开(公告)日：2006-10-10
申请号：US10480182
申请日：2002-07-17
申请人： Steven C. Parker
发明人： Steven C. Parker
CPC分类号： B01D39/1623 , B01D17/0202 , B01D17/04 , B01D17/10 , B01D29/072 , B01D29/073 , B01D29/216 , B01D29/54 , B01D39/083 , B01D2201/184 , B01D2201/188 , B01D2201/40 , B01D2239/0618 , B01D2239/065 , B01D2239/069 , B01D2239/0695 , B01D2239/1291
摘要： The present invention involves a filter element assembly (10), which is useful in removing undissolved adhesive bodies from oil. The assembly includes at least one cylindrical body 11 of principal filter medium for removing particulates from oil. Body 11 has an inlet end and an outlet end. A secondary filter medium 20 for removing undissolved adhesive bodies from the oil is located around the sides and across the inlet end of the principle medium (11). A flow affording spacer 926) is disposed between the sides and the inlet end of the principal medium (11). A preferred spacer (26) is a non-woven expandible mesh present in a partially expanded state and having elements (27,28) grouped in first and second sets in which the elements (27) in the first set are laid atop the elements (28) in the second set. A readily cleanable containment vessel (39) for the filter element assembly (10) includes a tubular body (41) which is releasably connectible in liquid tight relation to a bottom cover (44) for the body (41).
摘要翻译： 本发明涉及一种过滤元件组件（10），其可用于从油中去除未溶解的粘合体。 该组件包括至少一个用于从油中除去微粒的主要过滤介质的圆筒体11。 主体11具有入口端和出口端。 用于从油中除去未溶解的粘合体的二级过滤介质20位于主要介质（11）的侧面和横跨入口端的周围。 提供间隔件926的流动）设置在主介质（11）的侧面和入口端之间。 优选的间隔件（26）是以部分展开状态存在并且具有分组在第一组和第二组中的元件（27,28）的无纺织物可膨胀网，其中第一组中的元件（27）放置在元件顶部 28）在第二组。 用于过滤器元件组件（10）的容易清洁的容纳容器（39）包括管状主体（41），该管状体可释放地与用于主体（41）的底盖（44）液密连接。
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9.发明授权Dynamic memory allocation between inbound and outbound buffers in a protocol handler 失效在协议处理程序中的入站和出站缓冲区之间的动态内存分配公开(公告)号：US06877048B2
公开(公告)日：2005-04-05
申请号：US10063018
申请日：2002-03-12
CPC分类号： H04L49/9047 , H04L49/3018 , H04L49/3027 , H04L49/90
摘要： An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.
摘要翻译： 提出了一种用于在网络协议处理器的入站和出站路径之间动态分配存储器以便优化入站和出站缓冲器之间的给定量的存储器的比率的装置和方法。 为计算机网络的入站和出站处理器提供专用但可共享的缓冲存储器。 管理缓冲存储器，以便动态地改变用于接收和存储输入数据分组或传输输出数据分组的内存部分。 使用本发明减少了与常规固定存储器网络系统相关联的数据速率传输和其他存储器访问瓶颈的限制。
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