公开(公告)号：US20100019239A1

公开(公告)日：2010-01-28

申请号：US12359149

申请日：2009-01-23

申请人： Woo Seok Cheong ,  Sung Min Yoon ,  Jae Heon Shin ,  Chi Sun Hwang

发明人： Woo Seok Cheong ,  Sung Min Yoon ,  Jae Heon Shin ,  Chi Sun Hwang

IPC分类号： H01L29/786 ,  H01L21/20

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/02631

摘要： Provided are a method of fabricating a zinc-tin-oxide (ZTO) thin film, a thin film transistor employing the same, and a method of fabricating a thin film transistor. The method of fabricating a ZTO thin film includes depositing zinc oxide and tin oxide at a deposition temperature of 450° C. or lower so that a zinc-to-tin atomic ratio is 4:1 or greater, to form an amorphous ZTO thin film. In the thin film transistor, the ZTO thin film is used as a channel layer.

摘要翻译： 提供了制造锌 - 锡氧化物（ZTO）薄膜的方法，采用该方法的薄膜晶体管以及制造薄膜晶体管的方法。 制造ZTO薄膜的方法包括在450℃或更低的沉积温度下沉积氧化锌和氧化锡，使得锌 - 锡原子比为4:1或更大，以形成无定形ZTO薄膜 。 在薄膜晶体管中，ZTO薄膜用作沟道层。

公开(公告)号：US08570066B2

公开(公告)日：2013-10-29

申请号：US13355479

申请日：2012-01-20

申请人： Sang Hee Park ,  Chi Sun Hwang ,  Sung Min Yoon ,  Him Chan Oh ,  Kee Chan Park ,  Tao Ren ,  Hong Kyun Leem ,  Min Woo Oh ,  Ji Sun Kim ,  Jae Eun Pi ,  Byeong Hoon Kim ,  Byoung Gon Yu

发明人： Sang Hee Park ,  Chi Sun Hwang ,  Sung Min Yoon ,  Him Chan Oh ,  Kee Chan Park ,  Tao Ren ,  Hong Kyun Leem ,  Min Woo Oh ,  Ji Sun Kim ,  Jae Eun Pi ,  Byeong Hoon Kim ,  Byoung Gon Yu

IPC分类号： H03K19/0175 ,  H03K19/094

CPC分类号： H03K3/012 ,  H03K19/094 ,  H03K19/20

摘要： Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.

公开(公告)号：US20110305062A1

公开(公告)日：2011-12-15

申请号：US12887316

申请日：2010-09-21

申请人： Chun Won BYUN ,  Byeong Hoon Kim ,  Sung Min Yoon ,  Kyoung Ik Cho ,  Sang Hee Park ,  Chi Sun Hwang ,  Min Ki Ryu ,  Shin Hyuk Yang ,  Oh Sang Kwon ,  Eun Suk Park

发明人： Chun Won BYUN ,  Byeong Hoon Kim ,  Sung Min Yoon ,  Kyoung Ik Cho ,  Sang Hee Park ,  Chi Sun Hwang ,  Min Ki Ryu ,  Shin Hyuk Yang ,  Oh Sang Kwon ,  Eun Suk Park

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： Provided are a memory cell and a memory device using the same, particularly, a nonvolatile non-destructive readable random access memory cell including a ferroelectric transistor as a storage unit and a memory device using the same. The memory cell includes a ferroelectric transistor having a drain to which a reference voltage is applied, a first switch configured to allow a source of the ferroelectric transistor to be connected to a first line in response to a scan signal, and a second switch configured to allow a gate of the ferroelectric transistor to be connected to a second line in response to the scan signal. The memory device enables random access and performs non-destructive read-out (NDRO) operations.

摘要翻译： 提供了一种存储器单元和使用该存储单元的存储器件，特别地，包括作为存储单元的铁电晶体管的非易失性非破坏性可读随机存取存储单元和使用该存储单元的存储器件。 存储单元包括具有施加了参考电压的漏极的铁电晶体管，被配置为允许铁电晶体管的源被响应于扫描信号连接到第一线的第一开关，以及被配置为 允许铁电晶体管的栅极响应于扫描信号连接到第二线。 存储器件允许随机访问并执行非破坏性读出（NDRO）操作。

公开(公告)号：US08493768B2

公开(公告)日：2013-07-23

申请号：US13300688

申请日：2011-11-21

申请人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

发明人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： Provided is a memory cell including: a ferroelectric transistor; a plurality of switching elements electrically connected to the ferroelectric transistor; and a plurality of control lines for transmitting individual control signals to each of the plurality of switching element for separately controlling the plurality of switching elements. The plurality of switching elements are configured to be separately controlled on the basis of the individual control signals so as to prevent each electrode of the ferroelectric transistor from being floated.

摘要翻译： 提供一种存储单元，包括：铁电晶体管; 电连接到所述铁电晶体管的多个开关元件; 以及多个控制线，用于将各个控制信号发送到多个开关元件中的每一个，用于分别控制多个开关元件。 多个开关元件被配置为基于各个控制信号单独控制，以防止铁电晶体管的每个电极浮动。

公开(公告)号：US08198625B2

公开(公告)日：2012-06-12

申请号：US12555986

申请日：2009-09-09

申请人： Sung Min Yoon ,  Shin Hyuk Yang ,  Soon Won Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

发明人： Sung Min Yoon ,  Shin Hyuk Yang ,  Soon Won Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

IPC分类号： H01L35/24

CPC分类号： H01L21/28291 ,  H01L29/78391 ,  H01L29/7869

摘要： Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.

摘要翻译： 提供了一种透明非易失性存储器薄膜晶体管（TFT）及其制造方法。 存储TFT包括设置在透明基板上的源极和漏极。 透明半导体薄层设置在源电极和漏电极之间，并且透明基板设置在源极和漏极之间。 有机铁电薄层设置在透明半导体薄层上。 栅电极与透明半导体薄层对准地设置在有机铁电薄层上。 因此，透明非易失性存储器TFT采用有机铁电薄层，氧化物半导体薄层和设置在有机铁电薄层之上和之下的辅助绝缘层，从而能够低成本地制造能够低的透明非易失性存储器件 温度过程。

公开(公告)号：US20100243994A1

公开(公告)日：2010-09-30

申请号：US12555986

申请日：2009-09-09

申请人： Sung Min Yoon ,  Shin Hyuk Yang ,  Soon Woon Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

发明人： Sung Min Yoon ,  Shin Hyuk Yang ,  Soon Woon Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

IPC分类号： H01L27/115 ,  H01L51/10 ,  H01L29/12 ,  H01L21/8246

CPC分类号： H01L21/28291 ,  H01L29/78391 ,  H01L29/7869

摘要： Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.

摘要翻译： 提供了一种透明非易失性存储器薄膜晶体管（TFT）及其制造方法。 存储TFT包括设置在透明基板上的源极和漏极。 透明半导体薄层设置在源电极和漏电极之间，并且透明基板设置在源极和漏极之间。 有机铁电薄层设置在透明半导体薄层上。 栅电极与透明半导体薄层对准地设置在有机铁电薄层上。 因此，透明非易失性存储器TFT采用有机铁电薄层，氧化物半导体薄层和设置在有机铁电薄层之上和之下的辅助绝缘层，从而能够低成本地制造能够低的透明非易失性存储器件 温度过程。

公开(公告)号：US08558295B2

公开(公告)日：2013-10-15

申请号：US12838878

申请日：2010-07-19

申请人： Sung Min Yoon ,  Chun Won Byun ,  Shin Hyuk Yang ,  Sang Hee Park ,  Soon Won Jung ,  Seung Youl Kang ,  Chi Sun Hwang ,  Byoung Gon Yu

发明人： Sung Min Yoon ,  Chun Won Byun ,  Shin Hyuk Yang ,  Sang Hee Park ,  Soon Won Jung ,  Seung Youl Kang ,  Chi Sun Hwang ,  Byoung Gon Yu

IPC分类号： H01G7/06

CPC分类号： H01L29/6684 ,  B82Y10/00 ,  G11C11/22 ,  H01L21/28291 ,  H01L27/1159 ,  H01L29/78391

摘要： Provided are a nonvolatile memory cell and a method of manufacturing the same. The nonvolatile memory cell includes a memory transistor and a driver transistor. The memory transistor includes a semiconductor layer, a buffer layer, an organic ferroelectric layer, and a gate electrode, which are disposed on a substrate. The driver transistor includes the semiconductor layer, the buffer layer, a gate insulating layer, and the gate electrode, which are disposed on the substrate. The memory transistor and the driver transistor are disposed on the same substrate. The nonvolatile memory cell is transparent in a visible light region.

摘要翻译： 提供一种非易失性存储单元及其制造方法。 非易失性存储单元包括存储晶体管和驱动晶体管。 存储晶体管包括设置在基板上的半导体层，缓冲层，有机铁电层和栅极电极。 驱动晶体管包括设置在基板上的半导体层，缓冲层，栅极绝缘层和栅极电极。 存储晶体管和驱动晶体管设置在同一衬底上。 非易失性存储单元在可见光区域是透明的。

公开(公告)号：US08476106B2

公开(公告)日：2013-07-02

申请号：US13469558

申请日：2012-05-11

申请人： Sung Min Yoon ,  Shin Hyuk Yang ,  Soon Won Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

发明人： Sung Min Yoon ,  Shin Hyuk Yang ,  Soon Won Jung ,  Seung Youl Kang ,  Doo Hee Cho ,  Chun Won Byun ,  Chi Sun Hwang ,  Byoung Gon Yu ,  Kyoung Ik Cho

IPC分类号： H01L51/40

CPC分类号： H01L21/28291 ,  H01L29/78391 ,  H01L29/7869

摘要： Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the source and drain electrodes. An organic ferroelectric thin layer is disposed on the transparent semiconductor thin layer. A gate electrode is disposed on the organic ferroelectric thin layer in alignment with the transparent semiconductor thin layer. Thus, the transparent nonvolatile memory TFT employs the organic ferroelectric thin layer, the oxide semiconductor thin layer, and auxiliary insulating layers disposed above and below the organic ferroelectric thin layer, thereby enabling low-cost manufacture of a transparent nonvolatile memory device capable of a low-temperature process.

摘要翻译： 提供了一种透明非易失性存储器薄膜晶体管（TFT）及其制造方法。 存储TFT包括设置在透明基板上的源极和漏极。 透明半导体薄层设置在源电极和漏电极之间，并且透明基板设置在源极和漏极之间。 有机铁电薄层设置在透明半导体薄层上。 栅电极与透明半导体薄层对准地设置在有机铁电薄层上。 因此，透明非易失性存储器TFT采用有机铁电薄层，氧化物半导体薄层和设置在有机铁电薄层之上和之下的辅助绝缘层，从而能够低成本地制造能够低的透明非易失性存储器件 温度过程。

公开(公告)号：US20120242370A1

公开(公告)日：2012-09-27

申请号：US13355479

申请日：2012-01-20

申请人： Sang Hee Park ,  Chi Sun Hwang ,  Sung Min Yoon ,  Him Chan Oh ,  Kee Chan Park ,  Tao Ren ,  Hong Kyun Leem ,  Min Woo Oh ,  Ji Sun Kim ,  Jae Eun Pi ,  Byeong Hoon Kim ,  Byoung Gon Yu

发明人： Sang Hee Park ,  Chi Sun Hwang ,  Sung Min Yoon ,  Him Chan Oh ,  Kee Chan Park ,  Tao Ren ,  Hong Kyun Leem ,  Min Woo Oh ,  Ji Sun Kim ,  Jae Eun Pi ,  Byeong Hoon Kim ,  Byoung Gon Yu

IPC分类号： H03K19/094

CPC分类号： H03K3/012 ,  H03K19/094 ,  H03K19/20

摘要： Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.

摘要翻译： 公开了一种逆变器，NAND门和NOR门。 逆变器包括：上拉单元，由根据施加到栅极的电压向输出端子输出第一电源电压的第二薄膜晶体管构成; 根据施加到门的输入信号，将由接地电压输出到输出端的第五薄膜晶体管构成的下拉单元; 以及根据输入信号将第二电源电压或接地电压施加到第二薄膜晶体管的栅极的上拉驱动器。

公开(公告)号：US20120134197A1

公开(公告)日：2012-05-31

申请号：US13300688

申请日：2011-11-21

申请人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

发明人： Chunwon Byun ,  ByeongHoon Kim ,  Sung Min Yoon ,  Shinhyuk Yang ,  Min Ki Ryu ,  Chi-Sun Hwang ,  Sang-Hee Park ,  Kyoung Ik Cho

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： Provided is a memory cell including: a ferroelectric transistor; a plurality of switching elements electrically connected to the ferroelectric transistor; and a plurality of control lines for transmitting individual control signals to each of the plurality of switching element for separately controlling the plurality of switching elements. The plurality of switching elements are configured to be separately controlled on the basis of the individual control signals so as to prevent each electrode of the ferroelectric transistor from being floated.

摘要翻译： 提供一种存储单元，包括：铁电晶体管; 电连接到所述铁电晶体管的多个开关元件; 以及多个控制线，用于将各个控制信号发送到多个开关元件中的每一个，用于分别控制多个开关元件。 多个开关元件被配置为基于各个控制信号单独控制，以防止铁电晶体管的每个电极浮动。