公开(公告)号：US08381073B2

公开(公告)日：2013-02-19

申请号：US12623575

申请日：2009-11-23

申请人： Eui-jin Kwon ,  Oh-sang Kwon

发明人： Eui-jin Kwon ,  Oh-sang Kwon

IPC分类号： G06F11/00

CPC分类号： G06F21/64 ,  G06F11/1008 ,  G06F21/71 ,  G11C2029/0411

摘要： A system-on-a-chip (SOC) includes a memory system, a data processor and a read only memory (ROM). The memory system includes random access memory and a memory controller. The data processor includes at least one functional block that communicates data with the memory system via the memory controller. The ROM stores data and one or more parity bits for detecting and correcting errors in the data. The data includes chip information and/or security information for the SOC. A method of using the SOC includes storing data in the ROM that includes chip information and/or security information for the SOC; storing in the ROM the one or more parity bits for the data; reading the data and the one or more parity bits from the ROM; detecting and correcting errors in the data using the one or more parity bits; and outputting the corrected data.

摘要翻译： 片上系统（SOC）包括存储器系统，数据处理器和只读存储器（ROM）。 存储器系统包括随机存取存储器和存储器控制器。 数据处理器包括至少一个通过存储器控制器与存储器系统通信数据的功能块。 ROM存储数据和用于检测和校正数据中的错误的一个或多个奇偶校验位。 数据包括SOC的芯片信息和/或安全信息。 使用该SOC的方法包括将数据存储在ROM中，该数据包括用于SOC的芯片信息和/或安全信息; 在ROM中存储用于数据的一个或多个奇偶校验位; 从ROM读取数据和一个或多个奇偶校验位; 使用所述一个或多个奇偶校验位来检测和校正所述数据中的错误; 并输出校正数据。

公开(公告)号：US20110305062A1

公开(公告)日：2011-12-15

申请号：US12887316

申请日：2010-09-21

申请人： Chun Won BYUN ,  Byeong Hoon Kim ,  Sung Min Yoon ,  Kyoung Ik Cho ,  Sang Hee Park ,  Chi Sun Hwang ,  Min Ki Ryu ,  Shin Hyuk Yang ,  Oh Sang Kwon ,  Eun Suk Park

发明人： Chun Won BYUN ,  Byeong Hoon Kim ,  Sung Min Yoon ,  Kyoung Ik Cho ,  Sang Hee Park ,  Chi Sun Hwang ,  Min Ki Ryu ,  Shin Hyuk Yang ,  Oh Sang Kwon ,  Eun Suk Park

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： Provided are a memory cell and a memory device using the same, particularly, a nonvolatile non-destructive readable random access memory cell including a ferroelectric transistor as a storage unit and a memory device using the same. The memory cell includes a ferroelectric transistor having a drain to which a reference voltage is applied, a first switch configured to allow a source of the ferroelectric transistor to be connected to a first line in response to a scan signal, and a second switch configured to allow a gate of the ferroelectric transistor to be connected to a second line in response to the scan signal. The memory device enables random access and performs non-destructive read-out (NDRO) operations.

摘要翻译： 提供了一种存储器单元和使用该存储单元的存储器件，特别地，包括作为存储单元的铁电晶体管的非易失性非破坏性可读随机存取存储单元和使用该存储单元的存储器件。 存储单元包括具有施加了参考电压的漏极的铁电晶体管，被配置为允许铁电晶体管的源被响应于扫描信号连接到第一线的第一开关，以及被配置为 允许铁电晶体管的栅极响应于扫描信号连接到第二线。 存储器件允许随机访问并执行非破坏性读出（NDRO）操作。

公开(公告)号：US07705929B2

公开(公告)日：2010-04-27

申请号：US11640308

申请日：2006-12-18

申请人： Chang Ho Lee ,  Yon Kon Lee ,  Oh Sang Kwon

发明人： Chang Ho Lee ,  Yon Kon Lee ,  Oh Sang Kwon

IPC分类号： G02F1/1333

CPC分类号： G02F1/133608

摘要： A liquid crystal display device includes a liquid crystal display panel, a plurality of lamps for irradiating light onto the liquid crystal display panel, a cover bottom that houses the plurality of lamps, an inverter printed circuit board having a first surface and a second surface opposite to the first surface with an insulation base layer between the first and second surfaces, wherein the second surface is adjacent to the cover bottom, a transformer on the first surface of the inverter printed circuit board, and a metal shielding pattern on the second surface of the inverter printed circuit board directly between the transformer and the cover bottom.

摘要翻译： 一种液晶显示装置，包括液晶显示面板，用于将光照射到液晶显示面板上的多个灯，容纳多个灯的盖底部，具有第一表面和第二表面的反相印刷电路板 在所述第一表面和所述第一表面和所述第二表面之间具有绝缘基底层，其中所述第二表面与所述盖底部相邻，所述逆变器印刷电路板的第一表面上的变压器和所述反相印刷电路板的第二表面上的金属屏蔽图案 逆变器印刷电路板直接在变压器和盖底之间。

公开(公告)号：US20090168401A1

公开(公告)日：2009-07-02

申请号：US12266785

申请日：2008-11-07

申请人： Oh Sang KWON ,  Sang Dae Lee ,  Moon Sik Kang

发明人： Oh Sang KWON ,  Sang Dae Lee ,  Moon Sik Kang

IPC分类号： G02F1/13357

CPC分类号： G02F1/133611 ,  G02F1/133603 ,  G02F2001/133613

摘要： A backlight unit capable of preventing a degradation in luminance, while achieving a reduction in heat generation and a reduction in manufacturing costs by adjusting the arrangement of the light sources while reducing the number of the light sources is disclosed. The disclosed backlight unit includes a bottom cover formed with a plurality of light source groups each including a plurality of light sources arranged in one direction. The spacing of the adjacent light source groups increases gradually from a central portion of the bottom cover to opposite edges of the bottom cover.

摘要翻译： 公开了一种能够防止亮度劣化的背光单元，同时通过在减少光源数量的同时调节光源的布置来实现发热减少和制造成本的降低。 所公开的背光单元包括形成有多个光源组的底盖，每个光源组包括沿一个方向布置的多个光源。 相邻光源组的间距从底盖的中心部分逐渐增加到底盖的相对边缘。

公开(公告)号：US20070296903A1

公开(公告)日：2007-12-27

申请号：US11640308

申请日：2006-12-18

申请人： Chang Ho Lee ,  Yong Kon Lee ,  Oh Sang Kwon

发明人： Chang Ho Lee ,  Yong Kon Lee ,  Oh Sang Kwon

IPC分类号： G02F1/1343

CPC分类号： G02F1/133608

摘要： A liquid crystal display device includes a liquid crystal display panel, a plurality of lamps for irradiating light onto the liquid crystal display panel, a cover bottom that houses the plurality of lamps, an inverter printed circuit board having a first surface and a second surface opposite to the first surface with an insulation base layer between the first and second surfaces, wherein the second surface is adjacent to the cover bottom, a transformer on the first surface of the inverter printed circuit board, and a metal shielding pattern on the second surface of the inverter printed circuit board directly between the transformer and the cover bottom.

摘要翻译： 一种液晶显示装置，包括液晶显示面板，用于将光照射到液晶显示面板上的多个灯，容纳多个灯的盖底部，具有第一表面和第二表面的反相印刷电路板 在所述第一表面和所述第一表面和所述第二表面之间具有绝缘基底层，其中所述第二表面与所述盖底部相邻，所述逆变器印刷电路板的第一表面上的变压器和所述反相印刷电路板的第二表面上的金属屏蔽图案 逆变器印刷电路板直接在变压器和盖底之间。

公开(公告)号：US07194027B2

公开(公告)日：2007-03-20

申请号：US10413663

申请日：2003-04-15

申请人： Jae-woo Kim ,  Chang-hyun Yim ,  Hyun-cheol Park ,  Oh-sang Kwon ,  Jung-hoon Kim ,  Sung-hyun Hwang

发明人： Jae-woo Kim ,  Chang-hyun Yim ,  Hyun-cheol Park ,  Oh-sang Kwon ,  Jung-hoon Kim ,  Sung-hyun Hwang

IPC分类号： H03H7/30 ,  H03H7/40 ,  H03K5/159

CPC分类号： H04L25/03038 ,  H04L27/0008 ,  H04L2025/0342 ,  H04L2025/03764 ,  H04L2027/0038 ,  H04L2027/0055 ,  H04L2027/0067

摘要： A channel equalizing and carrier recovery system for home phoneline networking alliance (HomePNA) receiver and method thereof are provided. The channel equalizing system includes a frequency diverse quadrature amplitude modulation (FD-QAM) equalizer and a quadrature amplitude modulation (QAM) equalizer. The FD-QAM equalizer receives an FD-QAM signal, determines FD-QAM tap coefficients, and equalizes the FD-QAM signal using the FD-QAM tap coefficients. The QAM equalizer receives a QAM signal, determines QAM tap coefficients, and equalizes the QAM signal using the QAM tap coefficients. The QAM equalizer receives the FD-QAM signal and determines the QAM tap coefficients during a predetermined header period. The carrier recovery circuit includes a phase detector, a loop filter, and a numerically controlled oscillator (NCO). The phase detector uses a phase difference between a reception symbol and a decision signal of the reception symbol as an instantaneous phase difference when the reception symbol is a data symbol of an FD-QAM signal or a symbol of a QAM signal, uses “0” as the instantaneous phase difference when the reception symbol is a zero symbol of the FD-QAM signal, averages instantaneous phase differences during a predetermined period or time, and outputs the result of averaging. The loop filter filters the output signal of the phase detector. The NCO generates an oscillation signal having a variable phase in response to an output signal of the loop filter so that a phase error of a reception signal can be controlled.

摘要翻译： 提供了一种用于家庭网络联盟（HomePNA）接收机及其方法的信道均衡和载波恢复系统。 信道均衡系统包括频率分量正交幅度调制（FD-QAM）均衡器和正交幅度调制（QAM）均衡器。 FD-QAM均衡器接收FD-QAM信号，确定FD-QAM抽头系数，并使用FD-QAM抽头系数对FD-QAM信号进行均衡。 QAM均衡器接收QAM信号，确定QAM抽头系数，并使用QAM抽头系数对QAM信号进行均衡。 QAM均衡器接收FD-QAM信号，并在预定的报头周期内确定QAM抽头系数。 载波恢复电路包括相位检测器，环路滤波器和数控振荡器（NCO）。 当接收符号是FD-QAM信号的数据符号或QAM信号的符号时，相位检测器使用接收符号和接收符号的判定信号之间的相位差作为瞬时相位差，使用“0” 作为接收符号是FD-QAM信号的零符号时的瞬时相位差，在预定时间段或时间期间平均瞬时相位差，并输出平均结果。 环路滤波器对相位检测器的输出信号进行滤波。 NCO响应于环路滤波器的输出信号产生具有可变相位的振荡信号，从而可以控制接收信号的相位误差。

公开(公告)号：US5497239A

公开(公告)日：1996-03-05

申请号：US253479

申请日：1994-06-03

申请人： Oh-Sang Kwon

发明人： Oh-Sang Kwon

IPC分类号： G11B20/10 ,  H04N5/92 ,  H04N5/926 ,  H04N7/26 ,  H04N9/79 ,  H04N5/76

CPC分类号： H04N5/9264 ,  H04N19/40 ,  H04N9/7921

摘要： An apparatus having a recording and reproducing unit for recording and reproducing an encoded video signal received from a transmitter comprises a first, a second and a third recording paths through which the encoded video signal is processed in a first recording mode, a second recording mode and a third recording mode in order to selectively record the processed video signal; and a fourth, a fifth and a sixth reproduction paths through which the video signal recorded in the first, the second or the third recording mode is retrieved by the recording and reproducing unit and processed for the displaying thereof.

摘要翻译： 具有用于记录和再现从发射机接收的编码视频信号的记录和再现单元的装置包括第一，第二和第三记录路径，编码视频信号通过该第一记录路径以第一记录模式被处理，第二记录模式和 第三记录模式，以选择性地记录经处理的视频信号; 以及第四，第五和第六再现路径，通过记录和再现单元检索以第一，第二或第三记录模式记录的视频信号并进行处理以进行显示。

公开(公告)号：US5457481A

公开(公告)日：1995-10-10

申请号：US133622

申请日：1993-10-07

申请人： Chang Sohn ,  Oh-Sang Kwon

发明人： Chang Sohn ,  Oh-Sang Kwon

IPC分类号： H04N19/50 ,  G06T7/20 ,  G11C8/00 ,  G11C8/04 ,  H04N19/42 ,  H04N19/423 ,  H04N19/426 ,  H04N19/46 ,  H04N19/503 ,  H04N19/51 ,  H04N19/70 ,  G09G1/02

CPC分类号： G06T7/2013 ,  G11C8/00 ,  G11C8/04 ,  H04N19/423 ,  H04N19/433 ,  H04N19/51 ,  H04N19/61 ,  G06T2207/10016 ,  G06T2207/20052

摘要： A memory apparatus for use in a receiver for decoding video signals comprises a first memory for storing an image frame; a second memory for storing current pixel data temporally and providing the same to said first memory; an address generator for generating address signals for sequentially addressing two-dimensional pixels in the blocks; a delay unit for delaying said address signals by a predetermined delay time in generating write address signals for said first memory; an offset unit for comparing the said address signals with an offset address so as to prohibit the provision of write address signals to said first memory until one of said address signals reaches to said offset address; and a control circuit for selectively providing the read address signals and the write address signals to said first memory.

摘要翻译： 一种用于解码视频信号的接收机中的存储装置包括用于存储图像帧的第一存储器; 用于暂时存储当前像素数据并将其提供给所述第一存储器的第二存储器; 地址发生器，用于产生用于顺序寻址块中的二维像素的地址信号; 延迟单元，用于在产生用于所述第一存储器的写入地址信号时，将所述地址信号延迟预定的延迟时间; 偏移单元，用于将所述地址信号与偏移地址进行比较，以便禁止向所述第一存储器提供写入地址信号，直到所述地址信号之一到达所述偏移地址; 以及用于选择性地将所述读取地址信号和所述写入地址信号提供给所述第一存储器的控制电路。

公开(公告)号：US08871711B2

公开(公告)日：2014-10-28

申请号：US13129100

申请日：2009-11-11

申请人： George Cotsarelis ,  Oh Sang Kwon

发明人： George Cotsarelis ,  Oh Sang Kwon

IPC分类号： A61K38/17 ,  A61M37/00 ,  A61P17/14 ,  A61Q7/00 ,  A61K8/64 ,  A61K38/18

CPC分类号： A61K38/1825 ,  A61K8/64 ,  A61K38/1712 ,  A61K45/06 ,  A61M37/00 ,  A61M2037/0007 ,  A61N5/10 ,  A61N2005/1098 ,  A61Q7/00 ,  Y10S514/88

摘要： The present invention provides methods for treating hair loss, treating, inhibiting, or suppressing a degenerative skin disorder, treating androgenetic alopecia (AGA), generating new hair follicles (HF), and increasing the size of existing HF. The methods comprise epidermal disruption or administration of wnt, and administration of a fibroblast growth factor-9 polypeptide or another compound that upregulates sonic hedgehog gene signaling.

摘要翻译： 本发明提供了治疗脱发，治疗，抑制或抑制退行性皮肤病，治疗雄激素性脱发（AGA），产生新毛囊（HF）以及增加现有HF的大小的方法。 所述方法包括表皮破坏或施用wnt，以及施用成纤维细胞生长因子-9多肽或上调声刺猬蛋白基因信号传导的另一种化合物。

公开(公告)号：US20100131828A1

公开(公告)日：2010-05-27

申请号：US12623575

申请日：2009-11-23

申请人： Eui-jin KWON ,  Oh-sang KWON

发明人： Eui-jin KWON ,  Oh-sang KWON

IPC分类号： G11C29/00 ,  G06F11/00

CPC分类号： G06F21/64 ,  G06F11/1008 ,  G06F21/71 ,  G11C2029/0411

摘要： A system-on-a-chip (SOC) includes a memory system, a data processor and a read only memory (ROM). The memory system includes random access memory and a memory controller. The data processor includes at least one functional block that communicates data with the memory system via the memory controller. The ROM stores data and one or more parity bits for detecting and correcting errors in the data. The data includes chip information and/or security information for the SOC. A method of using the SOC includes storing data in the ROM that includes chip information and/or security information for the SOC; storing in the ROM the one or more parity bits for the data; reading the data and the one or more parity bits from the ROM; detecting and correcting errors in the data using the one or more parity bits; and outputting the corrected data.

摘要翻译： 片上系统（SOC）包括存储器系统，数据处理器和只读存储器（ROM）。 存储器系统包括随机存取存储器和存储器控制器。 数据处理器包括至少一个通过存储器控制器与存储器系统通信数据的功能块。 ROM存储数据和用于检测和校正数据中的错误的一个或多个奇偶校验位。 数据包括SOC的芯片信息和/或安全信息。 使用该SOC的方法包括将数据存储在ROM中，该数据包括用于SOC的芯片信息和/或安全信息; 在ROM中存储用于数据的一个或多个奇偶校验位; 从ROM读取数据和一个或多个奇偶校验位; 使用所述一个或多个奇偶校验位来检测和校正所述数据中的错误; 并输出校正数据。