Phase change random access memory device having variable drive voltage circuit
    1.
    发明授权
    Phase change random access memory device having variable drive voltage circuit 有权
    具有可变驱动电压电路的相变随机存取存储器件

    公开(公告)号:US07283387B2

    公开(公告)日:2007-10-16

    申请号:US11316256

    申请日:2005-12-23

    IPC分类号: G11C11/00 G11C5/14

    摘要: A phase change memory device includes a memory array including a plurality of phase change memory cells, each phase change memory cell including a phase change material and a diode, a plurality of column selection transistors connecting bit lines connected to the phase change memory cells to corresponding data lines, and a control node connecting the data lines to a sense amplifier unit. In a write operation mode, control voltages obtained by boosting a first voltage are respectively applied to the control node and gates of the column selection transistors, and a ground voltage is applied to a word line of a selected one of the phase change memory cells. In a standby mode, word lines and bit lines connected to the phase change memory cells of the memory array are maintained at the same voltage. According to the phase change memory device and a driving method thereof, a sufficient write voltage is supplied to a write driver, a column decoder and a row decoder in the write operation mode, and a voltage lower is applied to the write driver, the column decoder and the row decoder in the read operation mode and the standby mode, thereby reducing current consumption and enhancing operational reliability.

    摘要翻译: 相变存储器件包括包括多个相变存储器单元的存储器阵列,每个相变存储单元包括相变材料和二极管,多个列选择晶体管将连接到相变存储单元的位线连接到相应的 数据线和将数据线连接到读出放大器单元的控制节点。 在写入操作模式中,通过升压第一电压获得的控制电压分别施加到列选择晶体管的控制节点和栅极,并且将接地电压施加到所选择的一个相变存储单元的字线。 在备用模式中,连接到存储器阵列的相变存储单元的字线和位线保持在相同的电压。 根据相变存储器件及其驱动方法,在写入操作模式中向写入驱动器,列解码器和行解码器提供足够的写入电压,并且将较低的电压施加到写入驱动器,列 解码器和行解码器处于读取操作模式和待机模式,从而降低电流消耗并提高操作可靠性。

    Phase change random access memory device having variable drive voltage circuit

    公开(公告)号:US20070058425A1

    公开(公告)日:2007-03-15

    申请号:US11316256

    申请日:2005-12-23

    IPC分类号: G11C11/00

    摘要: A phase change memory device includes a memory array including a plurality of phase change memory cells, each phase change memory cell including a phase change material and a diode, a plurality of column selection transistors connecting bit lines connected to the phase change memory cells to corresponding data lines, and a control node connecting the data lines to a sense amplifier unit. In a write operation mode, control voltages obtained by boosting a first voltage are respectively applied to the control node and gates of the column selection transistors, and a ground voltage is applied to a word line of a selected one of the phase change memory cells. In a standby mode, word lines and bit lines connected to the phase change memory cells of the memory array are maintained at the same voltage. According to the phase change memory device and a driving method thereof, a sufficient write voltage is supplied to a write driver, a column decoder and a row decoder in the write operation mode, and a voltage lower is applied to the write driver, the column decoder and the row decoder in the read operation mode and the standby mode, thereby reducing current consumption and enhancing operational reliability.

    Nonvolatile memory device and related methods of operation
    3.
    发明授权
    Nonvolatile memory device and related methods of operation 有权
    非易失存储器件及相关操作方法

    公开(公告)号:US07688620B2

    公开(公告)日:2010-03-30

    申请号:US11834843

    申请日:2007-08-07

    IPC分类号: G11C11/00

    摘要: In a nonvolatile memory device, a program operation is performed on a plurality of nonvolatile memory cells by programming data having a first logic state in a first group among a plurality of selected memory cells selected from the plurality of nonvolatile memory cells during a first program interval of the program operation, and thereafter, programming data having a second logic state different from the first logic state in a second group among the selected memory cells during a second program interval of the program operation after the first program interval.

    摘要翻译: 在非易失性存储器件中,通过在第一程序间隔期间从多个非易失性存储单元中选出的多个选择的存储单元中的第一组中编程具有第一逻辑状态的数据,对多个非易失性存储单元执行编程操作 并且此后,在所述第一编程间隔之后的所述程序操作的第二编程间隔期间,在所选择的存储单元之间具有与所述第二组中的第一逻辑状态不同的第二逻辑状态的编程数据。

    Nonvolatile memory device and related methods of operation
    4.
    发明授权
    Nonvolatile memory device and related methods of operation 有权
    非易失存储器件及相关操作方法

    公开(公告)号:US07876609B2

    公开(公告)日:2011-01-25

    申请号:US12720918

    申请日:2010-03-10

    IPC分类号: G11C11/00

    摘要: In a nonvolatile memory device, a program operation is performed on a plurality of nonvolatile memory cells by programming data having a first logic state in a first group among a plurality of selected memory cells selected from the plurality of nonvolatile memory cells during a first program interval of the program operation, and thereafter, programming data having a second logic state different from the first logic state in a second group among the selected memory cells during a second program interval of the program operation after the first program interval.

    摘要翻译: 在非易失性存储器件中,通过在第一程序间隔期间从多个非易失性存储单元中选出的多个选择的存储单元中的第一组中编程具有第一逻辑状态的数据,对多个非易失性存储单元执行编程操作 并且此后,在所述第一编程间隔之后的所述程序操作的第二编程间隔期间,在所选择的存储单元之间具有与所述第二组中的第一逻辑状态不同的第二逻辑状态的编程数据。

    Phase change random access memory device and related methods of operation
    7.
    发明授权
    Phase change random access memory device and related methods of operation 有权
    相变随机存取存储器件及相关操作方法

    公开(公告)号:US07701757B2

    公开(公告)日:2010-04-20

    申请号:US11834845

    申请日:2007-08-07

    IPC分类号: G11C11/00

    摘要: A method of operating a phase change random access memory (PRAM) device comprises performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.

    摘要翻译: 一种操作相变随机存取存储器(PRAM)装置的方法包括执行程序操作以将数据存储在所述装置的所选择的PRAM单元中,其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作,并且在暂停编程操作之后,响应于恢复命令恢复程序操作。

    Phase change random access memory device and related methods of operation
    9.
    发明授权
    Phase change random access memory device and related methods of operation 有权
    相变随机存取存储器件及相关操作方法

    公开(公告)号:US08320168B2

    公开(公告)日:2012-11-27

    申请号:US13108143

    申请日:2011-05-16

    IPC分类号: G11C11/00

    摘要: A method of operating a phase change random access memory (PRAM) device includes performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.

    摘要翻译: 操作相变随机存取存储器(PRAM)装置的方法包括执行程序操作以将数据存储在所述装置的所选PRAM单元中,其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作,并且在暂停编程操作之后,响应于恢复命令恢复程序操作。